TP1942U-VR [3PEAK]

68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators;
TP1942U-VR
型号: TP1942U-VR
厂家: 3PEAK    3PEAK
描述:

68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators

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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Features  
Description  
The 3PEAK INCORPORATED TP194x families of  
CMOS/TTL compatible comparators are offered in  
single, dual, and quad configurations, and are  
exceptionally versatile and easy to use.  
Fast Response Time: 68 ns Propagation Delay  
Ultra-Low Supply Current: 46 μA per Channel  
Offset Voltage: ± 3.0 mV Maximum  
The TP194x incorporate 3PEAK’s proprietary and  
patented design techniques to achieve the ultimate  
combination of high-speed (68ns propagation delay  
under 1.8~5.5V wide supply range) and low power  
consuming (46μA quiescent current per comparator).  
These comparators are optimized for low power  
1.8V, single-supply applications with greater than  
rail-to-rail input operation, and also operate with  
±0.9V to ±2.75V dual supplies. The input common  
mode voltage range extends 200mV below ground  
and 200mV above supply, allowing both ground and  
supply sensing. The internal input hysteresis  
eliminates output switching due to internal input  
noise voltage, reducing current draw. The push-pull  
output supports rail-to-rail output swing, and  
interfaces with CMOS/TTL logic. The output toggle  
frequency can reach a typical of 4 MHz while limiting  
supply current surges and dynamic power  
consumption during switching.  
Offset Voltage Temperature Drift: 0.3 μV/°C  
Input Bias Current: 6 pA Typical  
Internal Hysteresis Ensures Clean Switching  
Input Common-Mode Range Extends 200 mV  
No Phase Reversal for Overdriven Inputs  
Push-Pull, CMOS/TTL Compatible Output  
Shut-down Function (TP1941N Only)  
Output Latch (TP1941NU Only)  
Down to 1.8V Supply Voltage: 1.8V to 5.5V  
Green, Space-Saving SC70 Package Available  
Applications  
High-speed Line or Digital Line Receivers  
High Speed Sampling Circuits  
Peak and Zero-crossing Detectors  
Threshold Detectors/Discriminators  
Sensing at Ground or Supply Line  
Logic Level Shifting or Translation  
Window Comparators  
The TP1941 single comparators are available in  
shout-down function, output latch version, and the  
tiny SC70/SOT23 package for space-conservative  
designs. All devices are specified for the  
temperature range of –40°C to +85°C.  
3PEAK and the 3PEAK logo are registered trademarks of  
3PEAK INCORPORATED. All other trademarks are the property  
of their respective owners.  
IR Receivers  
Clock and Data Signal Restoration  
Telecom, Portable Communications  
Portable and Battery Powered Systems  
Related Products  
DEVICE  
DESCRIPTION  
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TP1951/TP1951N  
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VDD  
Fast 30ns, Low Power, Internal Hysteresis,  
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Ro  
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R1  
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TP1941  
TP1931  
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VOUT  
TP1935  
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950ns, 3µA, 1.8V, ±2.5mV VOS-MAX, Internal  
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RD  
Ultra-low 200nA, 13µs, 1.6V, ±2mV VOS-MAX  
Internal Hysteresis, RRI, Push-Pull (CMOS/TTL)  
Output Comparators  
,
TP2011  
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The TP1941 Comparator in IR Receivers  
Ultra-low 200nA, 13µs, 1.6V, ±2mV VOS-MAX  
Internal Hysteresis, RRI, Open-Drain Output  
Comparators  
,
TP2015  
/TP2016/TP2018  
www.3peakic.com.cn  
1
TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Pin Configuration (Top View)  
Order Information  
Marking  
Information  
Model Name  
Order Number  
Package  
Transport Media, Quantity  
TP1941-TR  
5-Pin SOT23  
5-Pin SC70  
8-Pin SOIC  
5-Pin SOT23  
5-Pin SC70  
5-Pin SOT23  
6-Pin SOT23  
8-Pin SOIC  
8-Pin SOIC  
8-Pin MSOP  
8-Pin DIP  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 4000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 4000  
Tape and Reel, 4000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 4000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 4000  
Tape and Reel, 3000  
Tape and Reel, 2500  
Tape and Reel, 3000  
Tape and Reel, 3000  
C4TYW (1)  
C4CYW (1)  
1941S  
TP1941  
TP1941-CR  
TP1941-SR  
TP1941U-TR  
TP1941U-CR  
TP1941U2-TR  
TP1941N-TR  
TP1941N-SR  
TP1941NU-SR  
TP1941NU-VR  
TP1941NU-DR  
TP1942-TR  
(1)  
C4AYW  
TP1941U  
TP1941U2  
TP1941N  
(1)  
C4BYW  
(1)  
C4EYW  
(1)  
C4NYW  
1941NS  
1941NUS  
1941NU  
1941NUD  
C42YW (1)  
1942S  
TP1941NU  
TP1942  
8-Pin SOT23  
8-Pin SOIC  
8-Pin MSOP  
8-Pin DIP  
TP1942-SR  
TP1942-VR  
TP1942-DR  
TP1942U-SR  
TP1942U-VR  
TP1944-SR  
TP1944-TR  
1942V  
1942D  
8-Pin SOIC  
8-Pin MSOP  
14-Pin SOIC  
14-Pin TSSOP  
14-Pin DIP  
1942US  
1942U  
TP1942U  
TP1944  
1944S  
1944T  
TP1944-DR  
1944D  
Note (1): ‘YW’ is date coding scheme. 'Y' stands for calendar year, and 'W' stands for single workweek coding scheme.  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Note 1  
Absolute Maximum Ratings  
Supply Voltage: V+ – V....................................6.0V  
Input Voltage............................. V– 0.3 to V+ + 0.3  
Input Current: +IN, –IN, Note 2..........................±10mA  
Output Current: OUT.................................... ±45mA  
Output Short-Circuit Duration Note 3…......... Indefinite  
Operating Temperature Range.........–40°C to 85°C  
Maximum Junction Temperature................... 150°C  
Storage Temperature Range.......... –65°C to 150°C  
Lead Temperature (Soldering, 10 sec) ......... 260°C  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any  
Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.  
Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power  
supply, the input current should be limited to less than 10mA.  
Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage  
and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified  
values are for short traces connected to the leads.  
ESD, Electrostatic Discharge Protection  
Symbol  
HBM  
Parameter  
Human Body Model ESD  
Charged Device Model ESD  
Condition  
Minimum Level  
Unit  
kV  
kV  
MIL-STD-883H Method 3015.8  
JEDEC-EIA/JESD22-C101E  
8
2
CDM  
www.3peakic.com  
REV1.0  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Electrical Characteristics  
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 27°C.  
VDD = +1.8V to +5.5V, VIN+ = VDD, VIN- = 1.2V, RPU=10kΩ, CL =15pF.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
1.8  
-3  
TYP  
MAX  
5.5  
UNITS  
V
VDD  
VOS  
Supply Voltage  
Input Offset Voltage Note 1  
VCM = 1.2V  
±0.6  
+3  
mV  
VOS TC  
VHYST  
Input Offset Voltage Drift Note 1  
Input Hysteresis Voltage Note 1  
Input Hysteresis Voltage Drift Note 1  
VCM = 1.2V  
VCM = 1.2V  
0.3  
6
μV/°C  
mV  
4
8
VHYST TC  
VCM = 1.2V  
VCM = 1.2V  
20  
μV/°C  
IB  
IOS  
RIN  
Input Bias Current  
Input Offset Current  
Input Resistance  
6
4
pA  
pA  
GΩ  
> 100  
2
4
Differential  
Common Mode  
VCM = VSS to VDD  
CIN  
Input Capacitance  
pF  
dB  
V
CMRR  
VCM  
Common Mode Rejection Ratio  
Common-mode Input Voltage  
Range  
50  
70  
VSS-0.1  
VDD+0.1  
VSS+0.3  
PSRR  
VOH  
VOL  
ISC  
IQ  
IQ(off)  
VIL  
VIH  
tON  
tOFF  
Power Supply Rejection Ratio  
High-Level Output Voltage  
Low-Level Output Voltage  
Output Short-Circuit Current  
Quiescent Current per Comparator  
Supply Current in Shutdown Note 2  
SHDN Input Low Voltage Note 2  
SHDN Input High Voltage Note 2  
Turn-On Time Note 2  
60  
VDD-0.3  
75  
dB  
V
V
mA  
μA  
μA  
V
V
μs  
μs  
IOUT=-1mA  
IOUT=1mA  
Sink or source current  
25  
46  
58  
1.5  
0.2VDD  
Disable  
Enable  
SHDN Toggle from VSS to VDD  
SHDN Toggle from VDD to VSS  
0.8VDD  
15  
1
Turn-Off Time Note 2  
tLPD  
tR  
Latch Propagation Delay Note 3  
200  
5
ns  
ns  
ns  
ns  
ns  
ns  
Rising Time  
tF  
Falling Time  
5
Propagation Delay (Low-to-High)  
Propagation Delay (High-to-Low)  
Propagation Delay Skew  
TPD+  
TPD-  
TPDSKEW  
Overdrive=100mV, VIN- =1.2V  
Overdrive=100mV, VIN- =1.2V  
Overdrive=100mV, VIN- =1.2V  
68  
72  
-4  
Note 1: The input offset voltage is the average of the input-referred trip points. The input hysteresis is the difference between the input-referred  
trip points.  
Note 2: Specifications apply to the TP1941N with shutdown.  
Note 3: Specifications apply to the TP1941NU with shutdown and latch enable.  
Note 4: Propagation Delay Skew is defined as: tPD-SKEW = tPD+ - tPD-  
.
REV1.1  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Input Offset Voltage V.S. Temperature  
Input Hysteresis Voltage V.S. Temperature  
2.0  
10.0  
8.0  
5V  
1.0  
0.0  
1.8V  
6.0  
5V  
4.0  
1.8V  
-1.0  
-2.0  
2.0  
VCM=1.2V  
VCM=1.2V  
0.0  
-50  
0
50  
100  
-50  
0
50  
100  
Temperature (  
)
Temperature (  
)
Quiescent Current V.S. Temperature  
Propagation Delay V.S. Temperature  
70  
60  
50  
40  
30  
20  
100  
tpd- @VDD=5V  
tpd+ @VDD=5V  
5V  
80  
60  
40  
20  
1.8V  
tpd- @VDD=1.8V  
tpd+ @VDD=1.8V  
VCM=VSS  
VCM=1.2V  
-50  
0
50  
100  
-50  
0
50  
100  
Temperature (  
)
Temperature (  
)
Propagation Delay Skew V.S. Temperature  
Propagation Delay V.S. Overdrive Voltage  
10  
10000  
tpd+ @VDD=5V  
5
1000  
tpd- @VDD=5V  
0
tpd+ @VDD=1.8V  
5V  
100  
-5  
tpd- @VDD=1.8V  
1.8V  
VCM=VSS  
VCM=VSS  
10  
-10  
-50  
0
50  
100  
1
10  
100  
1V  
Temperature (  
)
Overdrive (mV)  
www.3peakic.com  
REV1.0  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Propagation Delay Skew V.S. Overdrive Voltage  
Propagation Delay V.S. Capacitor Loading  
100  
400  
VCM=VSS  
350  
300  
tpd+ @VDD=1.8V  
50  
250  
tpdskew @VDD=5V  
tpd- @VDD=1.8V  
200  
tpd- @VDD=5V  
150  
0
tpd+ @VDD=5V  
100  
50  
0
tpdskew@VDD=1.8V  
VCM=VSS  
-50  
1
10  
100  
1V  
1
10  
100  
1n  
Overdrive (mV)  
Capacitive Load (pF)  
Propagation Delay Skew V.S. Capacitor Loading  
Rising/Falling Time V.S. Capacitor Loading  
100  
1000  
VCM=VSS  
VCM=1.2V  
800  
0
trising @VDD=1.8V  
600  
tpdskew @VDD=1.8V  
tpdskew @VDD=5V  
tfalling @VDD=1.8V  
-100  
400  
trising @VDD=5V  
-200  
tfalling @VDD=5V  
200  
0
-300  
1
10  
100  
1n  
1
10  
100  
1n  
Capacitive Load (pF)  
Capacitive Load (pF)  
Quiescent Current V.S. Common Mode Voltage  
Quiescent Current V.S. Common Mode Voltage  
100  
80  
100  
80  
27  
85  
85  
27  
60  
40  
20  
0
60  
40  
20  
0
VDD=5V  
Vin-=0V  
Vin+=Vcm  
VDD=5V  
Vin-=0V  
Vin+=Vcm  
-40  
-40  
0
1
2
3
4
5
0.0  
0.5  
1.0  
1.5  
2.0  
Common Mode Voltage (V)  
Common Mode Voltage (V)  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Input Offset Voltage V.S. Common Mode Voltage  
Input Offset Voltage V.S. Common Mode Voltage  
2
2
-40  
1
0
1
0
85  
27  
27  
85  
-40  
-1  
-2  
-1  
VDD=5V  
VDD=1.8V  
-2  
0
1
2
3
4
5
0.0  
0.5  
1.0  
1.5  
2.0  
Common Mode Voltage (V)  
Common Mode Voltage (V)  
Input Hysteresis Voltage V.S. Common Mode Voltage  
Input Hysteresis Voltage V.S. Common Mode Voltage  
10  
20  
16  
12  
85  
8
6
4
2
0
27  
85  
27  
8
4
0
-40  
-40  
VDD=5V  
VDD=1.8V  
0
1
2
3
4
5
0.0  
0.5  
1.0  
1.5  
2.0  
Common Mode Voltage (V)  
Common Mode Voltage (V)  
Input Offset Voltage Distribution  
Input Hysteresis Voltage Distribution  
45%  
40%  
35%  
30%  
25%  
20%  
15%  
10%  
5%  
90%  
1626 Samples  
VCM=1.2V  
1626 Samples  
VCM=1.2V  
80%  
70%  
60%  
50%  
40%  
30%  
20%  
10%  
0%  
100mV overdrive  
100mV overdrive  
5V  
1.8V  
5V  
1.8V  
0%  
-6 -5 -4 -3 -2 -1  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
7
8
9 10 11 12  
Input Offset Voltage (mV)  
Input Hysteresis Voltage (mV)  
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REV1.0  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Quiescent Current Distribution  
Input Bias and Offset Current V.S. Temperature  
1000  
70%  
1626 Samples  
60%  
VCM=1.2V  
50%  
40%  
30%  
20%  
10%  
0%  
100mV overdrive  
100  
10  
1
Ibias  
1.8V  
5V  
Ios  
VDD=5V  
20 25 30 35 40 45 50 55 60 65 70 75 80  
Quiscent Current (uA)  
-50  
0
50  
100  
TEMPERATURE (  
)
Input Bias Current V.S. Common Mode Voltage  
Output Short Circuit Current V.S. Temperature  
20  
40  
Isource@5V  
15  
20  
Isource@1.8V  
Ibias  
10  
0
Isink@1.8V  
Ios  
-20  
5
VDD=5V  
0
Isink@5V  
60  
-40  
0
1
2
3
4
-40  
-15  
10  
35  
85  
Common Mode Voltage (V)  
TEMPERATURE (  
)
Output Short Circuit Current V.S. Supply Voltage  
Output Voltage Headroom V.S. Output Current  
40  
5
Isource  
4
VOH  
20  
3
0
85  
27  
-40  
-40  
27  
85  
2
1
0
VOL  
VDD=5V  
-20  
-40  
Isink  
1
2
3
4
5
0
2
4
6
8
10  
Supply Voltage (V)  
Output Current (mA)  
REV1.1  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Output Voltage Headroom V.S. Output Current  
Input Offset Voltage V.S. Supply Voltage  
2.0  
2
1.5  
1
85  
27  
VOH  
1.0  
0
-1  
-2  
27  
85  
-40  
-40  
VOL  
0.5  
0.0  
VDD=1.8V  
1
1
2
3
4
5
0
2
3
4
5
Supply Voltage (V)  
Output Current (mA)  
Input Hysteresis Voltage V.S. Supply Voltage  
Quiescent Current V.S. Supply Voltage  
10  
70  
85  
85  
8
6
4
2
0
60  
50  
40  
30  
20  
27  
27  
-40  
-40  
1
2
3
4
5
1
2
3
4
5
Supply Voltage (V)  
Supply Voltage (V)  
Low to High Propagation Delay V.S. Supply Voltage  
High to low Propagation Delay V.S. Supply Voltage  
100  
100  
27  
80  
80  
60  
40  
20  
-40  
27  
-40  
60  
40  
20  
85  
85  
VCM=VSS  
VCM=VSS  
1
2
3
4
5
1
2
3
4
5
Supply Voltage (V)  
Supply Voltage (V)  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Performance Characteristics  
Propagation Skew Delay V.S. Supply Voltage  
20  
10  
0
85  
27  
-10  
-20  
-40  
VCM=VSS  
1
2
3
4
5
Supply Voltage (V)  
Pin Functions  
–IN: Inverting Input of the Comparator. Voltage  
V(VSS): Negative Power Supply. It is normally tied to  
ground. It can also be tied to a voltage other than  
ground as long as the voltage between V+ and Vis  
from 1.8V to 5.5V. If it is not connected to ground,  
bypass it with a capacitor of 0.1μF as close to the  
part as possible.  
range of this pin can go from V– 0.3V to V+ + 0.3V.  
+IN: Non-Inverting Input of Comparator. This pin has  
the same voltage range as –IN.  
V+ (VDD): Positive Power Supply. Typically the  
voltage is from 1.8V to 5.5V. Split supplies are  
possible as long as the voltage between V+ and V–  
is between 1.8V and 5.5V. A bypass capacitor of  
0.1μF as close to the part as possible should be used  
between power supply pins or between supply pins  
and ground.  
SHDN: Active Low Shutdown. Shutdown threshold  
is 1/2V+ above negative supply rail.  
LATCH: Active Low Latch enable. Latch enable  
threshold is 1/2V+ above negative supply rail.  
OUT: Comparator Output. The voltage range  
N/C: No Connection.  
extends to within millivolts of each supply rail.  
Operation  
The TP194x family single-supply comparators feature  
internal hysteresis, high speed, and low power. Input  
signal range extends beyond the negative and  
positive power supplies. The output can even extend  
all the way to the negative supply. The input stage is  
active over different ranges of common mode input  
voltage. Rail-to-rail input voltage range and  
low-voltage single-supply operation make these  
devices ideal for portable equipment.  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Applications Information  
Inputs  
The TP194x comparator family uses CMOS transistors at the input which prevent phase inversion when the input  
pins exceed the supply voltages. Figure 1 shows an input voltage exceeding both supplies with no resulting phase  
inversion.  
6
Input Voltage  
4
2
0
Output Voltage  
VDD=5V  
-2  
Time (100μs/div)  
Figure 1. Comparator Response to Input Voltage  
The electrostatic discharge (ESD) protection input structure of two back-to-back diodes and 1kΩ series resistors  
are used to limit the differential input voltage applied to the precision input of the comparator by clamping input  
voltages that exceed supply voltages, as shown in Figure 2. Large differential voltages exceeding the supply  
voltage should be avoided to prevent damage to the input stage.  
1KΩ  
+In  
Core  
1KΩ  
-In  
Chip  
Figure 2. Equivalent Input Structure  
Internal Hysteresis  
Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This  
tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the  
parasitic effects and noise, the TP194x implements internal hysteresis.  
The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input  
voltage. The difference between the trip points is the hysteresis. When the comparator’s input voltages are equal,  
the hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
input out of the region where oscillation occurs. Figure 3 illustrates the case where IN- is fixed and IN+ is varied. If  
the inputs were reversed, the figure would look the same, except the output would be inverted.  
-Vin-  
-Vin-  
0
0
Non-Inverting Comparator Output  
Inverting Comparator Output  
Figure 3. Comparator’s hysteresis and offset  
External Hysteresis  
Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output  
chattering when one input is slowly moving past the other. It also helps in systems where it is best not to cycle  
between high and low states too frequently (e.g., air conditioner thermostatic control). Output chatter also  
increases the dynamic supply current.  
Non-Inverting Comparator with Hysteresis  
A non-inverting comparator with hysteresis requires a two-resistor network, as shown in Figure 4 and a voltage  
reference (Vr) at the inverting input.  
Figure 4. Non-Inverting Configuration with Hysteresis  
When Vi is low, the output is also low. For the output to switch from low to high, Vi must rise up to Vtr. When Vi is  
high, the output is also high. In order for the comparator to switch back to a low state, Vi must equal Vtf before the  
non-inverting input V+ is again equal to Vr.  
R
2
V
V
tr  
r
R
R
2
1
R
1
V
(V  
V  
)
V  
tf  
r
DD  
tf  
R
1
R
2
R
R
2
1
V
V
r
tr  
R
2
R
R
R
1
1
2
V
V   
V
DD  
r
tf  
R
R
2
2
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
R
1
V
V V  
tf  
V
DD  
tr  
hyst  
R
2
Inverting Comparator with Hysteresis  
The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator  
supply voltage (VDD), as shown in Figure 5.  
Figure 5. Inverting Configuration with Hysteresis  
When Vi is greater than V+, the output voltage is low. In this case, the three network resistors can be presented as  
paralleled resistor R2 || R3 in series with R1. When Vi at the inverting input is less than V+, the output voltage is  
high. The three network resistors can be represented as R1 ||R3 in series with R2.  
R
2
V
V
tr  
tf  
DD  
||  
R
R
R
2
1
3
||  
R
R
2
3
V
V
DD  
||  
R
1
R
R
2
3
||  
R
R
2
1
V
V V  
tf  
V
tr  
DD  
hyst  
||  
R
3
R
R
1
2
Low Input Bias Current  
The TP194x family is a CMOS comparator family and features very low input bias current in pA range. The low  
input bias current allows the comparators to be used in applications with high resistance sources. Care must be  
taken to minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details.  
PCB Surface Leakage  
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to  
be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low  
humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of  
current to flow, which is greater than the TP194x’s input bias current at +27°C (±6pA, typical). It is recommended  
to use multi-layer PCB layout and route the comparator’s -IN and +IN signal under the PCB surface.  
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The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard  
ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for  
Inverting configuration application.  
1. For Non-Inverting Configuration:  
a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface.  
b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the same reference as the  
comparator.  
2. For Inverting Configuration:  
a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as  
the comparator (e.g., VDD/2 or ground).  
b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface.  
Figure 6. Example Guard Ring Layout for Inverting Comparator  
Ground Sensing and Rail to Rail Output  
The TP194x family implements a rail-to-rail topology that is capable of swinging to within 10mV of either rail.  
Since the inputs can go 300mV beyond either rail, the comparator can easily perform ‘true ground’ sensing.  
The maximum output current is a function of total supply voltage. As the supply voltage of the comparator  
increases, the output current capability also increases. Attention must be paid to keep the junction temperature of  
the IC below 150°C when the output is in continuous short-circuit condition. The output of the amplifier has  
reverse-biased ESD diodes connected to each supply. The output should not be forced more than 0.5V beyond  
either supply, otherwise current will flow through these diodes.  
ESD  
The TP194x family has reverse-biased ESD protection diodes on all inputs and output. Input and output pins can  
not be biased more than 300mV beyond either supply rail.  
Shut-down  
The TP1941N/TP1941NU has SHDN pins that can shut down the amplifier to less than 1.5μA supply current. The  
SHDN pin voltage needs to be within 0.2V+ of V– for the amplifier to shut down. During shutdown, the output will  
be in high output resistance state, which is suitable for multiplexer applications. It should be noted that SHDN pin  
is forbidden to be left floating.  
Latch-enable  
The TP1941NU includes an internal latch that allows storage of comparison results. The LATCH pin has a high  
input impedance. If LATCH is high, the latch is transparent (i.e., the comparator operates as though the latch is  
not present). The comparator's output state is stored when LATCH is pulled low. All timing constraints must be  
met when using the latch function (Figure 7).  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Figure 7. TP1941NU Timing Diagram with Latch Operator  
Power Supply Layout and Bypass  
The TP194x family’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for  
good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide  
large, slow currents. This bulk capacitor can be shared with other analog parts.  
Good ground layout improves performance by decreasing the amount of stray capacitance and noise at the  
comparator’s inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and  
place external components as close to the comparator’ pins as possible.  
Proper Board Layout  
The TP194x family is a series of fast-switching, high-speed comparator and requires high-speed layout  
considerations. For best results, the following layout guidelines should be followed:  
1. Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane.  
2. Place a decoupling capacitor (0.1μF ceramic, surface-mount capacitor) as close as possible to supply.  
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback  
around the comparator. Keep inputs away from the output.  
4. Solder the device directly to the PCB rather than using a socket.  
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)  
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some  
degradation to propagation delay when the impedance is low. The topside ground plane should be placed  
between the output and inputs.  
6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs  
from the outputs.  
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68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Typical Applications  
IR Receiver  
The TP1941 is an ideal candidate to be used as an infrared receiver shown in Figure 8. The infrared photo diode  
creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When  
this voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions.  
Optional Ro provides additional hysteresis for noise immunity.  
VDD  
Ro  
R1  
TP1941  
Vo  
R2  
RD  
Figure 8. IR Receiver  
Relaxation Oscillator  
A relaxation oscillator using TP1941 is shown in Figure 9. Resistors R1 and R2 set the bias point at the  
comparator's inverting input. The period of oscillator is set by the time constant of R4 and C1. The maximum  
frequency is limited by the large signal propagation delay of the comparator. TP1941’s low propagation delay  
guarantees the high frequency oscillation.  
If the inverted input (VC1) is lower than the non-inverting input (VA), the output is high which charges C1 through R4  
until VC1 is equal to VA. The value of VA at this point is  
V
R  
2
DD  
|| R R  
2
V
A1  
R
1
3
At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is  
V
R || R  
DD  
2
3
V
A2  
R
R || R  
3
1
2
If R1=R2=R3, then VA1=2VDD /3, and VA2= VDD/3  
The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the  
comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes  
to discharge C1 from 2VDD/3 to VDD/3. Hence the frequency is:  
1
Freq   
2 ln2 R C  
4
1
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
VDD  
R3  
VO  
R1  
R2  
TP1941  
VA  
t
t
VC1  
Vo  
VC1  
2/3VDD  
1/3VDD  
R4  
C1  
R1=R2=R3  
Figure 9. Relaxation Oscillator  
Windowed Comparator  
Figure 10 shows one approach to designing a windowed comparator using a single TP1942 chip. Choose  
different thresholds by changing the values of R1, R2, and R3. OutA provides an active-low undervoltage  
indication, and OutB gives an active-low overvoltage indication. ANDing the two outputs provides an active-high,  
power-good signal. When input voltage Vi reaches the overvoltage threshold VOH, the OutB gets low. Once Vi falls  
to the undervoltage threshold VUH, the OutA gets low. When VUH<Vi<VOH, the AND Gate gets high.  
V
V (R R R )/R  
r
1 2 3 1  
OH  
V
V (R R R )/(R R  
)
UH  
r
1
2
3
1
2
Vi  
R1  
R2  
R3  
TP1942  
+InA  
+InB  
-InA  
-InB  
Power  
Good  
OutA UnderVolt  
AND  
Gate  
Vr  
OverVolt  
OutB  
Figure 10. Windowed Comparator  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
SOT23-5 / SOT23-6  
Dimensions  
Dimensions  
In Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.000  
1.050  
0.300  
2.820  
1.500  
2.650  
0.100  
1.150  
0.400  
3.020  
1.700  
2.950  
0.000  
0.041  
0.012  
0.111  
0.059  
0.104  
0.004  
0.045  
0.016  
0.119  
0.067  
0.116  
D
E
E1  
e
0.950TYP  
0.037TYP  
e1  
L1  
θ
1.800  
0.300  
0°  
2.000  
0.460  
8°  
0.071  
0.012  
0°  
0.079  
0.024  
8°  
REV1.1  
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18  
TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
SC-70-5 / SC-70-6 (SOT353 / SOT363)  
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.000  
0.900  
0.150  
0.080  
2.000  
1.150  
2.150  
0.100  
1.000  
0.350  
0.150  
2.200  
1.350  
2.450  
0.000  
0.035  
0.006  
0.003  
0.079  
0.045  
0.085  
0.004  
0.039  
0.014  
0.006  
0.087  
0.053  
0.096  
C
D
E
E1  
e
0.650TYP  
0.026TYP  
e1  
L1  
θ
1.200  
0.260  
0°  
1.400  
0.460  
8°  
0.047  
0.010  
0°  
0.055  
0.018  
8°  
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REV1.0  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
SO-8 (SOIC-8)  
A2  
C
θ
L1  
A1  
e
E
D
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.100  
1.350  
0.330  
0.190  
4.780  
3.800  
5.800  
0.250  
1.550  
0.510  
0.250  
5.000  
4.000  
6.300  
0.004  
0.053  
0.013  
0.007  
0.188  
0.150  
0.228  
0.010  
0.061  
0.020  
0.010  
0.197  
0.157  
0.248  
C
E1  
D
E
E1  
e
1.270TYP  
0.050TYP  
L1  
0.400  
0°  
1.270  
8°  
0.016  
0°  
0.050  
8°  
θ
b
REV1.1  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
MSOP-8  
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A
0.800  
0.000  
0.760  
0.30 TYP  
0.15 TYP  
2.900  
0.65 TYP  
2.900  
4.700  
0.410  
0°  
1.200  
0.200  
0.970  
0.031  
0.000  
0.030  
0.012 TYP  
0.006 TYP  
0.114  
0.026  
0.114  
0.185  
0.016  
0°  
0.047  
0.008  
0.038  
A1  
A2  
b
E
E1  
C
D
3.100  
0.122  
e
e
b
E
3.100  
5.100  
0.650  
6°  
0.122  
0.201  
0.026  
6°  
E1  
L1  
θ
D
A1  
R1  
R
θ
L
L1  
L2  
www.3peakic.com  
REV1.0  
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TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
SO-14 (SOIC-14)  
Dimensions  
In Millimeters  
TYP  
Symbol  
MIN  
1.35  
0.10  
1.25  
0.36  
8.53  
5.80  
3.80  
MAX  
1.75  
0.25  
1.65  
0.49  
8.73  
6.20  
4.00  
A
A1  
A2  
b
1.60  
0.15  
1.45  
D
8.63  
6.00  
E
E1  
e
3.90  
1.27 BSC  
0.60  
L
0.45  
0°  
0.80  
8°  
L1  
L2  
θ
1.04 REF  
0.25 BSC  
REV1.1  
www.3peakic.com.cn  
22  
TP1941/TP1941N/TP1942/TP1944  
68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators  
Package Outline Dimensions  
TSSOP-14  
Dimensions  
In Millimeters  
E1  
E
Symbol  
MIN  
-
TYP  
MAX  
1.20  
0.15  
1.05  
0.28  
0.19  
5.06  
6.60  
4.50  
A
A1  
A2  
b
-
0.05  
0.90  
0.20  
0.10  
4.86  
6.20  
4.30  
-
1.00  
-
e
c
c
-
4.96  
D
D
E
6.40  
E1  
e
4.40  
0.65 BSC  
0.60  
L
0.45  
0.75  
A1  
L1  
L2  
R
1.00 REF  
0.25 BSC  
-
0.09  
0°  
-
R1  
θ
-
8°  
R
θ
L
L1  
L2  
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23  

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