TP2014 [3PEAK]

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators;


型号：	TP2014
厂家：	3PEAK
描述：	Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
文件：	总21页 (文件大小：1674K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Features

Descriptions

The TP201x family of push-pull output comparators

features the world-class lowest nano-power (250nA

maximum) and fast 13μs response time capability,

allowing operation from 1.6V to 5.5V. Input

common-mode range beyond supply rails makes the

TP201x an ideal choice for power-sensitive,

low-voltage (2-cell) applications.



Ultra-Low Supply Current: 200 nA per channel

Fast Response Time: 13 μs Propagation Delay,

with 100 mV Overdrive



Internal Hysteresis for Clean Switching

Offset Voltage: ± 2.0 mV Maximum

Offset Voltage Temperature Drift: 0.3 μV/°C

The TP201x push-pull output supports rail-to-rail output

swing and interfaces with TTL /CMOS logic, and are

capable of driving heavy DC or capacitive loads. The

internal input hysteresis eliminates output switching

due to internal input noise voltage, reducing current

draw. The output limits supply current surges and

dynamic power consumption while switching. Beyond

the rails input and rail-to-rail output characteristics allow

the full power-supply voltage to be used for signal

range.



Input Bias Current: 6 pA Typical



Input Common-Mode Range Extends 200 mV

Push-Pull Output with ±25 mA Drive Capability

Output Latch (TP2011N Only)

No Phase Reversal for Overdriven Inputs

Low Supply Voltage: 1.6V to 5.5V

Micro-sized packages provide options for portable and

space-restricted applications. The single (TP2011) is

available in SC70-5, and the dual (TP2012) is available

in SOT23-8.

Applications



Battery Monitoring / Management

Alarm and Monitoring Circuits

Peak and Zero-crossing Detectors

Threshold Detectors/Discriminators

Sensing at Ground or Supply Line

Logic Level Shifting or Translation

Window Comparators

The related TP2015/6/8 family of comparators from

3PEAK has an open-drain output. Used with a pull-up

resistor, these devices can be used as level-shifters for

any desired voltage up to 10V and in wired-OR logic.

3PEAK and the 3PEAK logo are registered trademarks of

3PEAK Incorporated. All other trademarks are the property of their

respective owners.

Oscillators and RC Timers

Mobile Communications and Notebooks

Ultra-Low-Power Systems

Related Products

DEVICE

TP2015

DESCRIPTION

Ultra-low 200nA, 13µs, 1.6V, ±2mV V_OS-MAX

Internal Hysteresis, RRI, Open-Drain Output

Comparators

/TP2016/TP2018

TP1931

/TP1932/TP1934

950ns, 3µA, 1.8V, ±2.5mV V_OS-MAX, Internal

Hysteresis, RRI, Push-Pull Output Comparators

TP1935

/TP1936/TP1938

950ns, 3µA, 1.8V, ±2.5mV V_OS-MAX, Internal

Hysteresis, RRI, Open-Drain Comparators

Fast 68ns, Low Power, Internal Hysteresis,

±3mV Maximum V_OS, – 0.2V to V_DD+ 0.2V RRI,

Push-Pull (CMOS/TTL) Output Comparators

TP1941/TP1941N

/TP1942/TP1944

Typical Application of TP201x Comparators

Fast 68ns, Low Power, Internal Hysteresis,

±3mV Maximum V_OS, – 0.2V to V_DD+ 0.2V RRI,

Open-Drain Output Comparators

TP1945/TP1945N

/TP1946/TP1948

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Pin Configuration(Top View)

Order Information

Marking

Information

Model Name

Order Number

Package

Transport Media, Quantity

TP2011-TR

TP2011-CR

TP2011-SR

TP2011U-TR

TP2011U-CR

TP2011U2-TR

TP2011N-TR

TP2012-TR

TP2012-SR

TP2012-VR

TP2014-SR

TP2014-TR

5-Pin SOT23

5-Pin SC70

8-Pin SOIC

Tape and Reel, 3000

Tape and Reel, 4000

Tape and Reel, 3000

Tape and Reel, 4000

Tape and Reel, 3000

Tape and Reel, 2500

Tape and Reel, 3000

C1TYW ⁽¹⁾

C1CYW ⁽¹⁾

2011S

TP2011

(1)

5-Pin SOT23

5-Pin SC70

5-Pin SOT23

6-Pin SOT23

8-Pin SOT23

8-Pin SOIC

C1AYW

TP2011U

(1)

C1BYW

(1)

TP2011U2

TP2011N

C1EYW

(1)

C1NYW

C12YW ⁽¹⁾

TP2012

TP2014

2012S

8-Pin MSOP

14-Pin SOIC

14-Pin TSSOP

2012V

TP2014S

TP2014T

Note (1): ‘YW’ is date coding scheme. 'Y' stands for calendar year, and 'W' stands for single workweek coding scheme.

Pin Functions

N/C: No Connection.

V^–(V_SS): Negative Power Supply. It is normally tied

to ground. It can also be tied to a voltage other than

ground as long as the voltage between V⁺and V^–is

from 1.6V to 5.5V. If it is not connected to ground,

bypass it with a capacitor of 0.1μF as close to the

part as possible.

–IN: Inverting Input of the Comparator. Voltage range of

this pin can go from V^–– 0.3V to V⁺+ 0.3V.

+IN: Non-Inverting Input of Comparator. This pin has the

same voltage range as –IN.

V+ (V_DD): Positive Power Supply. Typically the voltage is

from 1.6V to 5.5V. Split supplies are possible as long as

the voltage between V+ and V– is between 1.6V and

5.5V. A bypass capacitor of 0.1μF as close to the part as

possible should be used between power supply pins or

between supply pins and ground.

OUT: Comparator Output. The voltage range

extends to within millivolts of each supply rail.

LATCH: Active Low Latch enable. Latch enable

threshold is 1/2V+ above negative supply rail.

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Note 1

Absolute Maximum Ratings

Supply Voltage: V⁺– V^–....................................6.0V

Input Voltage............................. V^–– 0.3 to V⁺+ 0.3

Input Current: +IN, –IN, ^{Note 2}..........................±10mA

Output Current: OUT.................................... ±25mA

Output Short-Circuit Duration ^{Note 3}…......... Indefinite

Operating Temperature Range.......–40°C to 85°C

Maximum Junction Temperature................... 150°C

Storage Temperature Range.......... –65°C to 150°C

Lead Temperature (Soldering, 10 sec) ......... 260°C

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any

Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power

supply, the input current should be limited to less than 10mA.

Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply

voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The

specified values are for short traces connected to the leads.

ESD, Electrostatic Discharge Protection

Symbol

HBM

Parameter

Condition

Minimum Level

Unit

Human Body Model ESD

Charged Device Model ESD

ANSI/ESDA/JEDEC JS-001

ANSI/ESDA/JEDEC JS-002

CDM

Thermal Information

Package

R_ΘJA

R_ΘJC(Top)

Unit

8-Pin SOP

14-Pin SOP

14-Pin TSSOP

112.4

96.7

64.1

46.7

42.7

°C/W

108.1

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Electrical Characteristics

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T_A= 27°C.

V_DD= +1.6V to +5.5V, V_IN+= V_DD, V_IN-= 1.2V, C_L=15pF.

SYMBOL PARAMETER

CONDITIONS

MIN

1.6

TYP

MAX

5.5

UNITS

V_DD

V_OS

Supply Voltage

●

Input Offset Voltage ^{Note 1}

V_CM= 1.2V

V_CM= 0V

-3.0

-4.0

0.5

+3.0

+4.0

V_CM= Vdd

V_OSTC

V_HYST

I_B

Input Offset Voltage Drift ^{Note 1}

Input Hysteresis Voltage ^{Note 1}

Input Bias Current

V_CM= 1.2V

0.3

μV/°C

I_OS

Input Offset Current

R_IN

Input Resistance

> 100

GΩ

Differential

Common Mode

V_CM= V_SSto V_DD

C_IN

Input Capacitance

CMRR

V_CM

PSRR

V_OH

V_OL

I_SC

Common Mode Rejection Ratio

Common-mode Input Voltage Range

Power Supply Rejection Ratio

High-Level Output Voltage

Low-Level Output Voltage

Output Short-Circuit Current

Quiescent Current per Comparator

V^–

V⁺

I_OUT=-1mA

I_OUT=1mA

Sink or source current

●

V_DD-0.3

V_SS+0.3

250

200

I_Q

160

t_R

Rising Time

μs

t_F

Falling Time

Propagation Delay (Low-to-High)

Propagation Delay (High-to-Low)

Propagation Delay Skew ^{Note 2}

t_PD+

t_PD-

t_PD-SKEW

Overdrive=100mV, V_IN-=1.2V

Note 1: The input offset voltage is the average of the input-referred trip points. The input hysteresis is the difference between the input-referred

trip points.

Note 2: Propagation Delay Skew is defined as: t_PDSKEW= t_PD+- t_PD-.

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Typical Performance Characteristics

Input Offset Voltage vs. Temperature

Input Hysteresis Voltage vs. Temperature

2.5

-2.5

-5

1.8V

V_CM=1.2V

-25

V_CM=1.2V

-25

-50

100

-50

100

TEMPERATURE (

)

TEMPERATURE (

)

℃

Quiescent Current vs. Temperature

Propagation Delay vs. Temperature

1000

t_pd-@V_DD=5V

t_pd+@V_DD=5V

800

600

400

200

t_pd-@V_DD=1.8V

t_pd+@V_DD=1.8V

1.8V

V_CM=1.2V

-50 -25

V_CM=1.2V

-50

100

TEMPERATURE (

)

℃

TEMPERATURE (

)

℃

Propagation Delay Skew vs. Temperature

Propagation Delay vs. Overdrive Voltage

100

V_DD=5V

V_CM=2.5V

t_pd-

-4

1.8V

V_CM=1.2V

t_pd+

100

-8

-50

100

TEMPERATURE (

)

℃

Common Mode Voltage (mV)

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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Typical Performance Characteristics

Propagation Delay Skew vs. Overdrive Voltage

Propagation Delay vs. Overdrive Voltage

100

V_DD=5V

V_CM=2.5V

V_DD=1.8V

V_CM=0.9V

-5

-10

-15

-20

t_pd-

t_pd+

100

Common Mode Voltage (mV)

Propagation Delay Skew vs. Overdrive Voltage

Input Offset Voltage vs. Common Mode Voltage

V_DD=1.8V

V_CM=0.9V

2.5

-5

-2.5

-10

-15

-20

V_DD=5V

-5

100

Common Mode Voltage (V)

Common Mode Voltage (mV)

Input Offset Voltage vs. Common Mode Voltage

Input Hysteresis Voltage vs. Common Mode Voltage

2.5

-2.5

V_DD=1.8V

-5

V_DD=5V

0.5

1.5

Common Mode Voltage (V)

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Typical Performance Characteristics

Input Hysteresis Voltage vs. Common Mode Voltage

Quiescent Current vs. Common Mode Voltage

1000

800

600

400

200

V_DD=1.8V

V_DD=5V

0.5

1.5

Common Mode Voltage (V)

Quiescent Current vs. Common Mode Voltage

Propagation Delay V.S. Common Mode Voltage

1000

800

600

400

200

t_pd+

t_pd-

V_DD=1.8V

V_DD=5V

0.5

1.5

Common Mode Voltage (V)

Propagation Delay vs. Common Mode Voltage

Propagation Delay Skew vs. Common Mode Voltage

2.5

t_pd+

t_pd-

-2.5

V_DD=1.8V

V_DD=5V

-5

0.5

1.5

Common Mode Voltage (V)

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Typical Performance Characteristics

Propagation Delay Skew vs. Common Mode Voltage

Input Offset Voltage Distribution

60%

50%

40%

30%

20%

10%

1462 Samples

V_DD=5V

2.5

V_CM=1.2V

-2.5

V_DD=1.8V

-5

-6 -5 -4 -3 -2 -1

0.5

1.5

Input Offset Voltage (mV)

Common Mode Voltage (V)

Input Hysteresis Voltage Distribution

Quiescent Current Distribution

40%

35%

30%

25%

20%

15%

10%

60%

1462 Samples

V_DD=5V

1462 Samples

V_DD=5V

50%

40%

30%

20%

10%

V_CM=1.2V

10 11 12

140

160

180

200

220

240

260

Input Hysteresis Voltage (mV)

Quiscent Current (nA)

Low to High Propagation Delay Distribution

High to Low Propagation Delay Distribution

70%

45%

1462 Samples

40%

60%

50%

40%

30%

20%

10%

V_DD=5V

35%

V_CM=1.2V

30%

100mV overdrive

25%

20%

15%

10%

Propagation Low to High Delay (μs)

Propagation High to Low Delay (μs)

REV1.2

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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Typical Performance Characteristics

Propagation Delay Skew Distribution

Output Voltage Headroom vs. Output Load Current

50%

V_DD=5V

1462 Samples

V_DD=5V

45%

40%

35%

30%

25%

20%

15%

10%

V_CM=1.2V

Sourcing Current

100mV overdrive

Sinking Current

-2

Propagation Delay Skew (μs)

Output Load Current (mA)

Output Voltage Headroom vs. Output Load Current

Output Voltage Headroom vs. Supply Voltage

400

V_DD=1.8V

1.5

300

Sourcing Current

V_OH

200

0.5

100

Sinking Current

V_OL

I_OUT=±1mA

0.0

0.5

1.0

1.5

2.0

Output Load Current (mA)

Supply Voltage (V)

Output Short Current vs. Supply Voltage

I_sinking

I_sourcing

Supply Voltage (V)

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Operation

The TP201x family single-supply comparators feature

internal hysteresis, high speed, and low power. Input

signal range extends beyond the negative and positive

power supplies. The output can even extend all the way

to the negative supply. The input stage is active over

different ranges of common mode input voltage.

Rail-to-rail input voltage range and low-voltage

single-supply operation make these devices ideal for

portable equipment.

Applications Information

Inputs

The TP201x comparator family uses CMOS transistors at the input which prevent phase inversion when the input pins

exceed the supply voltages. Figure 1 shows an input voltage exceeding both supplies with no resulting phase

inversion.

Input Voltage

1KΩ

+In

Core

1KΩ

-In

Output Voltage

V_DD=5V

-2

Time (100μs/div)

Chip

Figure 1. Comparator Response to Input Voltage

Figure 2. Equivalent Input Structure

The electrostatic discharge (ESD) protection input structure of two back-to-back diodes and 1kΩ series resistors are

used to limit the differential input voltage applied to the precision input of the comparator by clamping input voltages

that exceed supply voltages, as shown in Figure 2. Large differential voltages exceeding the supply voltage should be

avoided to prevent damage to the input stage.

Internal Hysteresis

Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This

tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the parasitic

effects and noise, the TP201x implements internal hysteresis.

The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input

voltage. The difference between the trip points is the hysteresis. When the comparator’s input voltages are equal, the

hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the input out of

the region where oscillation occurs. Figure 3 illustrates the case where IN- is fixed and IN+ is varied. If the inputs were

reversed, the figure would look the same, except the output would be inverted.

REV1.2

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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

V_i

V_tr

V_i

V_tr

V_hyst=V_tr-V_tf

V_tr+V

V_hyst=V_tr-V_tf

V_tr+V

Hysteresis

Band

Hysteresis

Band

V_in-

^tf-V_in-

V_os=

V_tf

Time

V_DD

Non-Inverting Comparator Output

Inverting Comparator Output

Figure 3. Comparator’s hysteresis and offset

External Hysteresis

Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output chattering

when one input is slowly moving past the other. It also helps in systems where it is best not to cycle between high and

low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply

current.

Non-Inverting Comparator with Hysteresis

A non-inverting comparator with hysteresis requires a two-resistor network, as shown in Figure 4 and a voltage

reference (V_r) at the inverting input.

Figure 4. Non-Inverting Configuration with Hysteresis

When V_iis low, the output is also low. For the output to switch from low to high, V_imust rise up to V_tr. When V_iis high,

the output is also high. In order for the comparator to switch back to a low state, V_imust equal V_tfbefore the

non-inverting input V+ is again equal to V_r.





 (V

 V

)

 V







V 

 V  V



hyst

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Inverting Comparator with Hysteresis

The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply

voltage (V_DD), as shown in Figure 5.

Figure 5. Inverting Configuration with Hysteresis

When V_iis greater than V₊, the output voltage is low. In this case, the three network resistors can be presented as

paralleled resistor R₂|| R₃in series with R₁. When V_iat the inverting input is less than V₊, the output voltage is high.

The three network resistors can be represented as R₁||R₃in series with R₂.









 V  V



hyst



Low Input Bias Current

The TP201x family is a CMOS comparator family and features very low input bias current in pA range. The low input

bias current allows the comparators to be used in applications with high resistance sources. Care must be taken to

minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details.

PCB Surface Leakage

In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be

considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity

conditions, a typical resistance between nearby traces is 10¹²Ω. A 5V difference would cause 5pA of current to flow,

which is greater than the TP201x’s input bias current at +27°C (±6pA, typical). It is recommended to use multi-layer

PCB layout and route the comparator’s -IN and +IN signal under the PCB surface.

The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is

biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for Inverting

configuration application.

1. For Non-Inverting Configuration:

a) Connect the non-inverting pin (V_IN+) to the input with a wire that does not touch the PCB surface.

b) Connect the guard ring to the inverting input pin (V_IN–). This biases the guard ring to the same reference as the

comparator.

REV1.2

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2. For Inverting Configuration:

a) Connect the guard ring to the non-inverting input pin (V_IN+). This biases the guard ring to the same reference voltage as

the comparator (e.g., V_DD/2 or ground).

b) Connect the inverting pin (V_IN–) to the input with a wire that does not touch the PCB surface.

Figure 6. Example Guard Ring Layout for Inverting Comparator

Ground Sensing and Rail to Rail Output

The TP201x family implements a rail-to-rail topology that is capable of swinging to within 10mV of either rail. Since the

inputs can go 300mV beyond either rail, the comparator can easily perform ‘true ground’ sensing.

The maximum output current is a function of total supply voltage. As the supply voltage of the comparator increases,

the output current capability also increases. Attention must be paid to keep the junction temperature of the IC below

150°C when the output is in continuous short-circuit condition. The output of the amplifier has reverse-biased ESD

diodes connected to each supply. The output should not be forced more than 0.5V beyond either supply, otherwise

current will flow through these diodes.

ESD

The TP201x family has reverse-biased ESD protection diodes on all inputs and output. Input and output pins can not

be biased more than 300mV beyond either supply rail.

Power Supply Layout and Bypass

The TP201x family’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for

good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide large,

slow currents. This bulk capacitor can be shared with other analog parts.

Good ground layout improves performance by decreasing the amount of stray capacitance and noise at the

comparator’s inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place

external components as close to the comparator’ pins as possible.

Proper Board Layout

The TP201x family is a series of fast-switching, high-speed comparator and requires high-speed layout considerations.

For best results, the following layout guidelines should be followed:

1. Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane.

2. Place a decoupling capacitor (0.1μF ceramic, surface-mount capacitor) as close as possible to supply.

3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback

around the comparator. Keep inputs away from the output.

4. Solder the device directly to the PCB rather than using a socket.

5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)

placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some

degradation to propagation delay when the impedance is low. The topside ground plane should be placed

between the output and inputs.

6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs

from the outputs.

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Typical Applications

IR Receiver

The TP2011 is an ideal candidate to be used as an infrared receiver shown in Figure 7. The infrared photo diode

creates a current relative to the amount of infrared light present. The current creates a voltage across R_D. When this

voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions. Optional R_o

provides additional hysteresis for noise immunity.

V_DD

R_o

R₁

TP2011

V_o

R₂

R_D

Figure 7. IR Receiver

Relaxation Oscillator

A relaxation oscillator using TP2011 is shown in Figure 8. Resistors R₁and R₂set the bias point at the comparator's

inverting input. The period of oscillator is set by the time constant of R₄and C₁. The maximum frequency is limited by

the large signal propagation delay of the comparator. TP2011’s low propagation delay guarantees the high frequency

oscillation.

If the inverted input (V_C1) is lower than the non-inverting input (V_A), the output is high which charges C₁through R₄until

V_C1is equal to V_A. The value of V_Aat this point is

 R

|| R  R



At this point the comparator switches pulling down the output to the negative rail. The value of V_Aat this point is

 R || R



 R || R

If R₁=R₂=R₃, then V_A1=2V_DD/3, and V_A2= V_DD/3

The capacitor C₁now discharges through R₄, and the voltage V_Cdecreases till it is equal to V_A2, at which point the

comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to

discharge C₁from 2V_DD/3 to V_DD/3. Hence the frequency is:

Freq 

2  ln2  R  C

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

V_DD

R₃

V_O

R₁

R₂

T2011

V_A

V_C1

V_o

V_C1

2/3V_DD

1/3V_DD

R₄

C₁

R₁=R₂=R₃

Figure 8. Relaxation Oscillator

Windowed Comparator

Figure 9. shows one approach to designing a windowed comparator using a single TP2012 chip. Choose different

thresholds by changing the values of R1, R2, and R3. OutA provides an active-low undervoltage indication, and OutB

gives an active-low overvoltage indication. ANDing the two outputs provides an active-high, power-good signal. When

input voltage V_ireaches the overvoltage threshold V_OH, the OutB gets low. Once V_ifalls to the undervoltage threshold

V_UH, the OutA gets low. When V_UH<V_i<V_OH, the AND Gate gets high.

 V  (R  R  R )/R

1 2 3 1

 V  (R  R  R )/(R  R

)

V_i

R₁

R₂

R₃

TP2012

+InA

+InB

-InA

-InB

Power

Good

OutA UnderVolt

AND

Gate

V_r

OverVolt

OutB

Figure 9. Windowed Comparator

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

SOT23-5 / SOT23-6

Dimensions

In Inches

In Millimeters

Symbol

Min

Max

Min

Max

0.000

1.050

0.300

2.820

1.500

2.650

0.100

1.150

0.400

3.020

1.700

2.950

0.000

0.041

0.012

0.111

0.059

0.104

0.004

0.045

0.016

0.119

0.067

0.116

0.950TYP

0.037TYP

1.800

0.300

0°

2.000

0.460

8°

0.071

0.012

0°

0.079

0.024

8°

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

SC-70-5 / SC-70-6 (SOT353 / SOT363)

Dimensions

Dimensions In

Inches

In Millimeters

Symbol

Min

Max

Min

Max

0.000

0.900

0.150

0.080

2.000

1.150

2.150

0.100

1.000

0.350

0.150

2.200

1.350

2.450

0.000

0.035

0.006

0.003

0.079

0.045

0.085

0.004

0.039

0.014

0.006

0.087

0.053

0.096

0.650TYP

0.026TYP

1.200

0.260

0°

1.400

0.460

8°

0.047

0.010

0°

0.055

0.018

8°

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

SO-8 (SOIC-8)

Dimensions

Dimensions In

Inches

In Millimeters

Symbol

Min

Max

Min

Max

0.100

1.350

0.330

0.190

4.780

3.800

5.800

0.250

1.550

0.510

0.250

5.000

4.000

6.300

0.004

0.053

0.013

0.007

0.188

0.150

0.228

0.010

0.061

0.020

0.010

0.197

0.157

0.248

1.270TYP

0.050TYP

0.400

0°

1.270

8°

0.016

0°

0.050

8°

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

MSOP-8

Dimensions

Dimensions In

Inches

In Millimeters

Symbol

Min

Max

Min

Max

0.800

0.000

0.760

0.30 TYP

0.15 TYP

2.900

0.65 TYP

2.900

4.700

0.410

0°

1.200

0.200

0.970

0.031

0.000

0.030

0.012 TYP

0.006 TYP

0.114

0.026

0.114

0.185

0.016

0°

0.047

0.008

0.038

3.100

0.122

3.100

5.100

0.650

6°

0.122

0.201

0.026

6°

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

SO-14 (SOIC-14)

Dimensions

In Millimeters

TYP

Symbol

MIN

1.35

0.10

1.25

0.36

8.53

5.80

3.80

MAX

1.75

0.25

1.65

0.49

8.73

6.20

4.00

1.60

0.15

1.45

8.63

6.00

3.90

1.27 BSC

0.60

0.45

0°

0.80

8°

1.04 REF

0.25 BSC

REV1.2

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TP2011/TP2012/TP2014

Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators

Package Outline Dimensions

TSSOP-14

Dimensions

In Millimeters

Symbol

MIN

TYP

MAX

1.20

0.15

1.05

0.28

0.19

5.06

6.60

4.50

0.05

0.90

0.20

0.10

4.86

6.20

4.30

1.00

4.96

6.40

4.40

0.65 BSC

0.60

0.45

0.75

1.00 REF

0.25 BSC

0.09

0°

8°

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TP2014 [3PEAK]

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