TP5551 [3PEAK]

Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps;
TP5551
型号: TP5551
厂家: 3PEAK    3PEAK
描述:

Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps

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TP5551/TP5552/TP5554  
3PEAK  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Description  
Features  
The family of amplifier are single/dual/quad chopper  
stabilized zero-drift operational amplifier optimize for  
single or dual supply operation from 1.8V to 5.5V and  
±0.9V to ±2.75V. TP555X features very low input offset  
voltage and low noise with no 1/f noise corner down to  
0.1Hz. The TP555X is designed to have ultra low offset  
voltage and offset temperature drift, wide gain  
bandwidth and rail-to-rail input/output swing while  
minimizing power consumption.  
Low Offset Voltage: 5μV(max)  
Zero Drift: 0.05 µV/°C (max)  
No 1/f Noise Corner Down to 0.1Hz  
- Input Noise Voltage . . . . . . . .. .15 nV/Hz @ 1kHz  
-0.1Hz to 10Hz Noise Voltage . . . . . . . . . . 350nVP-P  
Slew Rate: 2.5 V/μs  
This family amp TP555X can provide very low offset  
voltage(max 5μV) and near-zero drift over time and  
temperature with excellent CMRR and PSRR.  
Bandwidth: 3.5MHz  
Low Supply Current: 500A per Amplifier  
Low Input Bias Current: 50pA Typical  
Rail-to-Rail Output Voltage Range  
High gain, CMRR, PSRR: 130 dB  
7K HBM ESD Rating  
The TP5551(single version) is available in SOT23-5,  
SC70-5 and SO-8 packages. The TP5552(dual version)  
is offered in MOSP-8, SO-8 package. The TP5554(quad  
version) is available in TSSOP-14,SO-14 package. All  
versions are specified for operation from -40°C to 125°C .  
40°C to 125°C Operation Range  
3PEAK and the 3PEAK logo are registered trademarks of  
3PEAK INCORPORATED. All other trademarks are the property of  
their respective owners.  
Applications  
Medical Instrumentation  
Temperature Measurements  
Related Zero-Drift RRO Op-amps  
Precision current sensing  
Precision Low Drift, Low Frequency ADC Drivers  
Process Control Systems  
eN @1kHz  
Supply  
Single  
GBW  
( nV/√Hz )  
Vos(Max)  
Current  
Precision Voltage Reference Buffers  
TP555X  
TP553X  
5μV  
560 μA  
12  
55  
3.5 MHz  
350kHz  
10μV  
34 μA  
Pin Configuration(Top View)  
TP5551  
SOT23-5/SC70-5  
(-T and -C Suffixes)  
OffsetVoltage Distribution  
35  
30  
25  
20  
15  
10  
5
1
2
3
5
4
OUT  
V-  
V+  
-IN  
A
+IN  
TP5551U  
SOT23-5/SC70-5  
(-T and -C Suffixes)  
1
2
3
5
4
+IN  
V-  
V+  
0
-IN  
OUT  
Offset Voltage(μV)  
Pin Configuration(Top View)  
www.3peakic.com.cn  
REV B  
1
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
TP5552  
8-Pin SOIC/MSOP  
(-S and -V Suffixes)  
TP5551  
8-Pin SOIC  
(-S Suffix)  
TP5554  
14-Pin SOIC/TSSOP  
(-S and -T Suffixes)  
1
2
3
4
5
6
7
14  
13 In D  
Out A  
In A  
In A  
Vs  
Out D  
1
2
3
4
8
7
6
5
Out A  
Vs  
1
2
3
4
8
7
6
5
NC  
In  
In  
Vs  
NC  
In A  
Out B  
In B  
In B  
A
Vs  
Out  
NC  
A
B
D
C
12  
11  
In D  
Vs  
In A  
Vs  
B
10 In C  
In B  
In B  
Out B  
9
8
In C  
Out C  
Order Information  
Marking  
Information  
Model Name  
Order Number  
Package  
MSL  
Transport Media, Quantity  
TP5551-TR  
TP5551L1-TR  
TP5551-CR  
TP5551-SR  
TP5551U-TR  
TP5551U-CR  
TP5552-SR  
TP5552L1-SR  
TP5552-VR  
TP5554-SR  
TP5554-TR  
SOT23-5  
SOT23-5  
SC70-5  
SO-8  
E51T  
3
1
3
3
3
3
3
1
3
3
3
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 3000  
Tape and Reel, 4000  
Tape and Reel, 3000  
E51T  
TP5551  
51C  
TP5551  
E51U  
SOT23-5  
SC70-5  
SO-8  
TP5551U  
TP5552  
TP5554  
51V  
Tape and Reel, 3000  
Tape and Reel, 4000  
TP5552  
TP5552  
TP5552  
TP5554  
TP5554  
SO-8  
Tape and Reel, 4000  
Tape and Reel, 3000  
Tape and Reel, 2500  
Tape and Reel, 3000  
MSOP-8  
SO-14  
TSSOP-14  
Note 1  
Absolute Maximum Ratings  
Supply Voltage: .....................................................7V  
Input Voltage: ....................... ……V0.3 to V+ + 0.3  
Input Current: +IN, IN Note 2........................... ±20mA  
Output Current: OUT...................................... ±60mA  
Output Short-Circuit Duration Note 3…....... Indefinite  
Current at Supply Pins……………............... ±50mA  
Operating Temperature Range.......40°C to 125°C  
Maximum Junction Temperature................... 150°C  
Storage Temperature Range.......... 65°C to 150°C  
Lead Temperature (Soldering, 10 sec) ......... 260°C  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to  
any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.  
Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the  
power supply, the input current should be limited to less than 10mA.  
Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power  
supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to  
the package. The specified values are for short traces connected to the leads.  
ESD, Electrostatic Discharge Protection  
Symbol  
Parameter  
Condition  
Minimum Level  
Unit  
HBM  
CDM  
Human Body Model ESD  
ANSI/ESDA/JEDEC JS-001  
ANSI/ESDA/JEDEC JS-002  
7
2
kV  
kV  
Charged Device Model ESD  
REV B  
www.3peakic.com.cn  
2
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Electrical Characteristics  
At TA = 27°C, VDD=5V, RL=10K, Vcm=VDD/2, unless otherwise noted.  
VDD=5V,  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
SYMBOL  
VDD  
Supply Voltage Range  
1.8  
5.5  
V
TP5551  
1200  
1400  
1600  
1750  
950  
μA  
μA  
μA  
μA  
μA  
TP5551, TA = -40°C to 85°C  
TP5551, TA = -40°C to 125°C  
TP5552/4  
IQ  
Quiescent current per amplifier  
550  
TP5552/4, TA = -40°C to 85°C  
1150  
TP5552/4, TA = -40°C to  
125°C  
1300  
μA  
±1  
±5  
μV  
μV  
VOS  
input Offset Voltage  
vs temperature  
TA = -40°C to 125°C  
±10  
0.05  
dVos/dT  
0.008  
μV/°C  
dB  
Vs=+1.8V to +5.5V  
95  
85  
PSRR  
vs power supply  
Vs=+1.8V to +5.5V, TA =  
-40°C to 125°C  
input voltage noise, f=0.01Hz to 1Hz  
input voltage noise, f=0.1Hz to 10Hz  
Input voltage noise density, f=1kHz  
0.1  
0.35  
15  
μVpp  
μVpp  
VN (p-p)  
VN  
nV/Hz  
Input capacitor Differential  
Input capacitor Common-Mode  
Input Current  
3
pF  
pF  
pA  
pA  
pA  
V
CIN  
2
±50  
±200  
±100  
IB  
Over temperature  
IOS  
Input offset current  
VCM  
Common-mode voltage range  
Common-mode rejection ratio  
(V-)-0.1  
110  
(V+)+0.1  
CMRR  
VS=5V, VCM = 0.5V to 4.5V  
VS=5V, VCM = 0V to 5V  
VS=5V, VCM = 0V to 5V, TA =  
-40°C to 125°C  
130  
120  
dB  
dB  
100  
CMRR  
Common-mode rejection ratio  
90  
dB  
RL=10kΩ  
10  
25  
30  
mV  
mV  
mA  
MHz  
V/μs  
μs  
VO  
Output Voltage Swing from rail  
RL=10kΩ, TA = -40°C to 125°C  
ISC  
GBW  
SR  
tor  
Short-circuit current  
Unity Gain Bandwidth  
Slew rate  
±50  
3.5  
2.5  
35  
CL=100pF  
G=+1, CL=100pF  
G=-10  
Overload recovery time  
Settling time to 0.01%  
ts  
CL=100pF  
20  
μs  
(V-)+100mV<VO<(V+)-100mV,  
RL = 100kΩ  
100  
90  
120  
dB  
AVO  
Open-Loop Voltage Gain  
(V-)+100mV<VO<(V+)-100mV,  
RL = 100kΩ, TA = -40°C to  
125°C  
dB  
SOT23-5  
200  
210  
158  
250  
83  
MSOP-8  
SO-8  
Thermal Resistance Junction to  
Ambient  
θJA  
°C/W  
SC70-5  
SO-14  
TSSOP-14  
100  
www.3peakic.com.cn  
REV B  
3
TP5531/TP5532  
3PEAK  
Typical Performance Characteristics  
Dual/Quad, zero drift, RIRO Op-amps  
OffsetVoltage Distribution  
SupplyCurrentDistribution  
35  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
0
0
500 510 520 530 540 550 560 570 580 590 600  
Supply Curent(μA)  
Offset Voltage(μV)  
QuiesentCurrentvs Temperature  
Voltage Noise Spectral Density vs Frequency  
1000  
100  
900  
800  
700  
600  
500  
400  
300  
200  
100  
10  
1
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0.01  
0.1  
1
10  
100  
1k  
10k  
Frequency (Hz)  
Temperature(°C)  
CMRR vs FREQUENCY  
OPEN-LOOPGAIN vs FREQUENCY  
120  
100  
80  
60  
40  
20  
0
100  
140  
120  
100  
80  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
60  
40  
20  
-20  
0
10  
100  
1k  
10k  
100k  
1M  
10M  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency(Hz)  
Frequency(Hz)  
www.3peakic.com.cn  
REV B  
4
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Typical Performance Characteristics(continue)  
Positive Over-Voltage Recovery  
Small-Scale Step Response  
G=+1  
RL=10KΩ  
Input  
Output  
Time (50μs/div)  
Time (5μs/div)  
Negative Over-Voltage Recovery  
Large-Scale Step Response  
G=+1  
RL=10KΩ  
Input  
Output  
Time (50μs/div)  
Time (10μs/div)  
www.3peakic.com.cn  
REV B  
5
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
TYPICAL APPLICATIONS  
-
TP5551  
+
Single Supply, High Gain Amplifier, AV = 10,000 V/V  
-
TP5551  
+
Thermistor Measurement  
REV B  
www.3peakic.com.cn  
6
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Pin Functions  
-IN: Inverting Input of the Amplifier.  
5.5V. A bypass capacitor of 0.1μF as close to the part as  
possible should be used between power supply pins or  
between supply pins and ground.  
+IN: Non-Inverting Input of Amplifier.  
V- or -Vs: Negative Power Supply. It is normally tied to  
OUT: Amplifier Output. The voltage range extends to  
ground. It can also be tied to a voltage other than  
ground as long as the voltage between V+ and Vis from  
1.8V to 5.5V. If it is not connected to ground, bypass it  
with a capacitor of 0.1μF as close to the part as  
possible.  
within mV of each supply rail.  
V+ or +Vs: Positive Power Supply. Typically the voltage  
is from 1.8V to 5.5V. Split supplies are possible as long  
as the voltage between V+ and Vis between 1.8V and  
Operation  
The TP5551/2/4 op amps are zero drift, rail-to-rail operation amplifiers that can be run from a single-supply voltage.  
They use an auto-calibration technique with a time-continuous 3.5MHz op amp in the signal path while consuming only  
550μA of supply current per channel. This amplifier is zero-corrected with an 150kHz clock. Upon power-up, the  
amplifier requires approximately 100μs to achieve specified Vos accuracy. This design has no aliasing or flicker noise.  
Applications Information  
Rail-To-Rail Input And Output  
The TP5551/2/4 feature rail-to-rail input and output with a supply voltage from 1.8V to 5.5 V. This allows the amplifier  
inputs to have a wide common mode range(50mV beyond supply rails)while maintaining high CMRR(120dB) and  
maximizes the signal to noise ratio of the amplifier by having the VOH and VOL levels be at the V+ and V- rails,  
respectively.  
Input Protection  
The TP5551/2/4 have internal ESD protection diodes that are connect between the inputs and supply rail. When either  
input exceeds one of the supply rails by more than 300mV, the ESD diodes become forward biased and large amounts  
of current begin to flow through them. Without current limiting, this excessive fault current causes permanent damage  
to the device. Thus an external series resistor must be used to ensure the input currents never exceed 10mA (see  
Figure xx).  
V+  
Current-limiting resistor  
required if input voltage  
exceeds supply rails by  
+2.5V  
TP5551  
-2.5V  
500Ω  
>0.5V.  
IN+  
IN-  
Ioverload  
10mA max  
VIN  
Vout  
500Ω  
5kΩ  
V-  
INPUT ESD DIODE CURRENT LIMITING- UNITY GAIN  
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REV B  
7
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Low Input Referred Noise  
Flicker noise, as known as 1/f noise, is inherent in semiconductor devices and increases as frequency decreases. So  
at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-Hertz frequencies or dc precision  
application.  
The TP5551/2/4 amplifiers are chopper stabilized amplifiers, the flicker noise is reduced greatly because of this  
technique. This reduction in 1/f noise allows the TP5551/2/4 to have much lower noise at dc and low frequency  
compared to standard low noise amplifier.  
Residual voltage ripple  
The chopping technique can be used in amplifier design due to the internal notch filter. Although the chopping related  
voltage ripple is suppressed, higher noise spectrum exists at the chopping frequency and its harmonics due to residual  
ripple.  
So if the frequency of input signal is nearby the chopping frequency, the signal maybe interfered by the residue ripple.  
To further suppress the noise at the chopping frequency, it is recommended that a post filter be placed at the output of  
the amplifier.  
Broad Band And External Resistor Noise Considerations  
The total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise  
from the amplifier, input current noise from the amplifier, and thermal (Johnson) noise from the external resistors used  
around the amplifier. These noise sources are not correlated with each other and their combined noise can be  
summed in a root sum squared manner. The full equation is given as:  
en total [en2 4kTRs (in Rs )2 ]1/2  
Where:  
en= the input voltage noise density of the amplifier.  
in= the input current noise of the amplifier.  
RS= source resistance connected to the noninverting terminal.  
k= Boltzmanns constant (1.38x10-23J/K). T= ambient temperature in Kelvin (K).  
The total equivalent rms noise over a specific bandwidth is expressed as:  
en,rms en total BW  
The input voltage noise density (en) of the TP555x is 55 nV/Hz, and the input current noise can be neglected. When  
the source resistance is 190 kΩ, the voltage noise contribution from the source resistor and the amplifier are equal.  
With source resistance greater than 190 kΩ, the overall noise of the system is dominated by the Johnson noise of the  
resistor itself.  
High Source Impedance Application  
The TP5551/2/4 uses switches at the chopper amplifier input, the input signal is chopped at 125kHz to reduce input  
offset voltage down to 10µV. The dynamic behavior of these switches induces a charge injection current to the input  
terminals of the amplifier. The charge injection current has a DC path to ground through the resistances seen at the  
input terminals of the amplifier. Higher input impedance cause an apparent shift in the input bias current of the  
amplifier.  
Because the chopper amplifier has charge injection currents at each terminal, the input offset current will be larger  
than standard amplifiers. The Ios of TP5551/2/4 are 150pA under the typical condition. So the input impedance should  
be balanced across each input(see Figure xx). The input impedance of the amplifier should be matched between the  
IN+ and IN- terminals to minimize total input offset current. Input offset currents show up as an additional output offset  
voltage, as shown in the following equation:  
REV B  
www.3peakic.com.cn  
8
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
vos,total vos Rf Ios  
For a gain configure using 1MΩ feedback resistor, a 150pA total input offset current will have an additional output  
offset voltage of 0.15mV. By keeping the input impedance low and balanced across the amplifier inputs, the input  
offset current effect will be suppress efficiently.  
Ri  
Rf  
Vref  
+2.5V  
TP5551  
-2.5V  
Vout  
Rs  
VIN  
Rb  
Vref  
Figxx Circuit Implication for reducing Input offset current effect  
PCB Surface Leakage  
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be  
considered. Surface leakage is caused by humidity, dust or other contamination on the board. It is recommended to  
use multi-layer PCB layout and route the OPA’s -IN and +IN signal under the PCB surface.  
The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is  
biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 2 for Inverting  
Gain application.  
1. For Non-Inverting Gain and Unity-Gain Buffer:  
a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface.  
b) Connect the guard ring to the inverting input pin (VIN). This biases the guard ring to the Common Mode input voltage.  
2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors):  
a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the  
op-amp (e.g., VDD/2 or ground).  
b) Connect the inverting pin (VIN) to the input with a wire that does not touch the PCB surface.  
Guard Ring  
VIN+  
VIN-  
+VS  
Figure  
The Layout of Guard Ring  
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REV B  
9
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
SOT23-5 / SOT23-6  
D
A2  
A1  
θ
L1  
e
Dimensions  
In Millimeters  
Dimensions  
In Inches  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.000  
1.050  
0.300  
2.820  
1.500  
2.650  
0.100  
1.150  
0.400  
3.020  
1.700  
2.950  
0.000  
0.041  
0.012  
0.111  
0.059  
0.104  
0.004  
0.045  
0.016  
0.119  
0.067  
0.116  
E1  
D
E
E
E1  
e
0.950TYP  
0.037TYP  
e1  
L1  
θ
1.800  
0.300  
0°  
2.000  
0.460  
8°  
0.071  
0.012  
0°  
0.079  
0.024  
8°  
b
e1  
REV B  
www.3peakic.com.cn  
10  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
SC-70-6 (SOT363)  
D
A2  
A1  
C
θ
L1  
e
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.000  
0.900  
0.150  
0.080  
2.000  
1.150  
2.150  
0.100  
1.000  
0.350  
0.150  
2.200  
1.350  
2.450  
0.000  
0.035  
0.006  
0.003  
0.079  
0.045  
0.085  
0.004  
0.039  
0.014  
0.006  
0.087  
0.053  
0.096  
C
E1  
D
E
E
E1  
e
0.650TYP  
0.026TYP  
e1  
L1  
θ
1.200  
0.260  
0°  
1.400  
0.460  
8°  
0.047  
0.010  
0°  
0.055  
0.018  
8°  
b
e1  
www.3peakic.com.cn  
REV B  
11  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
SO-8 (SOIC-8)  
A2  
C
θ
L1  
A1  
e
E
D
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A1  
A2  
b
0.100  
1.350  
0.330  
0.190  
4.780  
3.800  
5.800  
0.250  
1.550  
0.510  
0.250  
5.000  
4.000  
6.300  
0.004  
0.053  
0.013  
0.007  
0.188  
0.150  
0.228  
0.010  
0.061  
0.020  
0.010  
0.197  
0.157  
0.248  
E1  
C
D
E
E1  
e
1.270 TYP  
0.050 TYP  
b
L1  
θ
0.400  
0°  
1.270  
8°  
0.016  
0°  
0.050  
8°  
REV B  
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12  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
MSOP-8  
Dimensions  
Dimensions In  
Inches  
In Millimeters  
Symbol  
Min  
Max  
Min  
Max  
A
0.800  
0.000  
0.760  
0.30 TYP  
0.15 TYP  
2.900  
0.65 TYP  
2.900  
4.700  
0.410  
0°  
1.200  
0.200  
0.970  
0.031  
0.000  
0.030  
0.012 TYP  
0.006 TYP  
0.114  
0.026  
0.114  
0.185  
0.016  
0°  
0.047  
0.008  
0.038  
E
E1  
A1  
A2  
b
C
D
3.100  
0.122  
e
b
e
E
3.100  
5.100  
0.650  
6°  
0.122  
0.201  
0.026  
6°  
D
E1  
L1  
θ
A1  
R1  
R
θ
L
L1  
L2  
www.3peakic.com.cn  
REV B  
13  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
TSSPO-14  
Dimensions  
In Millimeters  
E1  
E
Symbol  
MIN  
-
TYP  
MAX  
1.20  
0.15  
1.05  
0.28  
0.19  
5.06  
6.60  
4.50  
A
A1  
A2  
b
-
0.05  
0.90  
0.20  
0.10  
4.86  
6.20  
4.30  
-
1.00  
-
e
c
c
-
4.96  
D
D
E
6.40  
E1  
e
4.40  
0.65 BSC  
0.60  
L
0.45  
0.75  
A1  
L1  
L2  
R
1.00 REF  
0.25 BSC  
-
0.09  
0°  
-
R1  
θ
-
8°  
R
θ
L
L1  
L2  
REV B  
www.3peakic.com.cn  
14  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Package Outline Dimensions  
SO-14 (SOIC-14)  
D
Dimensions  
In Millimeters  
TYP  
Symbol  
MIN  
1.35  
0.10  
1.25  
0.36  
8.53  
5.80  
3.80  
MAX  
1.75  
0.25  
1.65  
0.49  
8.73  
6.20  
4.00  
A
A1  
A2  
b
1.60  
E1  
E
0.15  
1.45  
D
8.63  
6.00  
e
b
E
E1  
e
3.90  
1.27 BSC  
0.60  
L
0.45  
0°  
0.80  
8°  
A2  
A
L1  
L2  
θ
1.04 REF  
0.25 BSC  
A1  
L
L1  
θ
L2  
www.3peakic.com.cn  
REV B  
15  
TP5551/TP5552/TP5554  
Ultra Low Noise, 3.5MHz, Zero Drift, RRIO Op-amps  
Revision History  
2018/8/30 Rev B  
Update Full Temperature Specification  
REV B  
www.3peakic.com.cn  
16  

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