TPF142-VR [3PEAK]
One CVBS and One Full-HD Composite Video Filter Driver;
| 型号： | TPF142-VR |
| 厂家： | 
3PEAK |
| 描述： | One CVBS and One Full-HD Composite Video Filter Driver |
| 文件： | 总13页 (文件大小：382K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Description
Features
TPF142 is
a specially designed for consumer
1-SDTV Video Filter Support CVBS
applications, high-performance, low-cost video
reconstruction filter, it combine excellent video
performance and low power consumption perfectly. It
incorporates one standard-definition (CVBS) and one
high-definition (HD) filter channels. All filters feature
sixth-order Butterworth characteristics that are useful
as digital-to-analog converter (DAC) reconstruction
filters or as analog-to-digital converter (ADC)
anti-aliasing filters. The HD filters can be bypassed to
support filters. The HD filters can be bypassed to
support 1080p60 video or up to quad extended
graphics array (QXGA) RGB video.
1-HDTV Video Filter Support Y'Pb'Pr'-1080p, R'G'B' or
VGA/SVGA/XGA
Optimized 6th-order Butterworth Video reconstruction
filter：
CVBS Channel: -3dB at 9MHz
HD Channel: -3dB ≥ 72MHz
Support Multiple Input Biasing:
-
-
-
Provide 80-mV Level-Shift when DC-Coupled
Transparent Input Clamping when AC-Coupled
Support External DC Biasing when AC-Coupled
As part of the TP142 flexibility, the input can be
configured for ac- or dc-coupled inputs. The 84-mV
output level shift allows for a full sync dynamic range at
the output with 0-V input. The ac-coupled modes
include a transparent sync-tip clamp option for
composite video (CVBS), Y', and G'B'R' signals. AC-
coupled biasing for C'/P'B/P'R channels can easily be
achieved by adding an external resistor to VS+.
Very Low Quiescent Current: 14.5 mA(at 3.3V, Typical)
6dB Gain(2V/V), Rail TO Rail Output
AC- or DC-Coupled Output Driving Dual Video Loads
(75Ω)
Wide Power Supply: +3.0V to +5.5V Single Supply
Robust ESD Protection:
-
Robust 8kV – HBM and 2kV – CDM ESD Rating
The TP142 rail-to-rail output stage with 6-dB gain
allows for both ac and dc line driving. The ability to
drive two lines, or 75-Ω loads, allows for maximum
flexibility as a video line driver. The 14.5-mA total
quiescent current at 3.3 V makes it an excellent choice
for power-sensitive video applications.
Green Product, MSOP-8 and TSSOP-14 Package
Applications
Video Signal Amplification
Set-Top Box Video Driver
PVR、DVD Player Video Buffer
Video Buffer for Portable or USB-Powered Video
Devices
TPF142 is available in MSOP-8 package (TPF142-VR)
and TSSOP-14 package (TPF142-TR). Its operation
temperature range is from −40°C to +85°C.
Related Resources
AN-1201: Application notes of TPF1x
HDTV
Function Block
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Order Information
Operating
Order
Marking
Transport Media,
Quantity
Temperature
Range
Package
Number
Information
TPF142-VR
TPF142-TR
-40 to 85°C
-40 to 85°C
8-Pin MSOP
TPF142
TPF142
Tape and Reel, 3,000
Tape and Reel, 3,000
14-Pin TSSOP
Pin configuration(Top View)
Pin Name
Function
CVBS IN
SD video input for CVBS signal, LPF = 9 MHz
Disable Full-HD channel. Logic high disables the
FHD channel and logic low enables the FHD
channel. This pin defaults to logic high if left
open.
DIS FHD
FHD IN
+VS
Full-HD video input, LPF = 72 MHz
Positive Power Supply
GND
Ground
FHD OUT
Full-HD video output, LPF = 72 MHz
Disable SD channel. Logic high disables the SD
channel and logic low enables the SD channel.
This pin defaults to logic high if left open.
DIS CVBS
CVBS OUT SD video output for CVBS signal, LPF = 9 MHz
NC No Connection
Absolute Maximum Ratings
*
Parameters
Value
Units
Power Supply, VDD to GND
Input Voltage
6.0
V
VIN
IO
VDD + 0.3V to GND - 0.3V
Output Current
65
IO
TJ
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
150
TJ
TA
–45 to 85
–65 to 150
300
TA
TSTG
TL
TSTG
TL
Lead Temperature (Soldering 10 sec)
* Note: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure
to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
ESD, Electrostatic Discharge Protection
Minimum
Symbol
Parameter
Condition
Unit
Level
HBM
CDM
Human Body Model ESD
MIL-STD-883H Method 3015.8
8
kV
kV
Charged Device Model ESD JEDEC-EIA/JESD22-C101E
2
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Electrical Characteristics All test condition is VDD = 3.3V, TA = +25°C, RL = 150Ω to GND, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Electrical Specifications
+VS
Supply Voltage Range
3.0
5.5
V
+VS = 3.3V, VIN = 500mV, no load, all
channels on
14.5
3.66
11.24
1
mA
mA
mA
μA
+VS = 3.3V, VIN = 500mV, no load, SD
channel on, FHD channel off
+VS = 3.3V, VIN = 500mV, no load, SD
channel off, FHD channel on
+VS = 3.3V, VIN = 500mV, no load, all
channels off
IQ
Quiescent current (IQ)
+VS = 5V, VIN = 500mV, no load, all
channels on
14.89
3.67
11.27
mA
mA
mA
+VS = 5V, VIN = 500mV, no load, SD
channel on, FHD channel off
+VS = 5V, VIN = 500mV, no load, SD
channel off, FHD channel on
+VS = 5V, VIN = 500mV, no load, all
channels off
1
2.0
-1.7
0
μA
μA
ICLAMP-DOWN
ICLAMP-UP
VCLAMP
RIN
Clamp Discharge Current
Clamp Charge Current
Input Voltage Clamp
Input Impedance
VIN=300mV, measure current
1.5
-1.5
-40
0.5
5.1
VY = -0.2V
mA
mV
MΩ
IY = -100μA
+40
0.5V < VY < 1V
3
VIN=0.5V,1V or 2V
RL=150Ω to GND
AV
Voltage Gain
dB
5.9
6.01
6.03
ΔAV
VOLS
VOL
Channel Mismatch
-2
+2
%
mV
V
Output Level Shift Voltage
Output Voltage Low Swing
Output Voltage High Swing
VIN = 0V, no load, input referred
VIN = -0.3V, RL =75Ω
53
80
0.05
3.18
61
124
VOH
VIN = 3V, RL =75Ω to GND (dual load)
ΔVDD = 3.3V to 3.6V
V
dB
dB
mA
mA
V
PSRR
ISC
Power Supply Rejection Ratio
Short-circuit current
ΔVDD = 5.0V to 5.5V, 50Hz
VIN = 2V, 10Ω, output to GND
VIN =0.1V, output short to VDD
67
65
65
VIH
VIL
Disable Threshold
Enable Threshold
Enable Time
V
V
DD = 3.0V to 5.5V
DD = 3.0V to 5.5V
1.6
0.4
V
tON
tOFF
VIN = 500mV, VOUT to 1%
VIN = 500mV, VOUT to 1%
1000
1000
ns
ns
Disable Time
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AC Electrical Specifications
SD Channel
FHD Channel
SD Channel
FHD Channel
SD Channel
7.6
53.1
7.8
8.2
63.2
9.0
9.1
-1dB
f-1dB
RL=150Ω
MHz
MHz
Bandwidth
72.9
10.5
80.1
-3dB
Bandwidth
f-3dB
RL=150Ω
63.7
38.2
34.0
-0.1
-1.1
0.03
71.5
57.2
39.0
0.4
f = 27MHz
dB
dB
%
°
Stop Band
Att27MHz
Attenuation
FHD Channel f =148MHz
Video input range 1V
dG
dP
Differential Gain
Differential Phase
0.8
1.1
0.2
Video input range 1V
f=1MHz, VOUT=1.4VPP
0.7
Total
Harmonic
Distortion
SD Channel
0.1
THD
%
FHD Channel f=10MHz, VOUT=1.4VPP
SD Channel f = 100kHz to 5MHz
FHD Channel f = 100kHz t0 60MHz
0.15
5.4
6.0
Group Delay
Variation
D/DT
XTALK
SNR
ns
dB
dB
Channel Crosstalk
f = 1MHz, VOUT=1.4VPP
f= 100kHz to 4.43MHz
-68
65
-74
69
SD Channel
Signal-to-Nois
e Ration
FHD Channel f= 100kHz to 60MHz
f = 10MHz
64
ROUT_AC
CLG
输出阻抗
0.5
Ω
Chroma-Luma-Gain (SD
Channel)
Chroma-Luma-Delay (SD
Channel)
400kHz to 3.58MHz and 4.43MHz
400kHz to 3.58MHz and 4.43MHz
0.18
5
0.4
dB
CLD
ns
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Typical Performance Characteristics All test condition is VDD = 3.3V, TA = +25°C, RL =
150Ω to GND, unless otherwise noted.
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-1
-0.1dB@50MHz
-0.1dB@7MHz
VDD=3.3V
RL=150Ω
CL=15pF
VDD=3.3V
RL=150Ω
CL=15pF
100k
1M
FREQUENCY (Hz)
10M
100k
1M
10M
100M
FREQUENCY (Hz)
Figure1. Small-Scale Frequency Response(SD Channel)
Figure2. Small-Scale Frequency Response(FHD Channel)
5
5
4
3
CL=20p
2
1
CL=5pF
CL=15pF
CL=15pF
CL=20p
0
-1
-2
-3
-4
-5
CL=5pF
VDD=3.3V
VDD=3.3V
RL=150Ω
RL=150Ω
-5
100k
1M
10M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure3. Gain Vs. Frequency With CLOAD (SD Channel)
Figure4. Gain Vs. Frequency With CLOAD(FHD Channel)
140.0
120.0
100.0
80.0
40.0
35.0
30.0
25.0
20.0
15.0
10.0
60.0
5.0
40.0
VDD=3.3V
VDD=3.3V
0.0
RL=150Ω
RL=150Ω
20.0
-5.0
CL=15pF
CL=15pF
0.0
-10.0
100k
1M
10M
100M
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure5. Group Delay vs Frequency(SD Channel)
Figure6. Group Delay vs Frequency(FHD Channel)
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
0
0
-10
-20
-30
-40
-50
-60
-70
-80
VDD=3.3V
VDD=3.3V
-10
-20
-30
-40
-50
-60
-70
-80
1k
10k
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure7. PSRR Vs. Frequency(SD)
Figure8. PSRR Vs. Frequency(FHD)
0.9
0.8
0.7
0.6
0.5
0.4
2.0
1.5
1.0
0.5
0.0
VDD=+3.3V
RL=100Ω
VDD=+3.3V
RL=100Ω
VOUT=1VP-P
V
OUT=200mVP-P
tRISE=57.1ns
tFALL=48.9ns
tRISE=35.8ns
tFALL=33.3ns
0
200
400
600
800
1000
1200
0
200
400
600
800
1000
1200
TIME (ns)
TIME (ns)
Figure9. Large-Signal Pulse Response Vs. Time(SD Channel)
Figure10. Small-Signal Pulse Response Vs. Time(SD Channel)
0.9
0.8
2.0
1.5
VDD=+3.3V
VDD=+3.3V
0.7
RL=100Ω
RL=100Ω
VOUT=1VP-P
1.0
0.5
0.0
V
OUT=200mVP-P
0.6
0.5
0.4
tRISE=3.25ns
tRISE=7.75ns
tFALL=7.41ns
tFALL=3.59ns
0
20
40
60
80
100 120 140 160
0
20
40
60
80 100 120 140 160
TIME (ns)
TIME (ns)
Figure11. Large-Signal Pulse Response Vs. Time(FHD
Channel)
Figure11. Small-Signal Pulse Response Vs. Time(FHD
Channel)
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Application Information
capacitance is 0.1μF, the maximum droop voltage is
about 1mV which is restored by the clamp circuit. The
maximum pull-up current of the clamp circuit is 1.7mA.
For a 4μs sync tip width and 0.1μF capacitor, the
maximum restoration voltage is about 80mV.
The TPF142 is targeted for systems that require a single
standard-definition (CVBS) video output for CVBS video
support along with single high-definition (HD) video
outputs. Although it can be used for numerous other
applications, the needs and requirements of the video
signal are the most important design parameters of the
TPF142. The TPF142 incorporates many features not
typically found in integrated video parts while consuming
very low power.
The line droop voltage will increase if a smaller
AC-coupling capacitance is used. For the same
reason, if larger capacitance is used the line droop
voltage will decrease. Table 1 is droop voltage and
maximum restoration voltage of the clamp for typical
capacitance.
Internal Sync Clamp
Table 1. Maximum restoration voltage and droop voltage
of Y and CVBS signals for different capacitance
The typical embedded video DAC operates from a
ground referenced single supply. This becomes an
issue because the lower level of the sync pulse output
may be at a 0V reference level to some positive level.
The problem is presenting a 0V input to most single
supply driven amplifiers will saturate the output stage
of the amplifier resulting in a clipped sync tip and
degrading the video image. A larger positive reference
may offset the input above its positive range.
CAP VALUE
(nF)
DROOP IN 60μs
CHARGE IN 4μs
(mV)
1.2
0.12
(mV)
68
6.8
100
1,000
Low Pass Filter--Sallen Key
The Sallen Key is a classic low pass configuration.
This provides a very stable low pass function, and in
the case of the TPF142, two six-pole roll-off at around
9MHz and 72MHz. The six-pole function is
accomplished with an RC low pass network placed in
series with and before the Sallen Key.
The TPF142 features an internal sync clamp and
offset function to level shift the entire video signal to
the best level before it reaches the input of the
amplifier stage. These features are also helpful to
avoid saturation of the output stage of the amplifier by
setting the signal closer to the best voltage range.
The simplified block diagram of the TPF142 in Page-1.
The AC coupled video sync signal is pulled negative
by a current source at the input of the comparator
amplifier. When the sync tip goes below the
comparator threshold the output comparator is driven
negative, The PMOS device turns on clamping sync
tip to near ground level. The network triggers on the
sync tip of video signal.
Output Couple
TPF142 output could support both “AC Couple” and
“DC Couple”, if use “AC Couple”, this capacitor is
typically between 220-μF and 1000-μF, although
470-μF is common. This value of this capacitor must
be this large to minimize the line tilt (droop) and/or
field tilt associated with ac-coupling as described
previously in this document.
The TPF142 internal sync clamp makes it possible to
DC couple the output to a video load, eliminating the
need for any AC coupling capacitors, thereby saving
board space and additional expense for capacitors.
This makes the TPF142 extremely attractive for
portable video applications. Additionally, this solution
completely eliminates the issue of field tilt in the lower
frequency. The trade off is greater demand of supply
current. Typical load current for AC coupled is around
Droop Voltage and DC
Restoration
Selection of the input AC-coupling capacitance is
based on the system requirements. A typical sync tip
width of a 64μs NTSC line is 4μs during which clamp
circuit restores its DC level. In the remaining 60μs
period, the voltage droops because of a small
constant 2.0μA sinking current. If the AC-coupling
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
1mA, compared to typical 6.6mA used when DC
coupling.
due to the load, or: for sourcing:
VOUT
PDMAX =Vs ISMAX +（Vs VOUT）
RL
Output Drive Capability and
Power Dissipation
Where：
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
With the high output drive capability of the TPF142, it
is possible to exceed the +125°C absolute maximum
junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for an application to
determine if load conditions or package types need to
be modified to assure operation of the amplifier in a
safe operating area. The maximum power dissipation
allowed in a package is determined according to
Equation:
By setting the two PDMAX equations equal to each
other, we can solve the output current and RLOAD to
avoid the device overheat.
Power Supply Bypassing Printed
Circuit Board Layout
As with any modern operational amplifier, a good
printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as
possible. The power supply pin must be well bypassed
to reduce the risk of oscillation. For normal single
supply operation, a single 4.7μF tantalum capacitor in
parallel with a 0.1μF ceramic capacitor from VS+ to
GND will suffice.
TJMAX TAMAX
PDMAX
=
JA
Where：
JMAX = Maximum junction temperature
T
TAMAX = Maximum ambient temperature
ΘJA = Thermal resistance of the package
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the
total power supply voltage, plus the power in the IC
VIDEO FILTER DRIVER SELECTION GUIDE
Channel
P/N
Product Description
-3dB Bandwidth
Package
SC70-5
Low power, enable function and
SAG correction, 1 channel 6th order
9MHz
TPF110
/TPF110L
1-SD
9MHz
SOT23-6
Low power 3 channel, 6th-order
9MHz SD video filter
TPF113
TPF114
TPF116
3-SD
4-SD
6-SD
9MHz
9MHz
9MHz
SO-8
Low power 4 channel, 6th-order
9MHz SD video filter
MSOP-10
TSSOP-14
TSSOP-14
Low power 4 channel, 6th-order
9MHz SD video filter for CVBS,
SVIDEO
3 channel 6th-order 13.5MHz,
960H/720H-CVBS video filter or
Y’Pb’Pr 480P/576P video filter
Low power 3 channel, 6th-order
36MHz HD video filter
TPF123
3-ED
13.5MHz
SO-8
TPF133
3-HD
36MHz
SO-8
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
36MHz HD video filter and 1 channel
SD video filter
3-SD
36MHz
TSSOP-14
TSSOP-20
Low power 3 channel, 6th-order
36MHz HD video filter and 3 channel
SD video filter
TPF136
3-SD&
3-HD
9MHz
36MHz
Low power 3 channel, 6th-order
72MHz Full HD video filter
Low power 3 channel, 6th-order
72MHz Full HD video filter and 1
channel SD video filter
TPF143
TPF144
3-FHD
72MHz
SO-8
1-SD&
3-FHD
9MHz
MSOP-10
72MHz
TSSOP-14
Low power 3 channel, 6th-order
72MHz Full HD video filter and3
channel SD video filter
TPF146
TPF153
3-SD&
3-FHD
9MHz
TSSOP-20
72MHz
SO-8
Low power 3 channel, 6th-order
220MHz Full HD video filter
3-CH
220MHz
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please
go to web to make sure you have the latest revision.
Revision
Change
Rev1.0
Rev1.1
Initial Release
Delete VIH Max Value data, Add VIH Min Value data 1.6V on page 4
Delete VIL Min Value data, Add VIL Max Value data 0.4V on page 4
Change page header Date from @2013 to @2014
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Package Outline Dimensions
10 Lead MSOP Package——Main Body 3.00 mm [MSOP_N]
Dimensions
Dimensions In
Inches
In Millimeters
Symbol
Min
Max
Min
Max
A
0.800
0.000
0.760
0.30 TYP
0.15 TYP
2.900
0.65 TYP
2.900
4.700
0.410
0°
1.200
0.200
0.970
0.031
0.000
0.030
0.012 TYP
0.006 TYP
0.114
0.026
0.114
0.185
0.016
0°
0.047
0.008
0.038
E
E1
A1
A2
b
C
D
3.100
0.122
e
b
e
E
3.100
5.100
0.650
6°
0.122
0.201
0.026
6°
D
E1
L1
θ
A1
R1
R
θ
L
L1
L2
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
Package Outline Dimensions
14 Lead TSSOP Package——Main Body 4.40 mm [TSSOP_N]
Dimensions
In Millimeters
Symbol
MIN
-
TYP
MAX
1.20
0.15
1.05
0.28
0.19
5.06
6.60
4.50
A
A1
A2
b
-
E1
0.05
0.90
0.20
0.10
4.86
6.20
4.30
-
E
1.00
-
c
-
4.96
D
E
6.40
e
c
E1
e
4.40
D
0.65 BSC
0.60
L
0.45
0.75
L1
L2
R
1.00 REF
0.25 BSC
-
A1
0.09
0°
-
θ
-
8°
R1
R
θ
L
L1
L2
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TPF142
One CVBS and One Full-HD Composite Video Filter Driver
IMPORTANT NOTICE
"PRELIMINARY" PRODUCT INFORMATION DESCRIBES PRODUCTS THAT ARE IN PRODUCTION, BUT FOR WHICH FULL
CHARACTERIZATION DATA IS NOT YET AVAILABLE.
3PEAKIC MICROELECTRONICS CO. LTD BELIEVES THAT THE INFORMATION CONTAINED IN THIS DOCUMENT IS ACCURATE AND
RELIABLE. HOWEVER, THE INFORMATION IS SUBJECT TO CHANGE WITHOUT NOTICE AND IS PROVIDED “AS IS” WITHOUT
WARRANTY OF ANY KIND (EXPRESS OR IMPLIED). CUSTOMERS ARE ADVISED TO OBTAIN THE LATEST VERSION OF RELEVANT
INFORMATION TO VERIFY, BEFORE PLACING ORDERS, THAT INFORMATION BEING RELIED ON IS CURRENT AND COMPLETE. ALL
PRODUCTS ARE SOLD SUBJECT TO THE TERMS AND CONDITIONS OF SALE SUPPLIED AT THE TIME OF ORDER
ACKNOWLEDGMENT, INCLUDING THOSE PERTAINING TO WARRANTY, INDEMNIFICATION, AND LIMITATION OF LIABILITY. NO
RESPONSIBILITY IS ASSUMED BY 3PEAKIC MICROELECTRONICS CO. LTD FOR THE USE OF THIS INFORMATION, INCLUDING USE
OF THIS INFORMATION AS THE BASIS FOR MANUFACTURE OR SALE OF ANY ITEMS, OR FOR INFRINGEMENT OF PATENTS OR
OTHER RIGHTS OF THIRD PARTIES. THIS DOCUMENT IS THE PROPERTY OF 3PEAKIC MICROELECTRONICS CO. LTD AND BY
FURNISHING THIS INFORMATION, 3PEAKIC MICROELECTRONICS CO. LTD GRANTS NO LICENSE, EXPRESS OR IMPLIED UNDER
ANY PATENTS, MASK WORK RIGHTS, COPYRIGHTS, TRADEMARKS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY
RIGHTS. 3PEAKIC MICROELECTRONICS CO. LTD OWNS THE COPYRIGHTS ASSOCIATED WITH THE INFORMATION CONTAINED
HEREIN AND GIVES CONSENT FOR COPIES TO BE MADE OF THE INFORMATION ONLY FOR USE WITHIN YOUR ORGANIZATION
WITH RESPECT TO 3PEAKIC MICROELECTRONICS CO. LTD INTEGRATED CIRCUITS OR OTHER PRODUCTS OF 3PEAKIC
MICROELECTRONICS CO. LTD. THIS CONSENT DOES NOT EXTEND TO OTHER COPYING SUCH AS COPYING FOR GENERAL
DISTRIBUTION, ADVERTISING OR PROMOTIONAL PURPOSES, OR FOR CREATING ANY WORK FOR RESALE.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY,
OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). 3PEAKIC MICROELECTRONICS CO. LTD
PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS,
PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT
PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF 3PEAKIC MICROELECTRONICS CO. LTD PRODUCTS IN SUCH
APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND INCLUSION DISCLAIMS AND MAKES NO
WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
FOR PARTICULAR PURPOSE, WITH REGARD TO ANY DISCLAIMS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE
CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF 3PEAKIC MICROELECTRONICS CO. LTD PRODUCTS
IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY 3PEAKIC MICROELECTRONICS CO. LTD,
ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING
ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
THE LOGO DESIGNS OF 3PEAKIC MICROELECTRONICS CO. LTD ARE TRADEMARKS OF DESIGNS. ALL OTHER BRAND AND
PRODUCT NAMES IN THIS DOCUMENT MAY BE TRADEMARKS OR SERVICE MARKS OF THEIR RESPECTIVE OWNERS.
Contact information:
USA: 635 W. Alma School Road, Suite102
Chandler, USA.
AZ 85234
Shanghai-China: Room 401-407 No.1278 Keyuan Road,
Zhangjiang High-tech Park, Pudong New District,
Shanghai, China
Zip Code: 201203
Suzhou-China: Suite 304, Building B2, Creative Industrial Park,
No.328 Xinghu Street, Industrial Park,
Suzhou, Jiangsu Province, China
Zip Code: 215123
REV1.1
www.3peakic.com
~ 13 ~
©2014 3PEAK INCORPORATED
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