APE8903CMP-B-HF [A-POWER]
IC VREG ADJUSTABLE POSITIVE LDO REGULATOR, Adjustable Positive Single Output LDO Regulator;
| 型号： | APE8903CMP-B-HF |
| 厂家： | 
ADVANCED POWER ELECTRONICS CORP. |
| 描述： | IC VREG ADJUSTABLE POSITIVE LDO REGULATOR, Adjustable Positive Single Output LDO Regulator 光电二极管 输出元件 调节器 |
| 文件： | 总9页 (文件大小：111K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Advanced Power
Electronics Corp.
APE8903C
3A ULTRA LOW DROPOUT LINEAR REGULATOR
FEATURES
DESCRIPTION
Ultra Low Dropout 0.21V(typical) @ 2A Output
Current for 1.2V Output Voltage
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
EN Pull-low for APE8903CMP-A
EN Pull-high for APE8903CMP-B
Fast Transient Response
The APE8903C series is a 3A ultra low dropout linear
regulator. This product is specifically designed to provide
well supply voltage for front-side-bus termination on
motherboards and NB applications. The IC needs two
supply voltages, a control voltage for the circuitry and a
main supply voltage for power conversion, to reduce power
dissipation and provide extremely low dropout. The
APE8903C series integrates many functions. A Power-On-
Reset (POR) circuit monitors both supply voltages to
prevent wrong operations. A thermal shutdown and current
limit functions protect the device against thermal and
current over-loads. A POK indicates the output status with
time delay which is set internally. It can control other
converter for power sequence.
Adjustable Output Voltage by External Resistors
Power-On-Reset Monitoring on Both VCNTL
and VIN Pins
Internal Soft-Start
Current-Limit and Thermal Shutdown Protection
Power-OK Output with a Delay Time
SO-8 with Exposed Pad Pb-Free &
DFN 3x3-10L Package.
The APE8903C series can be enabled by other power
system. Pulling and holding the EN pin below 0.4V shuts off
the output.
The APE8903C series is available in DFN 3x3-10L &
ESOP-8 package which features small size as SO-8 and an
Exposed Pad to reduce the junction-to-case resistance.
Halogen Free Product
TYPICAL APPLICATION
POK
U1
R3
POK
GND
10k
EN
EN
ADJ
VOUT
VIN
VIN
VOUT
R1
20k
CF
*option
Cout
10uF
V
CNTL
VCNTL
NC
C2
1uF
APE 8903C
C1
4.7uF
R2
10k
Data and specifications subject to change without notice
1
201212218
Advanced Power
Electronics Corp.
APE8903C
PACKAGE/ORDERING INFORMATION
(
)
Top View
(
)
Top View
APE8903CX-X-HF
POK
EN
1
2
3
4
8
7
6
5
GND
FB
1
VOUT
10 VCNTL
9 VIN
Halogen Free
VOUT 2
VOUT 3
FB 4
EN Function
A : Internal Pull Low
Package Type
MP : ESOP-8
GND
8
7
6
VIN
VIN
EN
GND
GN3 : DFN 3x3-10L B : Internal Pull High
VIN
VOUT
NC
POK
5
VCNTL
DFN 3x3-10L
ESOP-8
ABSOLUTE MAXIMUM RATINGS(Note1)
CNTL Supply Voltage (VCNTL) --------------------------- -0.3V To 6.5V
Input Supply Voltage (VIN) ------------------------------- -0.3V To 6.5V
EN & FB Pin Voltage (VEN/VFB) ------------------------- -0.3V To VCNTL+0.3V
Power Good Voltage (VPOK) ---------------------------- -0.3V To 6.5V
Power Dissipation (PD) ---------------------------------- 2.5W
Storage Temperature Range (TST) -------------------- -65°C To 150°C
Junction Temperature Range (TJ) --------------------- -40°C To 150°C
Thermal Resistance Junction to Ambient (Rthja)Note.
ESOP-8 ------- 40°C/W
DFN 3x3-10L 62.5°C/W
Thermal Resistance Junction to Case (Rthjc)
ESOP-8 ------- 15°C/W
DFN 3x3-10L 17°C/W
Note. mounted on a Demo board
RECOMMENDED OPERATING CONDITIONS
Operating Junction Temperature Range (TOJ) ----- -40°C To 125°C
Operating Ambient Temperature Range (TOA) ----- -40°C To 85°C
VCNTL Supply Voltage (VCNTL) ------------------------- 3V To 6V
Input Supply Voltage (VIN) ------------------------------- 1.1V To 5.5V
Output Voltage (VOUT)@VCNTL > VOUT + 2.5V ------- 0.8V To 2.8V
Output Cunrrent (IOUT) ------------------------------------ 0A To 3A
2
Advanced Power
Electronics Corp.
APE8903C
ELECTRICAL SPECIFICATIONS
VCNTL= 5V, VIN=1.8V, VOUT=1.2V, TA=25oC unless otherwise specified
UNITS
Parameter
SYM
VCNTL
VIN
TEST CONDITION
MIN
TYP MAX
VCNTL Operation Voltage
2.8
-
5.5
1
V
V
V
V
V
IN POR Threshold
0.8
0.9
0.5
1.3
-
IN POR Hysteresis
VIN(hys)
ICNTL
-
-
-
-
-
V
CNTL Nominal Supply Current
EN= VCNTL
EN=0V
-
mA
APE8903CMP-A
APE8903CMP-B
1
ISD
VCNTL Shutdown Current
Feedback Voltage
uA
V
10
30
V
CNTL=3 ~ 6V, IOUT=10mA,
VFB
0.784
0.8 0.816
VIN=VOUT+0.5~5.5V
IOUT=0A ~ 2A
Load Regulation
On Resistance
-
-
0.5
1
%
I
OUT=100mA, VCNTL=VEN=5.0V,
RDS(ON)
VDROP
105
150
mΩ
VOUT=1.2V
IOUT = 2A, VCNTL=5V, VOUT = 1.2V
EN=0V
Dropout Voltage
-
0.21
0.3
V
VOUT Pull Low Resistance
Soft Start Time
-
40
0.2
-
-
-
Ω
TSS
VENH
VENL
-
ms
Enable
1.2
-
EN Pin Logic High Threshold Voltage
V
Disable
-
-
0.6
20
20
-
EN=5V, APE8903CMP-A
EN=GND, APE8903CMP-B
VCNTL=5V, VIN=VOUT+1V
-
10
10
-
IEN
EN Pin Pull-Up Current
Current Limit
uA
-
ILIM
3.1
A
VIN
Ripple Rejection
VCNTL
-
65
65
-
F=120Hz, IOUT=100mA
PSRR
dB
-
-
POK Threshold Voltage for Power OK
POK Threshold Voltage for Power Not OK
POK Low Voltage
VPOK
VFB Rising
92%
94% 96%
88% 91%
VFB
VFB
V
VPNOK
VFB Falling
83%
POK sinks 5mA
-
0.8
-
-
2
0.1
10
-
POK Delay Time
TDELAY
TSD
ms
oC
oC
Thermal Shutdown Threshold (Note1)
Thermal Shutdown Hysteresis (Note1)
160
40
-
-
Note1: Guarantee by design, not production tested.
3
Advanced Power
Electronics Corp.
APE8903C
PIN DESCRIPTIONS
PIN SYMBOL
POK
PIN DESCRIPTION
Power OK Output Pin
APE8903CMP-A: Internal pull low; HIGH for enable, LOW or floating for shutdown.
EN
VIN
APE8903CMP-B: Internal pull high; HIGH or floating for enable, LOW for shutdown.
Supply input for power conversion. The pin is monitored for Power-On Reset purpose.
Power input pin of the control circuitry. The pin is monitored for Power-On Reset
VCNTL
purpose.
NC
VOUT
FB
No Connect
Output Voltage
Feedback Pin
GND Pin
GND
BLOCK DIAGRAM
APE8903CMP-A
N-MOSFET
VIN
VOUT
Current
Limit
Error
Amp
Power-ON
Reset
VCNTL
-
+
Soft-Start
And
Control Logic
Bandgap
EN
Enable
10uA
Thermal
Shutdown
FB
Delay
POK
POK
GND
94%
VREF
APE8903CMP-B
N-MOSFET
VIN
VOUT
Current
Limit
Error
Amp
Power-ON
Reset
VCNTL
EN
-
+
Soft-Start
And
Control Logic
10uA
Bandgap
Enable
Thermal
Shutdown
FB
Delay
POK
POK
GND
94%
VREF
4
Advanced Power
Electronics Corp.
APE8903C
PIN DESCRIPTION
FB
Connecting this pin to an external resistor divider receives the feedback voltage of the
regulator. The output voltage set by the resistor divider is determined by:
Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB
to GND. A bypass capacitor may be connected with R1 in parallel to improve load transient
response. The R2 range in 1K~4.7KΩ for AL output capacitor and 30K~100KΩ for MLCC output
capacitor are recommended.
VIN
Main supply input pins for power conversions. The voltage at this pin is monitored for Power-
On Reset purpose.
VCNTL
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended) supply
voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-
On Reset purpose.
POK
Power-OK signal output pin. This pin is an open-drain output used to indicate status of
output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage is not
above the VPOK threshold or the falling FB voltage is below the VPOK threshold, indicating the
output is not OK.
EN
Enable control pin. Pulling and holding this pin below 0.4V shuts down the output. When re-
enabled, the IC undergoes a new soft-start cycle. For APE8903CMP-B, this pin is internal pulled
up to VCNTL voltage, enabling the regulator. For APE8903CMP-A, this pin is internal pulled down
to GND voltage, shutdown the regulator. The pull-high current is 10uA (typ.)
VOUT
Output of the regulator. Please connect Pin 6 using wide tracks. It is necessary to connect
an output capacitor with this pin for closed-loop compensation and improving transient responses.
FUNCTION DESCRIPTION
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to
prevent wrong logic controls. The POR function initiates a soft-start process after the two supply
voltages exceed their rising POR threshold voltages during powering on. The POR function also
pulls low the POK pin regardless the output voltage when the VCNTL voltage falls below its falling
POR threshold.
Internal Soft-Start
An internal soft-start function controls rise rate of the output voltage to limit the current surge
at start-up. The typical soft-start interval is about 0.2ms.
Output Voltage Regulation
An error amplifier working with a temperature compensated 0.8V reference and an output
NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth
and DC gain provides very fast transient response and less load regulation. It compares the
reference with the feedback voltage and amplifies the difference to drive the output NMOS which
provides load current from VIN to VOUT.
5
Advanced Power
Electronics Corp.
APE8903C
FUNCTION DESCRIPTION
Current-Limit
The APE8903C monitors the current via the output NMOS and limits the maximum current to
prevent load and APE8903C from damages during overload or short circuit conditions.
Thermal Shutdown
A thermal shutdown circuit limits the junction temperature of APE8903C. When the junction
temperature exceeds +160°C, a thermal sensor turns off the output NMOS, allowing the device to
cool down. The regulator regulates the output again through initiation of a new soft-start cycle
after the junction temperature cools by 40 ° C, resulting in a pulsed output during continuous
thermal overload conditions. The thermal shutdown designed.
APPLICATION INFORMATION
Capacitor Selection
Normally, use a MLCC capacitor on the input and output of the APE8903C. Larger input
capacitor values provide better supply-noise rejection and transient response. A higher- value
output capacitor may be necessary if large, fast transients are anticipated and the device is
located several inches from the power source. The X5R and X7R type in MLCC is recommended.
For aluminum electrolytic capacitor application, 100uF in input capacitor and 220uF in output
capacitor (30mΩ < ESR < 200mΩ) are recommended. Output capacitor of larger capacitance
can reduce noise and improve load transient response, stability, and PSRR.
6
Advanced Power
Electronics Corp.
APE8903C
TYPICAL PERFORMANCE CHARACTERISTICS
0.820
0.815
0.810
0.805
0.800
0.795
0.790
0.785
0.780
0.85
0.84
0.83
0.82
0.81
0.80
0.79
0.78
0.77
0.76
0.75
VCNTL=5
Io=0mA
Io=1A
3
3.4
3.8
4.2
4.6
5
0
0.5
1
1.5
2
2.5
3
V CNTL (V)
IOUT (A)
Line Regulation
Load Regulation
1000
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
Vo=2.5V
Vo=1.8V
Vo=1.2V
Vo=1.05V
Vo=1.2V
Vo=1.05V
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
3
IOUT (A)
IOUT (A)
Dropout Voltage at VCNTL=5V
Dropout Voltage at VCNTL=3.3V
20.0
18.0
16.0
14.0
12.0
10.0
8.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6.0
4.0
2.0
0.0
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
T J (°C)
T J (°C)
ICNTL vs. TJ
ICNTL-SD (APE8903CMP-B) vs. TJ
7
Advanced Power
Electronics Corp.
APE8903C
TYPICAL PERFORMANCE CHARACTERISTICS
0.90
0.88
0.86
0.84
0.82
0.80
0.78
0.76
0.74
0.72
0.70
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VENH
VENL
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
T J (°C)
T J (°C)
VFB vs. TJ
VEN vs. TJ
VEN
VIN
VOUT
VOUT
POK
POK
IOUT=3A
IOUT=3A
VIN Power –ON
EN on with POK Delay
8
Advanced Power
Electronics Corp.
APE8903C
MARKING INFORMATION
ESOP-8
Part Number
Package Code
EN Function
8903CMP-X
YWWSSS
Date Code (YWWSSS)
Y：Last Digit Of The Year
WW：Week
SSS：Sequence
DFN 3x3-10L
Part Number
EN Function
8903C-X
Date Code (YWWS)
YWWS
Y：Last Digit Of The Year
WW：Week
S：Sequence
9
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