AAT3242 [AAT]
300mA/150mA Dual CMOS LDO Linear Regulator; 300毫安/ 150毫安双CMOS LDO线性稳压器
| 型号： | AAT3242 |
| 厂家： | 
ADVANCED ANALOG TECHNOLOGY, INC. |
| 描述： | 300mA/150mA Dual CMOS LDO Linear Regulator |
| 文件： | 总16页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
™
PowerLinear
General Description
Features
The AAT3242 is a dual low dropout linear regulator
with Power OK (POK) outputs. Two integrated reg-
ulators provide a high power 300mA output and a
lower power 150mA output, making this device
ideal for use with microprocessors and DSP cores
in portable products. Two POK pins provide open
drain output signals when their respective regulator
output is within regulation. The AAT3242 has inde-
pendent input voltage and enable pins for increased
design flexibility. This device features a very low
quiescent current (140µA typical) and low dropout
voltages (typically 200mV and 400mV at the full
output current level), making it ideal for portable
applications where extended battery life is critical.
The AAT3242 has complete over-current/short-cir-
cuit and over-temperature protection circuits to
guard against extreme operating conditions.
•
•
High/Low Current Outputs, 300mA/150mA
Low Dropout:
— LDO A: 400mV at 300mA
— LDO B: 200mV at 150mA
High Output Voltage Accuracy: ±1.5%
High PSRR: 65dB at 1kHz
70µA Quiescent Current for Each LDO
Over-Current/Short-Circuit Protection
Over-Temperature Protection
Two POK Outputs
Independent Power and Enable Inputs
Uses Low Equivalent Series Resistance
(ESR) Ceramic Capacitors
•
•
•
•
•
•
•
•
•
•
12-Pin TSOPJW Package
-40°C to +85°C Temperature Range
The AAT3242 is available in a space-saving, Pb-
free, 12-pin TSOPJW package. This device is
capable of operation over the -40°C to +85°C tem-
perature range.
Applications
•
•
•
•
•
•
•
Cellular Phones
Digital Cameras
Handheld Instruments
Microprocessor / DSP Core / I/O Power
Notebook Computers
PDAs and Handheld Computers
Portable Communication Devices
Typical Application
VIN
INA
OUTA
OUTPUT A
100kΩ
100kΩ
AAT3242
Enable A
Enable B
ENA
INB
POKA
POKA
POKB
OUTPUT B
OUTB
POKB
GND
ENB
2.2μF
2.2μF
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Pin Descriptions
Pin #
Symbol
Function
1
ENA
Enable Regulator A pin; this pin should not be left floating. When pulled
low, the PMOS pass transistor turns off and the device enters shutdown
mode, consuming less than 1µA.
2, 3, 8, 9
4
GND
Ground connection pins.
POKA
Power OK pin with open drain output. It is pulled low when the OUTA pin is
below the 10% regulation window.
5
6
7
OUTB
INB
Low current (150mA) regulator output pin; should be decoupled with a
2.2µF or greater output low-ESR ceramic capacitor.
Input voltage pin for Regulator B; should be decoupled with 1µF or greater
capacitor.
ENB
Enable Regulator B; this pin should not be left floating. When pulled low, the
PMOS pass transistor turns off and the device enters shutdown mode, con-
suming less than 1µA.
10
11
12
POKB
OUTA
INA
Power OK pin with open drain output. It is pulled low when the OUTB pin is
below the 10% regulation window.
High-current (300mA) regulator output pin; should be decoupled with a
2.2µF or greater output low-ESR ceramic capacitor.
Input voltage pin for Regulator A; should be decoupled with 1µF or greater
capacitor.
Pin Configuration
TSOPJW-12
(Top View)
1
2
3
4
5
6
12
11
10
9
ENA
GND
GND
POKA
OUTB
INB
INA
OUTA
POKB
GND
GND
ENB
8
7
2
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Absolute Maximum Ratings1
Symbol
VIN
Description
Value
Units
Input Voltage
6.0
0.3
V
V
mA
°C
°C
VENIN(MAX)
Maximum EN to Input Voltage
DC Output Current
Operating Junction Temperature Range
Maximum Soldering Temperature (at leads, 10 sec)
2
IOUT
PD/(VIN - VO)
-40 to 150
300
TJ
TLEAD
Thermal Information
Symbol
Description
Thermal Resistance3
Maximum Power Dissipation (TA = 25°C)4
Value
Units
θJA
PD
110
909
°C/W
mW
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi-
tions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Based on long-term current density limitation.
3. Mounted on an FR4 board.
4. Derate 9.1mW/°C above 25°C.
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Electrical Characteristics1
VIN = VOUT(NOM) + 1.0V for VOUT options greater than 1.5V. VIN = 2.5V for VOUT ≤ 1.5V. IOUT = 1.0mA, COUT
2.2µF, CIN = 1.0µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C.
=
Symbol Description
LDO A; IOUT = 300mA
Conditions
Min
Typ Max
Units
I
OUT = 1mA TA = 25°C
-1.5
-2.5
VOUT + VDO
1.5
2.5
5.5
VOUT
Output Voltage Tolerance
%
to 300mA
TA = -40 to 85°C
5
VIN
VDO
ΔVOUT
VOUT*ΔVIN
Input Voltage
V
mV
%/V
Dropout Voltage2, 3
Line Regulation4
IOUT = 300mA
VIN = VOUT + 1 to 5.0 V
400 600
0.09
/
ΔVOUT(Line) Dynamic Line Regulation
IOUT = 300mA, VIN = VOUT + 1
to VOUT + 2, TR/TF = 2µS
IOUT = 1mA to 300mA,
TR <5µS
5.0
60
mV
mV
ΔVOUT(Load) Dynamic Load Regulation
VEN(L)
VEN(H)
VPOK
VPOKHYS
VPOK(LO)
IPOK
Enable Threshold Low
Enable Threshold High
Power OK Trip Threshold
Power OK Hysteresis
Power OK Output Voltage Low
POK Output Leakage Current
Output Current
0.6
V
1.5
90
V
% of VOUT
% of VOUT
V
VOUT Rising, TA = 25°C
94
1.0
98
ISINK = 1mA
VPOK < 5.5V, VOUT in Regulation
VOUT > 1.2V
0.4
1.0
µA
mA
IOUT
300
ISC
IQ
ISD
Short-Circuit Current
Ground Current
Shutdown Current
VOUT < 0.4V
600
70 125
mA
µA
µA
VIN = 5V, No Load; EN A = VIN
VIN = 5V, EN A = 0V
1kHz
IOUT =1 0mA 10kHz
1MHz
1.0
65
45
42
PSRR
TSD
Power Supply Rejection Ratio
dB
°C
°C
Over-Temperature Shutdown
Threshold
Over-Temperature Shutdown
Hysteresis
145
THYS
12
eN
TC
Output Noise
Output Voltage Temperature
Coefficient
eNBW = 300Hz to 50kHz
250
22
µVRMS
ppm/°C
1. The AAT3242 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
2. VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
3. For VOUT < 2.1V, VDO = 2.5 - VOUT
.
4. CIN = 10µF.
5. To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 2.5V.
4
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Electrical Characteristics1 (continued)
VIN = VOUT(NOM) + 1.0V for VOUT options greater than 1.5V. VIN = 2.5V for VOUT ≤ 1.5V. IOUT = 1.0mA, COUT
2.2µF, CIN = 1.0µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C.
=
Symbol Description
LDO B; IOUT = 150mA
Conditions
Min
Typ Max
Units
I
OUT = 1mA TA = 25°C
-1.5
-2.5
VOUT + VDO
1.5
2.5
5.5
VOUT
Output Voltage Tolerance
%
to 150mA
TA = -40 to 85°C
5
VIN
Input Voltage
V
VDO
ΔVOUT
Dropout Voltage2, 3
Line Regulation4
IOUT = 150mA
VIN = VOUT + 1 to 5.0 V
200 300
0.09
mV
%/V
/
VOUT*ΔVIN
ΔVOUT(Line) Dynamic Line Regulation
IOUT = 150mA, VIN = VOUT + 1
to VOUT + 2, TR/TF = 2µS
5.0
mV
ΔVOUT(Load) Dynamic Load Regulation
IOUT = 1mA to 150mA, TR <5µS
60
mV
VEN(L)
VEN(H)
VPOK
VPOKHYS
VPOK(LO)
IPOK
Enable Threshold Low
Enable Threshold High
Power OK Trip Threshold
Power OK Hysteresis
Power OK Output Voltage Low
POK Output Leakage Current
Output Current
0.6
V
1.5
90
V
% of VOUT
% of VOUT
V
VOUT Rising, TA = 25°C
94
1.0
98
ISINK = 1mA
VPOK < 5.5V, VOUT in Regulation
VOUT > 1.2V
0.4
1.0
µA
mA
IOUT
150
ISC
Short-Circuit Current
VOUT < 0.4V
600
mA
IQ
Ground Current
VIN = 5V, No Load; EN B = VIN
1kHz
IOUT = 10mA 10kHz
1MHz
70 125
65
45
42
145
µA
PSRR
TSD
Power Supply Rejection Ratio
dB
°C
°C
Over-Temperature Shutdown
Threshold
Over-Temperature Shutdown
Hysteresis
THYS
12
eN
TC
Output Noise
Output Voltage Temperature
Coefficient
eNBW = 300Hz to 50kHz
250
22
µVRMS
ppm/°C
1. The AAT3242 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
2. VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
3. For VOUT < 2.3V, VDO = 2.5 - VOUT
.
4. CIN = 10µF.
5. To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 2.5V.
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Typical Characteristics
Unless otherwise noted, VIN = 5V, TA = 25°C.
Dropout Characteristics
Dropout Voltage vs. Temperature
3.20
3.00
2.80
2.60
2.40
2.20
2.00
540
480
IL = 300mA
IOUT = 0mA
420
360
300
IOUT = 300mA
IOUT = 150mA
IL = 100mA
IL = 150mA
240
180
120
IOUT = 100mA
IOUT = 50mA
IOUT = 10mA
60
IL = 50mA
0
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120
2.70
2.80
2.90
3.00
3.10
3.20
3.30
Temperature (°C)
Input Voltage (V)
Ground Current vs. Input Voltage
Dropout Voltage vs. Output Current
90
80
70
60
50
40
30
20
10
0
500
450
400
350
300
250
200
150
100
50
IOUT = 300mA
85°C
IOUT = 150mA
IOUT = 50mA
25°C
IOUT = 0mA
IOUT = 10mA
-40°C
0
0
50
100
150
200
250
300
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Output Current (mA)
Output Voltage vs. Temperature
Quiescent Current vs. Temperature
1.203
1.202
1.201
1.200
1.199
1.198
1.197
1.196
100
90
80
70
60
50
40
30
20
10
0
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100
Temperature (°C)
Temperature (°C)
6
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Typical Characteristics
Unless otherwise noted, VIN = 5V, TA = 25°C.
Turn-On Time and POK Delay
Line Transient Response
6
5
3.25
3.20
3.15
3.10
3.05
3.00
2.95
2.90
2.85
VENABLE (2V/div)
VIN
4
VOUT (500mV/div)
VPOK (500mV/div)
3
2
1
VOUT
0
-1
-2
Time (10μs/div)
Time (100μs/div)
Load Transient Response 300mA
Load Transient Response
3.00
2.90
2.80
2.70
2.60
2.50
2.40
2.30
2.20
2.10
800
700
600
500
400
300
200
100
0
2.90
2.85
2.80
2.75
2.70
2.65
2.60
500
400
300
200
100
0
VOUT
VOUT
IOUT
IOUT
-100
-100
Time (100μs/div)
Time (10μs/div)
POK Output Response
Over-Current Protection
1200
1000
800
600
400
200
0
VIN (2V/div)
VOUT (2V/div)
VPOK (1V/div)
-200
Time (20ms/div)
Time (200μs/div)
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Typical Characteristics
Unless otherwise noted, VIN = 5V, TA = 25°C.
Self Noise
VEN(H) and VEN(L) vs. VIN
10
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1
0.1
VEN(H)
VEN(L)
0.01
2.5
3.0
3.5
4.0
4.5
5.0
5.
0.01
0.1
1
10
100
1000
Input Voltage (V)
Frequency (kHz)
8
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Functional Block Diagram
INA
OUTA
Over-Current
Protection
Over -
Temperature
Protection
POKA
+
Error
Amplifier
-
Voltage
Reference
-
+
ENA
91%
VREF
INB
OUTB
Over-Current
Protection
Over -
Temperature
Protection
POKB
+
Error
Amplifier
-
Voltage
Reference
-
+
ENB
91%
VREF
GND
The device has independent enable pins to shut
down each LDO regulator for power conservation
in portable products. Forcing EN A/B low (<0.6V)
Functional Description
The AAT3242 is a high performance dual LDO reg-
ulator with two Power OK pins. The first regulator
(A) sources 300mA of current, while the second (B)
regulator can deliver 150mA. Each regulator has
an integrated Power OK comparator which indi-
cates when the respective output is out of regula-
tion. The POK pins are open drain outputs, and
they are held low when the respective regulator is
in shutdown mode.
powers down the regulators and draws a maximum
of 1.0µA. The AAT3242 has short-circuit and ther-
mal protection in case of adverse operating condi-
tions. Device power dissipation is limited to the
package type and thermal dissipation properties.
Refer to the Thermal Considerations section of this
datasheet for details on device operation at maxi-
mum output current loads.
3242.2006.04.1.10
9
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
greater for COUT. If desired, COUT may be increased
without limit. In low output current applications
where output load is less than 10mA, the minimum
Applications Information
To assure the maximum possible performance is
obtained from the AAT3242, please refer to the fol-
lowing application recommendations.
value for COUT can be as low as 0.47µF.
Capacitor Characteristics
Input Capacitor
Ceramic composition capacitors are highly recom-
mended over all other types of capacitors for use
with the AAT3242. Ceramic capacitors offer many
advantages over their tantalum and aluminum elec-
trolytic counterparts. A ceramic capacitor typically
has very low ESR, is lower cost, has a smaller PCB
footprint, and is non-polarized. Line and load tran-
sient response of the LDO regulator is improved by
using low ESR ceramic capacitors. Since ceramic
capacitors are non-polarized, they are not prone to
incorrect connection damage.
A 1µF or larger capacitor is typically recommended
for CIN in most applications. A CIN capacitor is not
required for basic LDO regulator operation; howev-
er, if the AAT3242 is physically located more than
three centimeters from an input power source, a
CIN capacitor will be needed for stable operation.
CIN should be located as closely to the device VIN
pin as practically possible. CIN values greater than
1µF will offer superior input line transient response
and will assist in maximizing the highest possible
power supply ripple rejection.
Equivalent Series Resistance
Ceramic, tantalum, or aluminum electrolytic capac-
itors may be selected for CIN. There is no specific
capacitor ESR requirement for CIN; however, for
300mA LDO regulator output operation, ceramic
capacitors are recommended for CIN due to their
inherent capability over tantalum capacitors to with-
stand input current surges from low impedance
sources such as batteries in portable devices.
ESR is a very important characteristic to consider
when selecting a capacitor. ESR is the internal
series resistance associated with a capacitor that
includes lead resistance, internal connections, size
and area, material composition, and ambient tem-
perature. Typically, capacitor ESR is measured in
milliohms for ceramic capacitors and can range to
more than several ohms for tantalum or aluminum
electrolytic capacitors.
Output Capacitor
For proper load voltage regulation and operational
stability, a capacitor is required between pins VOUT
and GND. The COUT capacitor connection to the
LDO regulator ground pin should be made as direct
as practically possible for maximum device per-
formance. The AAT3242 has been specifically
designed to function with very low ESR ceramic
capacitors. For best performance, ceramic capaci-
tors are recommended.
Ceramic Capacitor Materials
Ceramic capacitors less than 0.1µF are typically
made from NPO or C0G materials. NPO and C0G
materials generally have tight tolerance and are
very stable over temperature. Larger capacitor val-
ues are usually composed of X7R, X5R, Z5U, or
Y5V dielectric materials. These two material types
are not recommended for use with LDO regulators
since the capacitor tolerance can vary more than
±50% over the operating temperature range of the
device. A 2.2µF Y5V capacitor could be reduced to
1µF over temperature; this could cause problems
for circuit operation. X7R and X5R dielectrics are
much more desirable. The temperature tolerance
Typical output capacitor values for maximum out-
put current conditions range from 1µF to 10µF.
Applications utilizing the exceptionally low output
noise and optimum power supply ripple rejection
characteristics of the AAT3242 should use 2.2µF or
10
3242.2006.04.1.10
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
of X7R dielectric is better than ±15%. Capacitor
tion is removed from the output or LDO regulator
package power dissipation exceeds the device
thermal limit.
area is another contributor to ESR. Capacitors
which are physically large in size will have a lower
ESR when compared to a smaller sized capacitor
of an equivalent material and capacitance value.
These larger devices can improve circuit transient
response when compared to an equal value capac-
itor in a smaller package size. Consult capacitor
vendor datasheets carefully when selecting capac-
itors for LDO regulators.
Thermal Protection
The AAT3242 has an internal thermal protection cir-
cuit which will turn on when the device die temper-
ature exceeds 145°C. The LDO regulator output will
remain in a shutdown state until the internal die
temperature falls back below the 145°C trip point.
The combination and interaction between the short-
circuit and thermal protection systems allows the
LDO regulators to withstand indefinite short-circuit
conditions without sustaining permanent damage.
POK Output
The AAT3242 features integrated Power OK com-
parators which can be used as an error flag. The
POK open drain output goes low when output volt-
age is 6% (typ) below its nominal regulation volt-
age. Additionally, any time one of the regulators is
in shutdown, the respective POK output is pulled
low. Connect a pull-up resistor from POKA to
OUTA, and POKB to OUTB.
No-Load Stability
The AAT3242 is designed to maintain output volt-
age regulation and stability under operational no-
load conditions. This is an important characteristic
for applications where the output current may drop
to zero.
Enable Function
The AAT3242 features an LDO regulator enable/dis-
able function. Each LDO has its own dedicated
enable pin. These pins (EN) are active high and are
compatible with CMOS logic. To assure the LDO
regulators will switch on, ENA/B must be greater
than 1.6V. The LDO regulators will shut down when
the voltage on the ENA/B pins falls below 0.6V. In
shutdown, the AAT3242 will consume less than
1.0µA of current. If the enable function is not need-
ed in a specific application, it may be tied to VIN to
keep the LDO regulator in a continuously on state.
Reverse Output-to-Input Voltage
Conditions and Protection
Under normal operating conditions, a parasitic diode
exists between the output and input of the LDO reg-
ulator. The input voltage should always remain
greater than the output load voltage maintaining a
reverse bias on the internal parasitic diode.
Conditions where VOUT might exceed VIN should be
avoided since this would forward bias the internal
parasitic diode and allow excessive current flow into
the VOUT pin, possibly damaging the LDO regulator.
In applications where there is a possibility of VOUT
exceeding VIN for brief amounts of time during nor-
mal operation, the use of a larger value CIN capaci-
tor is highly recommended. A larger value of CIN with
respect to COUT will effect a slower CIN decay rate
during shutdown, thus preventing VOUT from
exceeding VIN. In applications where there is a
greater danger of VOUT exceeding VIN for extended
periods of time, it is recommended to place a
Schottky diode across VIN to VOUT (connecting the
cathode to VIN and anode to VOUT). The Schottky
diode forward voltage should be less than 0.45V.
When the LDO regulators are in shutdown mode,
an internal 20Ω resistor is connected between
VOUT and GND. This is intended to discharge COUT
when the LDO regulators are disabled. The internal
20Ω has no adverse effects on device turn-on time.
Short-Circuit Protection
The AAT3242 contains internal short-circuit protec-
tion that will trigger when the output load current
exceeds the internal threshold limit. Under short-
circuit conditions, the output of the LDO regulator
will be current limited until the short-circuit condi-
3242.2006.04.1.10
11
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Thermal Considerations and High
Output Current Applications
TJ(MAX) - TA
θJA
PD(MAX)
=
The AAT3242 is designed to deliver continuous
output load currents of 300mA and 150mA under
normal operations, and can supply up to 500mA
during circuit start-up conditions. This is desirable
for circuit applications where there might be a brief
high in-rush current during a power-on event.
Constants for the AAT3242 are TJ(MAX) (the maxi-
mum junction temperature for the device, which is
125°C) and θJA = 110°C/W (the package thermal
resistance). Typically, maximum conditions are cal-
culated at the maximum operating temperature of TA
= 85°C and under normal ambient conditions where
TA = 25°C. Given TA = 85°C, the maximum package
power dissipation is 364mW. At TA = 25°C, the max-
imum package power dissipation is 909mW.
The limiting characteristic for the maximum output
load current safe operating area is essentially
package power dissipation and the internal preset
thermal limit of the device. In order to obtain high
operating currents, careful device layout and circuit
operating conditions need to be taken into account.
The maximum continuous output current for the
AAT3242 is a function of the package power dissi-
pation and the input-to-output voltage drop across
the LDO regulator. To determine the maximum
output current for a given output voltage, refer to
the following equation. This calculation accounts
for the total power dissipation of the LDO regulator,
including that caused by ground current.
The following discussions will assume the LDO
regulator is mounted on a printed circuit board uti-
lizing the minimum recommended footprint as stat-
ed in the layout considerations section of this doc-
ument. At any given ambient temperature (TA), the
maximum package power dissipation can be deter-
mined by the following equation:
PD(MAX) = [(VIN - VOUTA)IOUTA + (VIN x IGND)] + [(VIN - VOUTB)IOUTB + (VIN x IGND)]
This formula can be solved for IOUTA to determine the maximum output current for LDOA:
P
D(MAX) - (2×VIN × IGND) - (VIN - VOUTB) × IOUTB
VIN - VOUTA
IOUTA(MAX)
=
12
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
The following is an example for a 2.5V output:
VOUTA = 2.5V
VOUTB = 1.5V
IOUTB
VIN
= 150mA
= 4.2V
IGND
= 125μA
909mW - (2 × 4.2V × 125μA) - (4.2 - 1.5) × 150mA
4.2 - 2.5
IOUTA(MAX)
=
IOUTA(MAX) = 296mA
From the discussion above, PD(MAX) was determined to equal 909mW at TA = 25°C.
Therefore, with Regulator B delivering 150mA at 1.5V, Regulator A can sustain a constant 2.5V output at a
296mA load current at an ambient temperature of 25°C. Higher input-to-output voltage differentials can be
obtained with the AAT3242, while maintaining device functions within the thermal safe operating area. To
accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by oper-
ating the LDO regulator in a duty-cycled mode.
For example, an application requires VIN = 4.2V while VOUT = 1.5V at a 500mA load and TA = 25°C. To main-
tain this high input voltage and output current level, the LDO regulator must be operated in a duty-cycled mode.
Refer to the following calculation for duty-cycle operation:
IGND = 125µA
IOUT = 500mA
VIN = 4.2V
VOUT = 1.5V
100(PD(MAX)
)
%DC =
%DC =
[(VIN - VOUTA)IOUTA + (VIN × IGND)] + [(VIN - VOUTB)IOUTB + (VIN × IGND)]
100(909mW)
[(4.2V - 1.5V)500mA + (4.2V × 125μA)] + [(4.2V - 1.5V)200mA + (4.2V × 125μA)]
%DC = 48.10%
PD(MAX) is assumed to be 909mW
For a 500mA output current and a 2.7V drop across the AAT3242 at an ambient temperature of 25°C, the max-
imum on-time duty cycle for the device would be 48.10%.
3242.2006.04.1.10
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Ordering Information
Voltage
LDO A LDO B
Package
Marking1
Part Number (Tape and Reel)2
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
TSOPJW-12
3.3V
3.3V
3.0V
3.0V
3.0V
3.0V
2.9V
2.8V
2.8V
2.8V
2.8V
2.8V
2.8V
2.7V
2.6V
2.5V
1.8V
1.8V
1.8V
2.5V
1.8V
2.85V
2.5V
1.8V
1.5V
1.5V
3.0V
2.8V
2.6V
2.5V
1.9V
1.5V
2.7V
1.8V
1.8V
1.5V
2.7V
2.8V
LSXYY
PAXYY
LPXYY
LJXYY
LHXYY
NTXYY
MOXYY
LVXYY
LDXYY
LQXYY
LLXYY
LRXYY
MCXYY
LOXYY
MJXYY
SGXYY
AAT3242ITP-WN-T1
AAT3242ITP-WI-T1
AAT3242ITP-TR-T1
AAT3242ITP-TN-T1
AAT3242ITP-TI-T1
AAT3242ITP-TG-T1
AAT3242ITP-SG-T1
AAT3242ITP-QT-T1
AAT3242ITP-QQ-T1
AAT3242ITP-QO-T1
AAT3242ITP-QN-T1
AAT3242ITP-QY-T1
AAT3242ITP-QG-T1
AAT3242ITP-PP-T1
AAT3242ITP-OI-T1
AAT3242ITP-IN-T1
AAT3242ITP-IG-T1
AAT3242ITP-IP-T1
AAT3242ITP-IQ-T1
PZXYY
RRXYY
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Legend
Voltage
Code
1.5
1.8
1.9
2.5
2.6
2.7
2.8
2.85
2.9
3.0
3.3
G
I
Y
N
O
P
Q
R
S
T
W
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
14
3242.2006.04.1.10
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
Package Information
TSOPJW-12
+ 0.10
- 0.05
0.20
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
7° NOM
0.04 REF
3.00 0.10
4° 4°
0.45 0.15
0.055 0.045
0.010
2.75 0.25
All dimensions in millimeters.
3242.2006.04.1.10
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AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights,
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830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
16
3242.2006.04.1.10
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