S-82C1FAB-I6T1U [ABLIC]
BATTERY PROTECTION IC FOR 1-CELL PACK;型号: | S-82C1FAB-I6T1U |
厂家: | ABLIC |
描述: | BATTERY PROTECTION IC FOR 1-CELL PACK |
文件: | 总42页 (文件大小:843K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
S-82C1F Series
www.ablic.com
BATTERY PROTECTION IC FOR 1-CELL PACK
© ABLIC Inc., 2017-2019
Rev.1.3_00
The S-82C1F Series is a protection IC for lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy
voltage detection circuits and delay circuits. It is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable battery
packs from overcharge, overdischarge, and overcurrent.
By using an external overcurrent detection resistor, the S-82C1F Series realizes high-accuracy overcurrent protection with less
effect from temperature change.
Features
• High-accuracy voltage detection circuit
Overcharge detection voltage
Overcharge release voltage
3.500 V to 4.600 V (5 mV step)
3.100 V to 4.600 V*1
2.000 V to 3.000 V (10 mV step)
2.000 V to 3.400 V*2
0.010 V to 0.100 V (1 mV step)
0.030 V to 0.200 V (1 mV step)
0.050 V to 0.500 V (5 mV step)
−0.100 V to −0.010 V (1 mV step)
Accuracy 20 mV
Accuracy 50 mV
Accuracy 50 mV
Accuracy 100 mV
Accuracy 3 mV
Accuracy 5 mV
Accuracy 20 mV
Accuracy 3 mV
Overdischarge detection voltage
Overdischarge release voltage
Discharge overcurrent detection voltage 1
Discharge overcurrent detection voltage 2
Load short-circuiting detection voltage
Charge overcurrent detection voltage
• Detection delay times are generated only by an internal circuit (external capacitors are unnecessary).
• 0 V battery charge:
Enabled, inhibited
• Power-down function:
Available, unavailable
• Release condition of discharge overcurrent status: Load disconnection, charger connection
• Release voltage of discharge overcurrent status:
Discharge overcurrent detection voltage 1 (VDIOV1),
discharge overcurrent release voltage (VRIOV) = VDD × 0.8 (typ.)
VM pin and CO pin: Absolute maximum rating 28 V
Ta = −40°C to +85°C
• High-withstand voltage:
• Wide operation temperature range:
• Low current consumption
During operation:
2.0 μA typ., 4.0 μA max. (Ta = +25°C)
50 nA max. (Ta = +25°C)
During power-down:
During overdischarge:
• Lead-free, Sn 100%, halogen-free*3
1.0 μA max. (Ta = +25°C)
*1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage
(Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV step.)
*2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.)
*3. Refer to " Product Name Structure" for details.
Applications
• Lithium-ion rechargeable battery pack
• Lithium polymer rechargeable battery pack
Packages
• SNT-6A
• DFN-6(1414)A
1
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Block Diagram
VDD
Overdischarge
detection comparator
DO
Overcharge
detection comparator
Discharge overcurrent
detection 1 comparator
VSS
Control logic
Delay circuit
Oscillator
Discharge overcurrent
detection 2 comparator
Load short-circuiting
detection comparator
Charge overcurrent
detection comparator
VINI
CO
VM
Figure 1
2
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Product Name Structure
1. Product name
1. 1 SNT-6A
S-82C1F xx
-
I6T1
U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
I6T1: SNT-6A, Tape
Serial code*2
Sequentially set from AA to ZZ
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
1. 2 DFN-6(1414)A
S-82C1F xx
-
A6T5
S
Environmental code
S:
Lead-free, halogen-free
Package abbreviation and IC packing specifications*1
A6T5: DFN-6(1414)A, Tape
Serial code*2
Sequentially set from AA to ZZ
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
2. Packages
Table 1 Package Drawing Codes
Package Name
Dimension
Tape
Reel
Land
SNT-6A
PG006-A-P-SD
PV006-A-P-SD
PG006-A-C-SD
PV006-A-C-SD
PG006-A-R-SD
PV006-A-R-SD
PG006-A-L-SD
PV006-A-L-SD
DFN-6(1414)A
3
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. Product name list
3. 1 SNT-6A
Table 2 (1 / 2)
Discharge
Overcurrent Overcurrent
Detection
Voltage 1
Discharge
Load Short-
Charge
Overcurrent
Detection
Voltage
Overcharge Overcharge Overdischarge Overdischarge
circuiting
Detection
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage 2
[VDIOV2]
Product Name
[VCU
]
[VCL
]
[VDL
]
[VDU]
[VDIOV1
]
[VSHORT
]
[VCIOV]
−
−
−
−
−
S-82C1FAA-I6T1U
S-82C1FAB-I6T1U
S-82C1FAC-I6T1U
S-82C1FAD-I6T1U
S-82C1FAG-I6T1U
4.470 V
4.470 V
4.475 V
4.520 V
4.520 V
4.270 V
4.270 V
4.275 V
4.320 V
4.320 V
2.500 V
2.500 V
2.500 V
2.100 V
2.300 V
2.900 V
2.900 V
2.900 V
2.300 V
2.700 V
0.0210 V
0.0240 V
0.0210 V
0.0210 V
0.0225 V
0.070 V
0.075 V
0.080 V
0.100 V
0.110 V
−0.024 V
−0.024 V
−0.021 V
−0.024 V
−0.027 V
Table 2 (2 / 2)
Release Voltage of
Discharge
Release Condition
of Discharge
Overcurrent Status*4
Delay Time
Combination*1
Power-down
Function*3
Product Name
0 V Battery Charge*2
Overcurrent
Status*5
S-82C1FAA-I6T1U
S-82C1FAB-I6T1U
S-82C1FAC-I6T1U
S-82C1FAD-I6T1U
S-82C1FAG-I6T1U
(1)
(1)
(2)
(3)
(5)
Enabled
Enabled
Inhibited
Inhibited
Enabled
Unavailable
Load disconnection
Load disconnection
Load disconnection
Load disconnection
Load disconnection
V
V
V
V
V
RIOV
RIOV
RIOV
RIOV
RIOV
Unavailable
Unavailable
Unavailable
Unavailable
*1. Refer to Table 4 about the details of the delay time combinations.
*2. 0 V battery charge: Enabled inhibited
*3. Power-down function: Available, unavailable
,
*4. Release condition of discharge overcurrent status: Load disconnection, charger connection
*5. Release voltage of discharge overcurrent status: VDIOV1, VRIOV = VDD × 0.8 (typ.)
Remark Please contact our sales representatives for products other than the above.
3. 2 DFN-6(1414)A
Table 3 (1 / 2)
Discharge
Overcurrent Overcurrent
Detection
Voltage 1
Discharge
Load Short-
circuiting
Detection
Voltage
Charge
Overcharge Overcharge Overdischarge Overdischarge
Overcurrent
Detection
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage 2
[VDIOV2]
Product Name
[VCU
]
[VCL
]
[VDL
]
[VDU]
[VDIOV1
]
[VSHORT
]
[VCIOV]
−
−
−
S-82C1FAE-A6T5S
S-82C1FAF-A6T5S
S-82C1FAH-A6T5S
4.475 V
4.475 V
4.500 V
4.275 V
4.275 V
4.300 V
2.500 V
2.500 V
2.600 V
2.800 V
2.900 V
3.000 V
0.0400 V
0.0225 V
0.0400 V
0.150 V
0.080 V
0.180 V
−0.030 V
−0.021 V
−0.030 V
Table 3 (2 / 2)
Release Voltage of
Discharge
Release Condition
of Discharge
Overcurrent Status*4
Delay Time
Combination*1
Power-down
Function*3
Product Name
0 V Battery Charge*2
Overcurrent
Status*5
S-82C1FAE-A6T5S
S-82C1FAF-A6T5S
S-82C1FAH-A6T5S
(4)
(4)
(4)
Inhibited
Inhibited
Inhibited
Unavailable
Load disconnection
Load disconnection
Load disconnection
V
V
V
RIOV
RIOV
RIOV
Unavailable
Unavailable
*1. Refer to Table 4 about the details of the delay time combinations.
*2. 0 V battery charge: Enabled inhibited
*3. Power-down function: Available, unavailable
,
*4. Release condition of discharge overcurrent status: Load disconnection, charger connection
*5. Release voltage of discharge overcurrent status: VDIOV1, VRIOV = VDD × 0.8 (typ.)
Remark Please contact our sales representatives for products other than the above.
4
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Table 4
Discharge
Overcurrent
Detection
Discharge
Overcurrent
Detection
Load Short-
circuiting
Detection
Delay Time
Charge
Overcurrent
Detection
Overcharge
Detection
Delay Time
Overdischarge
Detection
Delay Time
[tDL]
Delay Time
Combination
Delay Time 1
Delay Time 2
Delay Time
[tCU
]
[tDIOV1
]
[tDIOV2
]
[tSHORT
]
[tCIOV]
−
−
−
−
−
(1)
(2)
(3)
(4)
(5)
1.0 s
1.0 s
1.0 s
1.0 s
1.0 s
64 ms
64 ms
64 ms
32 ms
32 ms
16 ms
256 ms
512 ms
16 ms
280 μs
280 μs
280 μs
280 μs
280 μs
16 ms
16 ms
16 ms
16 ms
16 ms
64 ms
Remark The delay times can be changed within the range listed in Table 5. For details, please contact our sales representatives.
Table 5
Delay Time
Symbol
tCU
Selection Range
Remark
Overcharge detection
delay time
Select a value from the
256 ms
32 ms
512 ms
64 ms
1.0 s
−
−
−
−
−
left.
Overdischarge
Select a value from the
tDL
128 ms
256 ms
detection delay time
Discharge overcurrent
detection delay time 1
Discharge overcurrent
detection delay time 2
Load short-circuiting
detection delay time
Charge overcurrent
detection delay time
left.
4 ms
8 ms
16 ms
1.0 s
32 ms
2.0 s
64 ms
4.0 s
128 ms
8.0 s
Select a value from the
tDIOV1
tDIOV2
tSHORT
tCIOV
left.
256 ms
512 ms
Select a value from the
4 ms
280 μs
4 ms
8 ms
530 μs
8 ms
16 ms
−
32 ms
−
64 ms
−
128 ms
−
left.
Select a value from the
left.
Select a value from the
left.
16 ms
32 ms
64 ms
128 ms
5
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Pin Configurations
1. SNT-6A
Top view
Table 6
Pin No.
1
Symbol
VM
Description
1
2
3
6
5
4
Input pin for external negative voltage
Connection pin of charge control FET gate
(CMOS output)
2
3
CO
DO
Connection pin of discharge control FET gate
(CMOS output)
Figure 2
4
5
6
VSS
VDD
VINI
Input pin for negative power supply
Input pin for positive power supply
Overcurrent detection pin
2. DFN-6(1414)A
Top view
Table 7
Pin No.
Symbol
Description
1
3
6
4
VSS
VDD
VINI
VM
1
2
3
4
Input pin for negative power supply
Input pin for positive power supply
Overcurrent detection pin
Bottom view
Input pin for external negative voltage
Connection pin of charge control FET gate
(CMOS output)
6
4
1
3
CO
DO
5
6
Connection pin of discharge control FET gate
(CMOS output)
*1
Figure 3
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential open or VDD
.
However, do not use it as the function of electrode.
6
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Absolute Maximum Ratings
Table 8
(Ta = +25°C unless otherwise specified)
Item
Input voltage between VDD pin and VSS pin
VINI pin input voltage
Symbol
VDS
Applied Pin
Absolute Maximum Rating
VSS − 0.3 to VSS + 6
VDD − 6 to VDD + 0.3
VDD − 28 to VDD + 0.3
VSS − 0.3 to VDD + 0.3
VVM − 0.3 to VDD + 0.3
−40 to +85
Unit
V
VDD
VINI
VM
DO
CO
−
VVINI
VVM
VDO
VCO
Topr
Tstg
V
VM pin input voltage
V
DO pin output voltage
V
CO pin output voltage
V
Operation ambient temperature
Storage temperature
°C
°C
−
−55 to +125
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 9
Item
Symbol
Condition
Board A
Min.
−
−
−
−
−
−
−
−
Typ.
Max.
Unit
−
−
−
−
−
−
−
−
−
−
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
224
176
−
−
−
315
276
−
−
−
Board B
Board C
Board D
Board E
Board A
Board B
SNT-6A
Junction-to-ambient thermal resistance*1
θJA
DFN-6(1414)A Board C
Board D
−
−
Board E
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.
7
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Electrical Characteristics
1. Ta = +25°C
Table 10
(Ta = +25°C unless otherwise specified)
Test
Circuit
Item
Detection Voltage
Symbol
Condition
Min.
Typ.
Max.
Unit
Overcharge detection voltage
Overcharge release voltage
Overdischarge detection voltage
Overdischarge release voltage
VCU
VCL
VDL
VDU
−
VCU
VCL
VCL
VDL
VDU
VDU
−
−
−
−
−
−
0.020
VCU
VCL
VCL
VDL
VDU
VCU
+
+
+
+
+
+
0.020
V
V
V
V
V
1
1
1
2
2
VCL
≠
VCU
0.050
0.025
0.050
0.100
0.050
VCL
VCL
VDL
VDU
VDU
0.050
0.020
0.050
0.100
0.050
VCL = VCU
−
VDL
≠ VDU
VDL = VDU
VDU
V
V
V
V
2
2
2
2
Discharge overcurrent detection voltage 1 VDIOV1
Discharge overcurrent detection voltage 2 VDIOV2
Load short-circuiting detection voltage VSHORT
−
−
−
VDIOV1
VDIOV2
VSHORT
−
−
0.003
0.005
VDIOV1
VDIOV2
VDIOV1
VDIOV2
VSHORT
+
+
0.003
0.005
0.020
−
0.020 VSHORT
+
Load short-circuiting detection voltage 2 VSHORT2
−
−
VDD
−
1.2
VDD
−
0.8
VDD
−
+
0.5
V
V
V
2
2
2
Charge overcurrent detection voltage
VCIOV
VCIOV
VDD
−
0.003
0.77
VCIOV
VDD
VCIOV
VDD
0.003
Discharge overcurrent release voltage VRIOV
VDD = 3.4 V
×
×
0.8
× 0.83
0 V Battery Charge
0 V battery charge
enabled
0 V battery charge starting charger voltage V0CHA
0 V battery charge inhibition battery voltage V0INH
0.0
0.9
0.7
1.2
1.0
1.5
V
V
2
2
0 V battery charge
inhibited
Internal Resistance
Resistance between VDD pin and VM pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V
500
5
1000
10
2000
15
k
k
Ω
Ω
3
3
Operation voltage between VDD pin and
VSS pin
Operation voltage between VDD pin and
VM pin
VDSOP1
−
−
1.5
1.5
−
−
6.0
28
V
−
−
VDSOP2
V
Input Current
Current consumption during operation IOPE
Current consumption during power-down IPDN
Current consumption during overdischarge IOPED
Output Resistance
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
VDD = VVM = 1.5 V
−
−
−
2.0
−
−
4.0
0.05
1.0
μ
μ
μ
A
A
A
3
3
3
CO pin resistance "H"
CO pin resistance "L"
DO pin resistance "H"
DO pin resistance "L"
RCOH
RCOL
RDOH
RDOL
−
−
−
−
5
5
5
1
10
10
10
2
20
20
20
4
k
k
k
k
Ω
Ω
Ω
Ω
4
4
4
4
Delay Time
Overcharge detection delay time
Overdischarge detection delay time
Discharge overcurrent detection delay time 1 tDIOV1
Discharge overcurrent detection delay time 2 tDIOV2
Load short-circuiting detection delay time
Charge overcurrent detection delay time tCIOV
tCU
tDL
−
−
−
−
−
−
tCU
tDL
tDIOV1
tDIOV2
tSHORT
×
×
×
0.7
0.7
0.75
0.7
tCU
tDL
tDIOV1
tDIOV2
tSHORT
tCIOV
tCU
tDL
tDIOV1
tDIOV2
tSHORT
×
×
×
1.3
1.3
1.25
1.3
−
−
−
−
−
−
5
5
5
5
5
5
×
×
tSHORT
×
0.7
×
1.3
tCIOV
×
0.7
tCIOV ×
1.3
8
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
2. Ta = −20°C to +60°C*1
Table 11
(Ta = −20°C to +60°C*1 unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Detection Voltage
VCU
VCL
VCL
VDL
VDU
VDU
−
−
−
−
−
−
0.025
VCU
VCL
VCU
+
+
+
+
+
+
+
+
+
−
+
0.025
Overcharge detection voltage
VCU
VCL
VDL
VDU
−
V
V
V
V
V
V
V
V
V
V
V
V
1
1
1
2
2
2
2
2
2
2
2
2
0.065
0.030
0.060
0.110
0.060
VCL
VCL
VDL
VDU
VDU
0.057
0.025
0.055
0.105
0.055
VCL
≠ VCU
Overcharge release voltage
Overdischarge detection voltage
Overdischarge release voltage
VCL
VCL = VCU
VDL
−
VDU
VDL
≠ VDU
VDU
VDL = VDU
VDIOV1
VDIOV2
VSHORT
−
−
0.003
0.005
0.020
VDIOV1
VDIOV2
VSHORT
VDIOV1
VDIOV2
0.003
0.005
0.020
Discharge overcurrent detection voltage 1 VDIOV1
Discharge overcurrent detection voltage 2 VDIOV2
−
−
−
−
VSHORT
VDD
VCIOV
Load short-circuiting detection voltage
VSHORT
VDD
−
1.4
VDD
−
0.8
0.3
Load short-circuiting detection voltage 2 VSHORT2
−
−
VCIOV
VDD
−
×
0.003
0.77
VCIOV
0.003
0.83
Charge overcurrent detection voltage
Discharge overcurrent release voltage
0 V Battery Charge
VCIOV
VRIOV
VDD × 0.80 VDD ×
VDD = 3.4 V
0 V battery charge
enabled
0 V battery charge starting charger voltage
V0CHA
V0INH
0.0
0.7
0.7
1.2
1.5
1.7
V
V
2
2
0 V battery charge
inhibited
0 V battery charge inhibition battery voltage
Internal Resistance
Resistance between VDD pin and VM pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V
250
3.5
1000
10
3000
20
k
k
Ω
Ω
3
3
Operation voltage between VDD pin and
VSS pin
Operation voltage between VDD pin and
VM pin
VDSOP1
−
−
1.5
1.5
−
−
6.0
28
V
−
−
VDSOP2
V
Input Current
Current consumption during operation
IOPE
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
VDD = VVM = 1.5 V
−
−
−
2.0
−
−
5.0
0.1
1.5
μ
μ
μ
A
A
A
3
3
3
Current consumption during power-down IPDN
Current consumption during overdischarge IOPED
Output Resistance
CO pin resistance "H"
CO pin resistance "L"
DO pin resistance "H"
DO pin resistance "L"
RCOH
RCOL
RDOH
RDOL
−
−
−
−
2.5
2.5
2.5
0.5
10
10
10
2
30
30
30
6
k
k
k
k
Ω
Ω
Ω
Ω
4
4
4
4
Delay Time
tCU
tDL
tDIOV1
tDIOV2
tSHORT
tCIOV
Overcharge detection delay time
Overdischarge detection delay time
Discharge overcurrent detection delay time 1 tDIOV1
Discharge overcurrent detection delay time 2 tDIOV2
Load short-circuiting detection delay time tSHORT
Charge overcurrent detection delay time tCIOV
tCU
tDL
−
−
−
−
−
−
tCU
tDL
tDIOV1
tDIOV2
tSHORT
×
×
×
0.6
0.6
0.65
0.6
tCU
tDL
tDIOV1
tDIOV2
tSHORT
×
×
×
1.4
1.4
1.35
1.4
−
5
5
5
5
5
5
−
−
−
−
−
×
×
×
0.6
×
1.4
tCIOV
×
0.6
tCIOV ×
1.4
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
9
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. Ta = −40°C to +85°C*1
Table 12
(Ta = −40°C to +85°C*1 unless otherwise specified)
Test
Circuit
Item
Detection Voltage
Symbol
Condition
Min.
Typ.
Max.
Unit
Overcharge detection voltage
Overcharge release voltage
Overdischarge detection voltage
Overdischarge release voltage
VCU
VCL
VDL
VDU
−
VCU
VCL
VCL
VDL
VDU
VDU
−
−
−
−
−
−
0.045
VCU
VCL
VCL
VDL
VDU
VCU
+
+
+
+
+
+
0.030
V
V
V
V
V
1
1
1
2
2
VCL
≠
VCU
0.080
0.050
0.080
0.130
0.080
VCL
VCL
VDL
VDU
VDU
0.060
0.030
0.060
0.110
0.060
VCL = VCU
−
VDL
≠ VDU
VDL = VDU
VDU
V
V
V
V
2
2
2
2
Discharge overcurrent detection voltage 1 VDIOV1
Discharge overcurrent detection voltage 2 VDIOV2
−
−
−
VDIOV1
VDIOV2
VSHORT
−
−
0.003
0.005
0.020
VDIOV1
VDIOV2
VDIOV1
VDIOV2
+
+
0.003
0.005
0.020
Load short-circuiting detection voltage
VSHORT
−
VSHORT VSHORT +
Load short-circuiting detection voltage 2 VSHORT2
−
−
VDD
−
1.4
VDD
−
0.8
VDD
VCIOV
VDD
−
0.3
V
V
V
2
2
2
Charge overcurrent detection voltage
Discharge overcurrent release voltage
0 V Battery Charge
VCIOV
VRIOV
VCIOV
VDD
−
0.003
0.77
VCIOV
VDD
+
×
0.003
0.83
VDD = 3.4 V
×
×
0.8
0 V battery charge
enabled
0 V battery charge starting charger voltage
V0CHA
V0INH
0.0
0.7
0.7
1.2
1.5
1.7
V
V
2
2
0 V battery charge
inhibited
0 V battery charge inhibition battery voltage
Internal Resistance
Resistance between VDD pin and VM pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V
250
3.5
1000
10
3000
20
k
k
Ω
Ω
3
3
Operation voltage between VDD pin and
VSS pin
Operation voltage between VDD pin and
VM pin
VDSOP1
−
−
1.5
1.5
−
−
6.0
28
V
−
−
VDSOP2
V
Input Current
Current consumption during operation
IOPE
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
VDD = VVM = 1.5 V
−
−
−
2.0
−
−
5.0
0.1
1.5
μ
μ
μ
A
A
A
3
3
3
Current consumption during power-down IPDN
Current consumption during overdischarge IOPED
Output Resistance
CO pin resistance "H"
CO pin resistance "L"
DO pin resistance "H"
DO pin resistance "L"
RCOH
RCOL
RDOH
RDOL
−
−
−
−
2.5
2.5
2.5
0.5
10
10
10
2
30
30
30
6
k
k
k
k
Ω
Ω
Ω
Ω
4
4
4
4
Delay Time
Overcharge detection delay time
Overdischarge detection delay time
Discharge overcurrent detection delay time 1 tDIOV1
Discharge overcurrent detection delay time 2 tDIOV2
Load short-circuiting detection delay time tSHORT
Charge overcurrent detection delay time tCIOV
tCU
tDL
−
−
−
−
−
−
tCU
tDL
tDIOV1
tDIOV2
tSHOR
tCIOV
×
×
×
×
×
0.4
0.4
0.4
0.4
0.4
0.4
tCU
tDL
tDIOV1
tDIOV2
tSHORT
tCIOV
tCU
tDL
tDIOV1
tDIOV2
tSHORT
×
×
×
1.6
1.6
−
−
−
−
−
−
5
5
5
5
5
5
1.6
1.6
1.6
×
×
×
tCIOV × 1.6
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
10
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Test Circuits
Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM
and the DO pin level with respect to VSS
.
1. Overcharge detection voltage, overcharge release voltage
(Test circuit 1)
Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage V1
is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as the
voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge hysteresis
voltage (VHC) is defined as the difference between VCU and VCL.
2. Overdischarge detection voltage, overdischarge release voltage
(Test circuit 2)
Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when the voltage
V1 is gradually decreased from the starting conditions of V1 = 3.4 V, V2 = V5 = 0 V. Overdischarge release voltage (VDU
)
is defined as the voltage V1 at which VDO goes from "L" to "H" when setting V2 = 0.01 V, V5 = 0 V and when the voltage
V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference between VDU and
VDL.
3. Discharge overcurrent detection voltage 1, discharge overcurrent release voltage
(Test circuit 2)
3. 1 Release voltage of discharge overcurrent status "VDIOV1
"
Discharge overcurrent detection voltage 1 (VDIOV1) is defined as the voltage V5 whose delay time for changing VDO
from "H" to "L" is discharge overcurrent detection delay time 1 (tDIOV1) when the voltage V5 is increased from the
starting conditions of V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V. VDO goes from "L" to "H" when setting V2 = 3.4 V, V5 = 0 V
and when the voltage V2 is then gradually decreased to VDIOV1 typ. or lower.
3. 2 Release voltage of discharge overcurrent status "VRIOV
"
VDIOV1 is defined as the voltage V5 whose delay time for changing VDO from "H" to "L" is tDIOV1 when the voltage V5
is increased from the starting conditions of V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V. Discharge overcurrent release voltage
(VRIOV) is defined as the voltage V2 at which VDO goes from "L" to "H" when setting V2 = 3.4 V, V5 = 0 V and when
the voltage V2 is then gradually decreased.
4. Discharge overcurrent detection voltage 2
(Test circuit 2)
Discharge overcurrent detection voltage 2 (VDIOV2) is defined as the voltage V5 whose delay time for changing VDO from
"H" to "L" is discharge overcurrent detection delay time 2 (tDIOV2) when the voltage V5 is increased after setting V1 =
3.4 V, V2 = 1.4 V, V5 = 0 V.
5. Load short-circuiting detection voltage
(Test circuit 2)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage V5 whose delay time for changing VDO from "H"
to "L" is load short-circuiting detection delay time (tSHORT) when the voltage V5 is increased from the starting conditions
of V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V.
6. Load short-circuiting detection voltage 2
(Test circuit 2)
Load short-circuiting detection voltage 2 (VSHORT2) is defined as the voltage V2 whose delay time for changing VDO from
"H" to "L" is tSHORT when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = V5 = 0 V.
11
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
7. Charge overcurrent detection voltage
(Test circuit 2)
Charge overcurrent detection voltage (VCIOV) is defined as the voltage V5 whose delay time for changing VCO from "H" to
"L" is charge overcurrent detection delay time (tCIOV) when the voltage V5 is decreased from the starting conditions of
V1 = 3.4 V, V2 = V5 = 0 V.
8. Current consumption during operation
(Test circuit 3)
The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = 3.4 V and V2 = V5 = 0 V.
9. Current consumption during power-down, current consumption during overdischarge
(Test circuit 3)
9. 1 With power-down function
The current consumption during power-down (IPDN) is IDD under the set conditions of V1 = V2 = 1.5 V, V5 = 0 V.
9. 2 Without power-down function
The current consumption during overdischarge (IOPED) is IDD under the set conditions of V1 = V2 = 1.5 V, V5 = 0 V.
10. Resistance between VDD pin and VM pin
(Test circuit 3)
RVMD is the resistance between VDD pin and VM pin under the set conditions of V1 = 1.8 V, V2 = V5 = 0 V.
11. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status "load
disconnection")
(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin when the voltage V5 is decreased to 0 V from the starting
conditions of V1 = 3.4 V, V2 = V5 = 1.0 V.
12. CO pin resistance "H"
(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,
V2 = V5 = 0 V, V3 = 3.0 V.
13. CO pin resistance "L"
(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.7 V,
V2 = V5 = 0 V, V3 = 0.4 V.
14. DO pin resistance "H"
(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,
V2 = V5 = 0 V, V4 = 3.0 V.
15. DO pin resistance "L"
(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,
V2 = V5 = 0 V, V4 = 0.4 V.
12
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
16 Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases and
exceeds VCU under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
17. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and
falls below VDL under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
18. Discharge overcurrent detection delay time 1
(Test circuit 5)
The discharge overcurrent detection delay time 1 (tDIOV1) is the time needed for VDO to go to "L" after the voltage V5
increases and exceeds VDIOV1 under the set conditions of V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V.
19. Discharge overcurrent detection delay time 2
(Test circuit 5)
Increase the voltage V5 after setting V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V. The discharge overcurrent detection delay time
2 (tDIOV2) is the time period from when the voltage V5 exceeds VDIOV2 until VDO goes to "L".
20. Load short-circuiting detection delay time
(Test circuit 5)
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to "L" after the voltage V5
increases and exceeds VSHORT under the set conditions of V1 = 3.4 V, V2 = 1.4 V, V5 = 0 V.
21. Charge overcurrent detection delay time
(Test circuit 5)
The charge overcurrent detection delay time (tCIOV) is the time needed for VCO to go to "L" after the voltage V5
decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
22. 0 V battery charge starting charger voltage (0 V battery charge enabled)
(Test circuit 2)
The 0 V battery charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V2 at which VCO
goes to "H" (VCO = VDD) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = V5 = 0 V.
23. 0 V battery charge inhibition battery voltage (0 V battery charge inhibited)
(Test circuit 2)
The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage V1 at which VCO goes to "L" (VCO
=
VVM) when the voltage V1 is gradually decreased, after setting V1 = 1.8 V, V2 = −2.0 V, V5 = 0 V.
13
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
IDD
A
R1 = 330 Ω
VDD
VSS
VDD
V1
S-82C1F Series
S-82C1F Series
V1
VM
CO
VSS
VINI
VM
CO
C1
= 0.1 μF
VINI
DO
DO
V5
V2
V VDO V VCO
V VDO V VCO
COM
COM
Figure 4 Test Circuit 1
Figure 5 Test Circuit 2
IDD
VDD
A
VDD
V1
V1
S-82C1F Series
S-82C1F Series
VSS
VINI
VM
CO
VSS
VINI
VM
CO
DO
DO
A IVM
V2
A IDO
V4
A ICO
V3
V5
V5
V2
COM
COM
Figure 6 Test Circuit 3
Figure 7 Test Circuit 4
VDD
V1
S-82C1F Series
DO
VSS
VINI
VM
CO
Oscilloscope Oscilloscope
V5
V2
COM
Figure 8 Test Circuit 5
14
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Operation
Remark Refer to " Battery Protection IC Connection Example".
1. Normal status
The S-82C1F Series monitors the voltage of the battery connected between VDD pin and VSS pin, the voltage between
VINI pin and VSS pin to control charging and discharging. When the battery voltage is in the range from overdischarge
detection voltage (VDL) to overcharge detection voltage (VCU), and the VINI pin voltage is in the range from charge
overcurrent detection voltage (VCIOV) to discharge overcurrent detection voltage 1 (VDIOV1), the S-82C1F Series turns both
the charge and discharge control FETs on. This condition is called the normal status, and in this condition charging and
discharging can be carried out freely.
The resistance between VDD pin and VM pin (RVMD), and the resistance between VM pin and VSS pin (RVMS) are not
connected in the normal status.
Caution After the battery is connected, discharging may not be carried out. In this case, the S-82C1F Series
returns to the normal status by connecting a charger.
2. Overcharge status
2. 1 VCL ≠ VCU (Product in which overcharge release voltage differs from overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition continues
for the overcharge detection delay time (tCU) or longer, the S-82C1F Series turns the charge control FET off to stop
charging. This condition is called the overcharge status.
The overcharge status is released in the following two cases.
(1) In the case that the VM pin voltage is lower than 0.35 V typ., the S-82C1F Series releases the overcharge status
when the battery voltage falls below overcharge release voltage (VCL).
(2) In the case that the VM pin voltage is equal to or higher than 0.35 V typ., the S-82C1F Series releases the
overcharge status when the battery voltage falls below VCU
.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf
voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the parasitic
diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the S-82C1F Series
releases the overcharge status when the battery voltage is equal to or lower than VCU
.
Caution If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU
even when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has an
internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy load that
causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.
2. 2 VCL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition continues
for the overcharge detection delay time (tCU) or longer, the S-82C1F Series turns the charge control FET off to stop
charging. This condition is called the overcharge status.
In the case that the VM pin voltage is equal to or higher than 0.35 V typ. and the battery voltage falls below VCU, the
S-82C1F Series releases the overcharge status.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf
voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the parasitic
diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the S-82C1F Series
releases the overcharge status when the battery voltage is equal to or lower than VCU
.
Caution 1. If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU
even when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has an
internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy load that
causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.
2. When a charger is connected after overcharge detection, the overcharge status is not released even
if the battery voltage is below VCL. The overcharge status is released when the discharge current
flows and the VM pin voltage goes over 0.35 V typ. by removing the charger.
15
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. Overdischarge status
When the battery voltage falls below VDL during discharging in the normal status and the condition continues for the
overdischarge detection delay time (tDL) or longer, the S-82C1F Series turns the discharge control FET off to stop
discharging. This condition is called the overdischarge status.
Under the overdischarge status, VDD pin and VM pin are shorted by RVMD in the S-82C1F Series. The VM pin voltage is
pulled up by RVMD
.
When connecting a charger in the overdischarge status, the battery voltage reaches VDL or higher and the S-82C1F
Series releases the overdischarge status if the VM pin voltage falls below 0 V typ.
The battery voltage reaches the overdischarge release voltage (VDU) or higher and the S-82C1F Series releases the
overdischarge status if the VM pin voltage does not fall below 0 V typ.
RVMS is not connected in the overdischarge status.
3. 1 With power-down function
Under the overdischarge status, when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower, the
power-down function works and the current consumption is reduced to the current consumption during power-down
(IPDN). By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or
lower.
• When a battery is not connected to a charger and the VM pin voltage ≥ 0.7 V typ., the S-82C1F Series maintains
the overdischarge status even when the battery voltage reaches VDU or higher.
• When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage
reaches VDU or higher and the S-82C1F Series releases the overdischarge status.
• When a battery is connected to a charger and 0 V typ. ≥ the VM pin voltage, the battery voltage reaches VDL or
higher and the S-82C1F Series releases the overdischarge status.
3. 2 Without power-down function
Under the overdischarge status, the power-down function does not work even when voltage difference between VDD
pin and VM pin is 0.8 V typ. or lower.
• When a battery is not connected to a charger and the VM pin voltage ≥ 0.7 V typ., the battery voltage reaches VDU
or higher and the S-82C1F Series releases the overdischarge status.
• When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage
reaches VDU or higher and the S-82C1F Series releases the overdischarge status.
• When a battery is connected to a charger and 0 V typ. ≥ the VM pin voltage, the battery voltage reaches VDL or
higher and the S-82C1F Series releases the overdischarge status.
4. Discharge overcurrent status (discharge overcurrent 1, discharge overcurrent 2, load short-
circuiting, load short-circuiting 2)
4. 1 Discharge overcurrent 1, discharge overcurrent 2, load short-circuiting
When a battery in the normal status is in the status where the VINI pin voltage is equal to or higher than VDIOV1
because the discharge current is equal to or higher than the specified value and the status lasts for the discharge
overcurrent detection delay time 1 (tDIOV1) or longer, the discharge control FET is turned off and discharging is
stopped. This condition is called the discharge overcurrent status.
4. 1. 1 Release condition of discharge overcurrent status "load disconnection" and release voltage of
discharge overcurrent status "VDIOV1
"
Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82C1F Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected.
When the load is disconnected, the VM pin returns to the VSS pin voltage. When the VM pin voltage
returns to VDIOV1 or lower, the S-82C1F Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent status.
4. 1. 2 Release condition of discharge overcurrent status "load disconnection" and release voltage of
discharge overcurrent status "VRIOV
"
Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82C1F Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected.
When the load is disconnected, the VM pin returns to the VSS pin voltage. When the VM pin voltage
returns to VRIOV or lower, the S-82C1F Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent status.
16
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
4. 1. 3 Release condition of discharge overcurrent status "charger connection"
Under the discharge overcurrent status, VDD pin and VM pin are shorted by RVMD in the S-82C1F Series.
When a battery is connected to a charger and the VM pin voltage returns to VDIOV1 or lower, the S-82C1F
Series releases the discharge overcurrent status.
RVMS is not connected in the discharge overcurrent status.
4. 2 Load short-circuiting 2
When a battery in the normal status is in the status where a load causing discharge overcurrent is connected, and
the VM pin voltage is equal to or higher than VSHORT2 and the status lasts for the load short-circuiting detection delay
time (tSHORT) or longer, the discharge control FET is turned off and discharging is stopped. The S-82C1F Series then
becomes discharge overcurrent status.
The S-82C1F Series releases the discharge overcurrent status in the same way as in "4. 1 Discharge
overcurrent 1, discharge overcurrent 2, load short-circuiting".
5. Charge overcurrent status
When a battery in the normal status is in the status where the VINI pin voltage is equal to or lower than VCIOV because
the charge current is equal to or higher than the specified value and the status lasts for the charge overcurrent detection
delay time (tCIOV) or longer, the charge control FET is turned off and charging is stopped. This condition is called the
charge overcurrent status.
The S-82C1F Series releases the charge overcurrent status when the discharge current flows and the VM pin voltage is
0.35 V typ. or higher by removing the charger.
The charge overcurrent detection does not function in the overdischarge status.
6. 0 V battery charge enabled
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V battery
charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by connecting a
charger, the charge control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charge control FET becomes equal to or higher than the threshold
voltage due to the charger voltage, the charge control FET is turned on to start charging. At this time, the discharge
control FET is off and the charging current flows through the internal parasitic diode in the discharge control FET. When
the battery voltage becomes equal to or higher than VDL, the S-82C1F Series returns to the normal status.
Caution 1. Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the
0 V battery charge.
2. The 0 V battery charge has higher priority than the charge overcurrent detection function.
Consequently, a product in which use of the 0 V battery charge is enabled charges a battery forcibly
and the charge overcurrent cannot be detected when the battery voltage is lower than VDL
.
7. 0 V battery charge inhibited
This function inhibits charging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charge control FET gate is fixed to
the EB− pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be performed.
Caution Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V
battery charge.
17
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
8. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark
tDIOV1, tDIOV2 and tSHORT start when VDIOV1 is detected. When VDIOV2 or VSHORT is detected over tDIOV2 or tSHORT
after the detection of VDIOV1, the S-82C1F Series turns the discharge control FET off within tDIOV2 or tSHORT of
each detection.
VDD
DO pin voltage
tD
0 ≤ tD ≤ tSHORT
VSS
Time
tSHORT
VDD
VSHORT
VINI pin voltage
VDIOV1
VSS
Time
Figure 9
18
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Timing Charts
1. Overcharge detection, overdischarge detection
VCU
VCL (VCU − VHC
Battery voltage
VDU (VDL + VHD
)
)
VDL
VDD
DO pin voltage
CO pin voltage
VSS
VDD
VSS
VEB−
VDD
VM pin voltage
0.35 V typ.
VSS
VEB−
VDD
VINI pin voltage
VDIOV1
VSS
VCIOV
Charger connection
Load connection
Overcharge detection delay time (tCU) Overdischarge detection delay time (tDL)
(1)
(2)
(1)
(3)
(1)
Status*1
*1. (1): Normal status
(2): Overcharge status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 10
19
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
2. Discharge overcurrent detection
2. 1 Release condition of discharge overcurrent status "load disconnection"
VCU
VCL (VCU − VHC
Battery voltage
VDU (VDL + VHD
)
)
VDL
VDD
DO pin voltage
VSS
VDD
CO pin voltage
VM pin voltage
VSS
VDD
VRIOV
VSHORT
VDIVDIOV1
VSS
VDD
VINI pin voltage
VSHORT
VDIOV2
VDIOV1
VSS
Load connection
Discharge overcurrent
detection delay time 1 (tDIOV1
Load short-circuiting
detection delay time (tSHORT
Discharge overcurrent
detection delay time 2 (tDIOV2
)
)
)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
Status*1
*1. (1): Normal status
(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 11
20
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
2. 2 Release condition of discharge overcurrent status "charger connection"
VCU
VCL (VCU − VHC
Battery voltage
VDU (VDL + VHD
)
)
VDL
VDD
DO pin voltage
VSS
VDD
CO pin voltage
VSS
VDD
VM pin voltage
VINI pin voltage
VDIOV1
VSS
VEB
−
VDD
VSHORT
VDIOV2
VDIOV1
VSS
VCIOV
Charger connection
Load connection
Discharge overcurrent
Discharge overcurrent
Load short-circuiting
detection delay time (tSHORT
detection delay time 1 (tDIOV1
)
detection delay time 2 (tDIOV2)
)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
Status*1
*1. (1): Normal status
(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 12
21
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. Charge overcurrent detection
VCU
VCL (VCU − VHC
Battery voltage
)
VDU (VDL + VHD
)
VDL
VDD
DO pin voltage
CO pin voltage
VM pin voltage
VSS
VDD
VSS
VEB
−
VDD
0.35 V typ.
VSS
VEB
−
VDD
VINI pin voltage
VDIOV1
VSS
VCIOV
Charger connection
Load connection
Overdischarge
detection delay time (tDL)
Charge overcurrent
detection delay time (tCIOV
Charge overcurrent
detection delay time (tCIOV)
)
(2)
(2)
(1)
(1)
(1)
(3)
Status*1
*1. (1): Normal status
(2): Charge overcurrent status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 13
22
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Battery Protection IC Connection Example
EB+
R1
VDD
Battery C1
S-82C1F Series
VSS
VINI
DO
CO
VM
R2
FET1
FET2
R3
EB−
Figure 14
Table 13 Constants for External Components
Symbol
FET1
Part
Purpose
Min.
Typ.
Max.
Remark
N-channel
MOS FET
N-channel
MOS FET
Threshold voltage ≤ Overdischarge
detection voltage*1
Discharge control
−
−
−
Threshold voltage ≤ Overdischarge
detection voltage*1
FET2
Charge control
−
−
−
ESD protection,
330 Ω 1.2 kΩ*2
−
−
R1
C1
Resistor
270 Ω
For power fluctuation
For power fluctuation
ESD protection,
Protection for reverse
connection of a charger
Overcurrent detection
Capacitor
0.068 μF 0.1 μF
2.2 μF
1.5 kΩ
−
300 Ω
470 Ω
−
−
R2
R3
Resistor
Resistor
−
5 mΩ
*1. If a FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be
stopped before overdischarge is detected.
*2. Accuracy of overcharge detection voltage is guaranteed by R1 = 330 Ω. Connecting resistors with other values will worsen
the accuracy.
Caution 1. The constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the connection
example. In addition, the connection example and the constants do not guarantee proper operation.
Perform thorough evaluation using the actual application to set the constants.
23
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Precautions
• The application conditions for the input voltage, output voltage, and load current should not exceed the power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
24
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Characteristics (Typical Data)
1. Current consumption
1. 1 IOPE vs. Ta
1. 2 IPDN vs. Ta
5.0
0.100
4.0
3.0
2.0
1.0
0.0
0.075
0.050
0.025
0.000
−
−
−
−
Ta [°C]
Ta [°C]
1. 3 IOPED vs. Ta
1.00
0.75
0.50
0.25
0.00
−
−
Ta [°C]
1. 4 IOPE vs. VDD
1. 4. 1 With power-down function
1. 4. 2 Without power-down function
5.0
5.0
4.0
3.0
2.0
1.0
0.0
4.0
3.0
2.0
1.0
0.0
VDD [V]
VDD [V]
25
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
2. Detection voltage
2. 1 VCU vs. Ta
2. 2 VCL vs. Ta
4.52
4.36
4.32
4.28
4.24
4.20
4.50
4.48
4.46
4.44
−
−
−
−
Ta [
°
C]
Ta [°C]
2. 3 VDL vs. Ta
2. 4 VDU vs. Ta
2.58
2.98
2.54
2.50
2.46
2.94
2.90
2.86
2.42
2.82
−
−
−
−
Ta [
°
C]
Ta [°C]
2. 5 VDIOV1 vs. VDD
2. 6 VDIOV1 vs. Ta
0.026
0.026
0.024
0.022
0.020
0.024
0.022
0.020
0.018
0.018
2.4
−
40
−25
0
25
50
75 85
2.8
3.2
3.6
4.0
4.4
Ta [°C]
V
DD [V]
2. 7 VDIOV2 vs. VDD
2. 8 VDIOV2 vs. Ta
0.034
0.034
0.032
0.030
0.028
0.032
0.030
0.028
0.026
0.026
2.4
2.8
3.2
3.6
4.0
4.4
−40
−
25
0
25
50
75 85
V
DD [V]
Ta [°C]
26
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
2. 9 VSHORT vs. VDD
2. 10 VSHORT vs. Ta
0.09
0.09
0.08
0.07
0.06
0.05
0.08
0.07
0.06
0.05
−
−
2.4
2.8
3.2
3.6
4.0
4.4
VDD [V]
Ta [°C]
2. 11 VCIOV vs. VDD
2. 12 VCIOV vs. Ta
−0.020
−0.020
−0.022
−0.024
−0.026
−0.028
−0.022
−0.024
−0.026
−0.028
−
−
V
DD [V]
Ta [°C]
27
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. Delay time
3. 1 tCU vs. Ta
3. 2 tDL vs. Ta
2.5
2.0
1.5
1.0
0.5
160
120
80
40
0.0
0
−
−
−
−
Ta [°C]
Ta [°C]
3. 3 tDIOV1 vs. VDD
3. 4 tDIOV1 vs. Ta
35
35
28
21
14
7
28
21
14
7
0
0
2.4
2.8
3.2
3.6
4.0
4.4
−40 −25
0
25
50
75 85
Ta [°C]
V
DD [V]
3. 5 tDIOV2 vs. VDD
3. 6 tDIOV2 vs. Ta
20
20
16
12
8
16
12
8
4
4
0
0
−40 −25
0
25
50
75 85
2.4
2.8
3.2
3.6
4.0
4.4
Ta [°C]
V
DD [V]
3. 7 tSHORT vs. VDD
3. 8 tSHORT vs. Ta
750
750
500
250
0
500
250
0
−
−
V
DD [V]
Ta [°C]
28
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
3. 9 tCIOV vs. VDD
3. 10 tCIOV vs. Ta
35
35
28
21
14
7
28
21
14
7
0
0
2.4
2.8
3.2
3.6
4.0
4.4
−
40
−25
0
25
50
75 85
V
DD [V]
Ta [°C]
4. Output resistance
4. 1 RCOH vs. VCO
4. 2 RCOL vs. VCO
30
25
20
15
10
5
30
25
20
15
10
5
0
0
VCO [V]
VCO [V]
4. 3 RDOH vs. VDO
4. 4 RDOL vs. VDO
30
25
20
15
10
5
30
25
20
15
10
5
0
0
VDO [V]
VDO [V]
29
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Marking Specifications
1. SNT-6A
Top view
(1) to (3):
(4) to (6):
Product code (Refer to Product name vs. Product code)
Lot number
6
5
4
(1) (2) (3)
(4) (5) (6)
1
2
3
Product name vs. Product code
Product Code
Product Name
(1)
(2)
S
(3)
A
S-82C1FAA-I6T1U
S-82C1FAB-I6T1U
S-82C1FAC-I6T1U
S-82C1FAD-I6T1U
S-82C1FAG-I6T1U
6
6
6
6
6
S
B
S
C
S
D
S
G
2. DFN-6(1414)A
Top view
6
5
4
(1) to (3):
(4):
(5) to (8):
Product code (Refer to Product name vs. Product code)
Product code (Fixed)
Lot number
(1) (2) (3) (4)
(5) (6) (7) (8)
1
2
3
Product name vs. Product code
Product Code
Product Name
(1)
(2)
S
(3)
E
S-82C1FAE-A6T5S
S-82C1FAF-A6T5S
S-82C1FAH-A6T5S
6
6
6
S
F
S
H
30
BATTERY PROTECTION IC FOR 1-CELL PACK
S-82C1F Series
Rev.1.3_00
Power Dissipation
SNT-6A
DFN-6(1414)A
T
j
= +125°C max.
T = +125°C max.
j
1.0
0.8
1.0
0.8
0.6
0.4
0.2
0.0
B
0.6
A
B
A
0.4
0.2
0.0
0
25
50
75
100 125 150 175
0
25
50
75
100 125 150 175
Ambient temperature (Ta) [°C]
Ambient temperature (Ta) [°C]
Board
Power Dissipation (PD)
Board
Power Dissipation (PD)
A
B
C
D
E
0.45 W
A
B
C
D
E
0.32 W
0.57 W
0.36 W
−
−
−
−
−
−
31
SNT-6A Test Board
No. SNT6A-A-Board-SD-1.0
ABLIC Inc.
DFN-6(1414)A Test Board
No. DFN6-A-Board-SD-1.0
ABLIC Inc.
1.57±0.03
6
5
4
+0.05
-0.02
0.08
1
2
3
0.5
0.48±0.02
0.2±0.05
No. PG006-A-P-SD-2.1
SNT-6A-A-PKG Dimensions
PG006-A-P-SD-2.1
TITLE
No.
ANGLE
UNIT
mm
ABLIC Inc.
+0.1
-0
ø1.5
4.0±0.1
2.0±0.05
0.25±0.05
+0.1
ø0.5
-0
4.0±0.1
0.65±0.05
1.85±0.05
3
2
5
1
6
4
Feed direction
No. PG006-A-C-SD-2.0
TITLE
SNT-6A-A-Carrier Tape
PG006-A-C-SD-2.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PG006-A-R-SD-1.0
SNT-6A-A-Reel
TITLE
No.
PG006-A-R-SD-1.0
ANGLE
UNIT
5,000
QTY.
mm
ABLIC Inc.
0.52
2
1.36
0.52
1
0.3
0.2
1.
2.
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
1.
2.
SNT-6A-A
-Land Recommendation
TITLE
No. PG006-A-L-SD-4.1
No.
PG006-A-L-SD-4.1
ANGLE
UNIT
mm
ABLIC Inc.
1.4±0.05
(0.8)
0.5
0.2±0.05
he heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
No. PV006-A-P-SD-2.0
DFN-6-A-PKG Dimensions
PV006-A-P-SD-2.0
TITLE
No.
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.1
2.0±0.05
+0.1
-0
ø1.5
0.20±0.05
+0.1
-0
4.0±0.1
ø0.5
0.65±0.1
1.6±0.1
3
4
1
6
Feed direction
No. PV006-A-C-SD-1.0
DFN-6-A-Carrier Tape
TITLE
No.
PV006-A-C-SD-1.0
ANGLE
UNIT
mm
ABLIC Inc.
+1.0
- 0.0
9.0
11.4±1.0
Enlarged drawing in the central part
ø13±0.2
No. PV006-A-R-SD-1.0
TITLE
No.
DFN-6-A-Reel
PV006-A-R-SD-1.0
QTY.
5,000
ANGLE
UNIT
mm
ABLIC Inc.
0.8
0.5
0.2
Caution It is recommended to solder the heat sink to a board
in order to ensure the heat radiation.
PKG
No. PV006-A-L-SD-1.0
DFN-6-A
-Land Recommendation
TITLE
No.
PV006-A-L-SD-1.0
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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