AKCM6432T_09 [ACCUTEK]
512KB SECONDARY CACHE MODULE; 512KB二级高速缓存模块![AKCM6432T_09](http://pdffile.icpdf.com/pdf2/p00217/img/icpdf/AKCM64_1228230_icpdf.jpg)
型号: | AKCM6432T_09 |
厂家: | ![]() |
描述: | 512KB SECONDARY CACHE MODULE |
文件: | 总9页 (文件大小:234K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ACCUTEK
AKCM6432T
512KB SECONDARY CACHE MODULE
FOR THE PENTIUM CPU AND 82430 PCISETS
FEATURES
·
·
·
·
·
·
64K x 64 Configuration
16K x 11 Tag SRAM Field
Low profile card edge module with 160 leads
Separate 5V and 3.3V power supplies
Multiple GND pins and decoupling capacitors for maximum noise immunity.
Synchronous SRAM with Burst Counter
DESCRIPTION
The AKCM6432T Module uses four 32K x 32 pipelined burst RAMs in surface
mount packages mounted on a multi-layer FR4 board. In addition, it uses two 5V 8-bit
wide SRAMs to achieve an eleven bit tag field. Four PD (presence detect) input pins
allow the system to determine the particular cache configuration. The low profile card
edge package allows 160 single leads to be placed on a package 4.35” long, a
maximum of 0.350” thick and a maximum of 1.14” tall. All inputs and outputs are TLL-
compatible, and operate from separate 5V (+/- 5%) and 3.3V (+10/-5%) power supplies.
Multiple GND pins and on-board decoupling capacitors ensure maximum protection
from noise.
ACCUTEK
5 Ne w Pa sture Roa d • Ne wb uryp ort, MA 01950-4040 • Phone : 978-465-6200 • Fa x: 978-462-3396 • www.a ccute kmicro.com
PINOUT - TOP VIEW
GND
TIO1
TIO7
TIO5
TIO3
TIO9
VCC5 87
TIO10 88
CADV 89
81
82
83
84
85
86
1
2
3
4
5
6
7
8
9
GND
TIO0
TIO2
TIO6
TIO4
TIO8
NC
TWE
CADSC
GND
COE
90
91
10 GND
11 CWE4
12 CWE6
13 CWE0
14 CWE2
15 VCC3
16 CS
CWE5 92
CWE7 93
CWE1 94
VCC5 95
CWE3 96
NC
97
17 GW
NC
98
18 BWE
19 GND
20 A3
GND
99
NC
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
A4
21 A7
22 A5
A6
A8
23 A11
24 A16
25 VCC3
26 A18
27 GND
28 A12
29 A13
30 CADSP
31 NC
A10
NC
A17
GND
A9
A14
A15
NC
PD0
PD2
LBO
GND
32 NC
33 PD1
34 PD3
35 GND
36 CLK1
37 GND
38 D62
39 VCC3
40 D60
41 D58
42 D56
CLK0 116
GND
D63
NC
117
118
119
120
121
122
D61
D59
D57
GND
D55
D53
D51
D49
GND
D47
D45
D43
NC
D41
D39
D37
GND
D35
D33
D31
NC
D29
D27
D25
GND
D23
D21
D19
NC
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
43 GND
44 D54
45 D52
46 D50
47 D48
48 GND
49 D46
50 D44
51 D42
52 VCC3
53 D40
54 D38
55 D36
56 GND
57 D34
58 D32
59 D30
60 VCC3
61 D28
62 D26
63 D24
64 GND
65 D22
66 D20
67 D18
68 VCC3
69 D16
70 D14
71 D12
72 GND
73 D10
74 D8
D17
D15
D13
GND
D11
D9
D7
75 D6
NC
76 VCC3
D5
77 D4
D3
78 D2
D1
79 D0
GND
80 GND
PIN NAMES
A5 - A18
Address Inputs
A3 - A4
D0 - D63
Address Inputs (Burst SRAMs only)
Cache Data Inputs/Outputs
TIO0 - TIO10 Tag Inputs/Outputs
OE#
TWE#
Cache Data Output Enab led Input
Tag Write Enable Input
WE#0 - WE#7 Cache Data Write Enable Inputs
CS#
Cache Data Chip Enable Input (Burst only)
Cache Address Status Input (Burst SRAMs only)
Processor Address Status Input (Burst only)
Burst Address Advance (Burst SRAMs only)
Global Write Input (Burst SRAMS only)
Byte Write Enable Input (Burst SRAMS only)
Linear Burst Order
CADSc#
CADSp#
CADV#
GW#
BWE#
LBO#
CLK0 - CLK1
PD0 - PD4
NC
Clock Inputs (Burst SRAMS only)
Presence Detect Pins
No Connect
GND
Ground
Vcc5
5 Volt Power Supply
Vcc3
3.3 Volt Power Supply
PRESENCE DETECT TABLE
PD4
PD3
PD2
NC
NC
PD1
PD0
Module
NC
NC
NC
NC No Cache Present
GND GND
GND GND 512KB Pipelined Burst
RECOMMENDED DC
OPERATING CONDITIONS
Symbol
Parameter
Min.
3.146
4.75
0
2.2
-0.5(1)
Typ.
Max.
3.6
5.25
0
Vcc + 0.3
0.8
Unit
V
V
V
V
Vcc3
Vcc5
GND
VIH
Supply Voltage
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
3.3
5
0
-
-
VIL
V
NOTE:
1. VIL = -1.0V for pulse width less than 5ns, once per cycle
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Power Plane
Ambient Temperature
00C to +700C
GND
VCC
Vcc3
0V
0V
3.3V +10/-5%
5.0V +/- 5%
Vcc5
00C to +700C
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Value
-0.5 to
Vcc + 0.5
-0.5 to +4.6
Unit
VTERM
Terminal Voltage with Respect
to GND
V
VTERM
for Vcc3
TA
Terminal Voltage with Respect
to GND (Vcc terminals only)
Operating Temperature
Temperature Under Bias
Storage Temperature
DC Output Current
V
0C
0C
0C
0 to +70
-10 to +85
-55 to +125
50
TBIAS
TSTG
IOUT
mA
SRAM ACCESS TIMES
Module Speed
66MHZ
Burst (1)
Asych
Tag
15nS
8.0nS
15nS
NOTE:
1. Burst SRAMS are measured by Clock to Data Out (tCD)
CAPACITANCE(1,2)
(TA = +250C, f = 1.0 MHZ)
Symbol
Parameter(1
Input Capacitance
(Address)
Input Capacitance
(OE#)
Input Capacitance
(WE#, TWE#)
I/O Capacitance
Condition
Value
Unit
CIN1
CIN3
CIN4
CI/O
VIN = 0V
30
pF
VIN = 0V
VIN = 0V
25
8
pF
pF
pF
VOUT = 0V
20
NOTES:
1. These parameters are guaranteed by design but not tested
2. These parameters are maximum values
DC ELECTRICAL CHARACTERISTICS
(Vcc5 = 5.0v +/- 5%, Vcc = 3.3V + 10/-5%, TA = 00c TO 700c)
Symbol
Parameter
Input Leakage Current
(Address)
Test Condition
Min.
Max.
Unit
ILI
Vcc = Max, VIN = GND to Vcc
-
50
µA
ILI
Vcc = Max, VIN = GND to Vcc
Input Leakage Current
(Data and Control)
Output Leakage Curent
Output Low Voltage
Output High Voltage
Operating 3.3V Power
Supply Curent
Operating 5V Power
Supply Current
Standby 3.3V Power
Supply Current
-
20
µA
ILO
VOL
VOH
ICC3
VOUT = 0V to Vcc, Vcc = Max
IOL = 8mA, Vcc = Min
IOH = -4mA, Vcc = Min
Vcc3 = Max, CE = VIL
f = fMAX, Outputs Open
Vcc5 = Max, CE = VIL
f = fMAX, Outputs Open
Vcc3 = Max, CE = VIH
f = fMAX, Outputs Open
Vcc3 = Max, CE = Vcc - 0.2V, f = 0,
VIN = 0.2V or VIN = Vcc - 0.2V,
Outputs Open
-
-
20
0.4
-
µA
V
V
2.4
-
620
mA
ICC5
ISB3
-
-
-
180
120
60
mA
mA
mA
ISB31
Full Standby 3.3V Power
Supply Current
4.340"
0.500"
1.130"
0.074"
0.110"
0.300"
CONTRACT NO.
APPROVALS
ACCUTEK MICROCIRCUIT CORP.
NEWBURYPORT, MA 01950
DWG
DATE
COAST MODULE
DRAWN
GN
11/21/07SIZE
FSCM NO.
DWG NO.
A
SCALE
AKCM6432T
R1EV.
CHECKED
ISSUED
SHEET
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