ACT4529YH-T0001 [ACTIVE-SEMI]
40V/3.0A CV/CC Buck Converter Featuring QC2.0, USB Auto-Detect and USB-PD;
| 型号： | ACT4529YH-T0001 |
| 厂家： | 
ACTIVE-SEMI, INC |
| 描述： | 40V/3.0A CV/CC Buck Converter Featuring QC2.0, USB Auto-Detect and USB-PD 光电二极管 |
| 文件： | 总15页 (文件大小：1917K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACT4529
Rev 4, 06-Jan-2017
40V/3.0A CV/CC Buck Converter Featuring QC2.0, USB Auto-Detect and USB-PD
GENERAL DESCRIPTION
FEATURES
Quick Charge™ 2.0 Certified by Qualcomm®
ACT4529 is a wide input voltage, high efficiency
step-down DC/DC converter that operates in either
CV (Constant Output Voltage) mode or CC
(Constant Output Current) mode. This device has
QC2.0 built in to provide 5.1V/9.1V/12.1V outputs
as requested by attached portable devices. Besides
building in QC2.0 decoding, it also supports Apple,
Samsung and BC1.2 devices to charge at full
current rate. ACT4529 has an interface for USB-PD
control via a tri-state digital pin. Vout is 5.1V if this
pin is floating, Vout is 9.1V when this pin voltage is
less than 0.8V and Vout is 12.1V while this pin
voltage is more than 2.0V.
and UL.
UL Certificate No. 4787083099-1
http://www.qualcomm.com/documents/quickc
harge-device-list
Pass Apple MFi Test
40V Input Voltage Surge
4.5V-36V Operational Input Voltage
5.1V/9.1V/12.1V Output with +/-1% Accuracy
Up to 3.0A Output current
Constant Current Regulation Limit
QC2.0 Decoding + USB Auto-Detect + USB-PD
Type-C Support
ACT4529 has accurate output current limits under
constant current regulation to meet MFi
specification. It provides up to 3.0A output current
at 125kHz switching frequency. ACT4529 utilizes
adaptive drive technique to achieve good EMI
performance while main >90% efficiency at full load
for mini size CLA designs. It also has output short
circuit protection with hiccup mode. The average
output current is reduced to below 6mA when
output is shorted to ground. Other features include
output over voltage protection and thermal
shutdown.
Support Apple 2.4A, Samsung and BC1.2
Hiccup Mode Protection at Output Short
>90% Efficiency at Full Load
0.5mA Low Standby Input Current
5.7V/10.1V/13.5V Output Over-voltage
Protection for 5.1V/9.1V/12.1V Outputs
Cord Voltage Compensation
Meet EN55022 Class B Radiated EMI Standard
8kV ESD HBM Protection on DP and DM
SOP-8EP Package
APPLICATIONS
Car Charger
This device is available in a SOP-8EP package and
require very few external components for operation.
Cigarette Lighter Adaptor (CLA)
Rechargeable Portable Device
CV/CC regulation DC/DC converter
Typical Application Circuit
V/I Profile
C3
22nF
Vout
Rcs
20mÙ
CSN
HSB
4.5V to 40V
SW
IN
12.1V
L1
40ìH
5V/9V/12V
ACT4529
CSP
DM
Vout
C1
C2
9.1V
C4
C5
C6
2.2ìF
GND PDC DP
D-
47ìF
10ìF
22ìF 220ìF
D1
SK54L
D+
CC1
5.1V
CC2
3.2V
GND
Iout
I/O
CC1
CC2
3.3A
USB-PD Controller
* Patent Pending
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
ORDERING INFORMATION
USB AUTO
DETECT
PART NUMBER
PDC
QC2.0
CERTIFICATION PACKAGE
ACT4529YH-T0001
ACT4529YH-T0010
ACT4529YH-T0011
ACT4529YH-T1011
Yes
Yes
Yes
Yes
Yes
No
No
MFi
QC 2.0
N/A
SOP-8EP
SOP-8EP
SOP-8EP
SOP-8EP
Yes
Yes
Yes
Yes
Yes
N/A
PIN CONFIGURATION
HSB
CSP
CSN
8
7
6
5
1
2
3
4
SW
IN
ACT4529
PDC
DP
GND
EP
DM
SOP-8EP
Top View
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
Voltage Feedback Input. Connect to node of the inductor and output capacitor. CSP
and CSN Kevin sense is recommended.
1
CSP
Negative input terminal of output current sense. Connect to the negative terminal of
current sense resistor.
2
3
CSN
PDC
USB-PD Control Pin. floating: 5.1V, pulled high: 12.1V, pulled low: 9.1V. Do not drive
this pin higher than 5V.
Data Line Positive Input. Connected to D+ of attached portable device data line. This
pin passes 8kV HBM ESD.
4
5
DP
Data Line Negative Input. Connected to D- of attached portable device data line. This
pin passes 8kV HBM ESD.
DM
Power Supply Input. Bypass this pin with a 10ìF ceramic capacitor to GND, placed as
close to the IC as possible.
6
7
8
IN
SW
HSB
Power Switching Output to External Inductor.
High Side Bias Pin. This provides power to the internal high-side MOSFET gate driver.
Connect a 22nF capacitor from HSB pin to SW pin.
Ground and Heat Dissipation Pad. Connect this exposed pad to large ground copper
area with copper and vias.
9
GND
ABSOLUTE MAXIMUM RATINGS
PARAMETER
IN to GND
VALUE
-0.3 to 40
-1 to VIN +1
VSW - 0.3 to VSW + 7
-0.3 to +15
-0.3 to +6
-0.3 to +6
46
UNIT
V
SW to GND
V
HSB to GND
V
CSP, CSN to GND
V
PDC to GND
V
All other pins to GND
V
Junction to Ambient Thermal Resistance
Operating Junction Temperature
Storage Junction Temperature
Lead Temperature (Soldering 10 sec.)
°C/W
°C
°C
°C
-40 to 150
-55 to 150
300
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may
affect device reliability.
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
ELECTRICAL CHARACTERISTICS
(VIN = 12V, TA = 25°C, unless otherwise specified.)
Unit
s
Parameter
Symbol
Condition
Min
Typ
Max
Input Over Voltage Protection
Input Over Voltage Hysteresis
VIN_OVP
Rising
40
42
4
44
V
V
Input Over Voltage Response Time
Input Under Voltage Lockout (UVLO)
Input UVLO Hysteresis
T_VIN_OVP VIN step from 30V to 45V
250
4.5
ns
V
VIN
Rising
200
mV
Input Voltage Power Good Deglitch
Time
No OVP
40
ms
Input Voltage Power Good Deglitch
Time
No UVP
10
us
Input Standby Current
Vin=12V, Vout=5.1V, Iload=0
500
uA
5.05
9.0
5.1
9.1
5.15
9.2
Output Voltage Regulation
CSP
V
V
11.95 12.1
12.25
5.7
Output Over Voltage Protection
(OVP)
Output rising
10.1
13.5
Falling Threshold
Hysteresis
7.7
8.0
8.3
V
VIN Drop
Threshold
200
mV
ms
ms
us
Input Brownout Protection
(ACT4529YH-T1011 only)
Vout Drop Delay Time
416
416
480
480
QC and PDC Restart time
Output Over Voltage Deglitch Time
1.0
ACT4529YH-
T0001
-15%
-15%
-15%
-15%
-10%
100
+15% mV
+15% mV
+15% mV
+15% mV
ACT4529YH-
T0010
200
200
200
3.2
Output Voltage Cord Compensation
66mV between CSP and CSN
ACT4529YH-
T0011
ACT4529YH-
T1011
Output Under Voltage Protection
(UVP)
VOUT
VOUT falling
VOUT rising
10%
V
UVP Hysteresis
VOUT
VOUT
0.2
10
V
UVP Deglitch Time
us
ms
UVP Blanking Time at Startup
3.5
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ACT4529
Rev 4, 06-Jan-2017
ELECTRICAL CHARACTERISTICS
(VIN = 12V, TA = 25°C, unless otherwise specified.)
Parameter
Output Constant Current Limit
Hiccup Waiting Time
Symbol
Condition
Rcs=20mÙ
Min
Typ
3.3
Max Units
3.1
3.5
A
S
4.13
Top FET Cycle by Cycle Current
Limit
4.5
5.8
A
Top FET Rds on
70
mÙ
Ù
Bot FET Rds on
4.7
Maximum Duty Cycle
Switching Frequency
Soft-start Time
99
%
-10%
125
2.0
80
+10%
kHz
ms
mV
Out Voltage Ripples
Cout=220uF/22uF ceramic
For high to lower voltage transi-
tions
VOUT Discharge Current
60
mA
ms
ms
Voltage transition time for QC 2.0
transition or USB PD Type C
12V-5V
5V-12V
100
100
Voltage transition time for QC 2.0
transition or USB PD Type C
Input 12V-40V-12V with 1V/us
slew rate, Vout=5V, Iload=0A
and 2.4A
Line Transient Response
4.75
4.9
5.25
5.4
V
V
80mA-1.0A-80mA load with
0.1A/us slew rate
Vout=5V
5.15
80mA-1.0A-80mA load with
0.1A/us slew rate
Load Transient Response
Vout=9V
8.7
9.1
9.5
V
V
80mA-1.0A-80mA load with
0.1A/us slew rate
Vout=12V
11.6
12.1
12.6
Thermal Shut Down
Thermal Shut Down Hysteresis
ESD of DP, DM
160
30
8
°C
°C
kV
V
HBM
PDC Floating
1.5
PDC High
2.0
V
PDC Low
0.8
5.5
V
PDC Maximum Voltage
PDC Drive Current
V
10
uA
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
FUNCTIONAL BLOCK DIAGRAM
HSB
VIN
UVLO
PWM
Controller
PDC
70mΩ
USB
Auto
Detect
QC2.0
Detect
SW
Driver
4.7Ω
DP
Current Sense
and Control
OVP
DM
CSP
CSN
GND
FUNCTIONAL DESCRIPTION
Output Under-Voltage Protection /
Hiccup Mode
Output Current Sensing and Regulation
Sense resistor is connected to CSP and CSN. The
sensed differential voltage is compared with interval
reference to regulate current. CC loop and CV loop
are in parallel. The current loop response is allowed
to have slower response compared to voltage loop.
However, during current transient response, the
inductor current overshoot/undershoot should be
controlled within +/-25% to avoid inductor
saturation.
There is
a
under voltage protection (UVP)
threshold. If the UVP threshold is hit for 10us, an
over current or short circuit is assumed, and the
converter goes into hiccup mode by disabling the
converter and restarts after hiccup waiting period.
Input Brownout Protection
(ACT4529YH-T1011 only)
Cycle-by-Cycle Current Control
If the input voltage drops below 8V but higher than
UVLO for 450ms while in QC or PDC mode, the
output voltage turns off and QC or PDC mode is
disabled. If the output voltage drops below 3.7V, the
timer restarts and waits for 450ms before
attempting to restart the output voltage. When
output voltage rises above 3.9V and detects the
input voltage below 8V, timer restarts. If the input
voltage is below 8V after 450ms, the output turns
off. The cycle continues until the input voltage
increases above 8.2V,for longer than 450ms, then
output turns on, the IC renegotiates the PD and QC
protocols, and normal operation restarts.
The conventional cycle-by-cycle peak current mode
is implemented with high-side FET current sense.
Input Over Voltage Protection
The converter is disabled if the input voltage is
above 42V (+/-2V). Device resumes operation
automatically 40ms after OVP is cleared.
Output Over Voltage Protection
Device stops switching when output over-voltage is
sensed, and resumes operation automatically when
output voltage drops to OVP- hysteresis.
Thermal Shutdown
Output Over Voltage Discharge
If the TJ increases beyond 160°C, ACT4529 goes
into HZ mode and the timer is preserved until TJ
drops by 30°C.
Discharge circuit starts to discharge output through
CSP pins when output over voltage is detected.
Discharge circuit brings 12V down to 5V in less
than 100ms.
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ACT4529
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FUNCTIONAL DESCRIPTION
Cord Compensation
In some applications, the output voltage is increased
with output current to compensate the potential
voltage drop across output cable. The compensation
is based on the high side feedback resistance.
The compensation voltage is derived as:
ÄVout = (VCSP-VCSN)*K
Where K=3.03
This voltage difference could be added on the
reference or turning the (VCSP-VCSN) voltage into a
sink current at FB pin to pull Vout higher than
programmed voltage.
The cord compensation loop should be very slow to
avoid potential disturbance to the voltage loop. The
voltage loop should be sufficiently stable on various
cord compensation setting.
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ACT4529
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APPLICATIONS INFORMATION
recommended to parallel with tantalum or
electrolytic capacitor, which should be placed right
next to the IC.
Inductor Selection
The inductor maintains a continuous current to the
output load. This inductor current has a ripple that is
dependent on the inductance value.
Output Capacitor
Higher inductance reduces the peak-to-peak ripple
current. The trade off for high inductance value is
the increase in inductor core size and series
resistance, and the reduction in current handling
capability. In general, select an inductance value L
based on ripple current requirement:
The output capacitor also needs to have low ESR to
keep low output voltage ripple. The output ripple
voltage is:
(VIN VOUT )VOUT
8 fSW 2 LCOUT VIN
(5)
VRIPPLE IOUTMAXKRIPPLERESR
_
V
OUT × V VOUT
IN
(1)
L =
Where IOUTMAX is the maximum output current,
KRIPPLE is the ripple factor, RESR is the ESR of the
output capacitor, fSW is the switching frequency, L is
the inductor value, and COUT is the output
capacitance. From the equation above, VRIPPLE is the
combination of ESR and real capacitance.
VINfSWILOADMAXKRIPPLE
Where VIN is the input voltage, VOUT is the output
voltage, fSW is the switching frequency, ILOADMAX is
the maximum load current, and KRIPPLE is the ripple
factor. Typically, choose KRIPPLE
=
30% to
correspond to the peak-to-peak ripple current being
30% of the maximum load current.
In the case of ceramic output capacitors, RESR is very
small and does not contribute to the ripple.
Therefore, a lower capacitance value can be used
for ceramic type. In the case of tantalum or
electrolytic capacitors, the ripple is dominated by
RESR multiplied by the ripple current. In that case, the
output capacitor is chosen to have sufficiently low
ESR.
With a selected inductor value the peak-to-peak
inductor current is estimated as:
_
VOUT × VIN VOUT
(2)
(3)
ILPK _
=
PK
L×VIN ×fSW
The peak inductor current is estimated as:
For ceramic output capacitor, typically choose a
capacitance of about 22µF. For tantalum or
electrolytic capacitors, choose a capacitor with less
than 50mÙ ESR. If an 330uF or 470uF electrolytic
cap or tantalum cap is used, where ripple is
dominantly caused by ESR, an 2.2uF ceramic in
parallel is recommended.
1
ILPK = ILOADMAX
+
ILPK_
PK
2
The selected inductor should not saturate at ILPK.
The maximum output current is calculated as:
1
_
IOUTMAX = ILIM
ILPK _
PK
(4)
2
Rectifier Schottky Diode
LLIM is the internal current limit.
Use a Schottky diode as the rectifier to conduct
current when the High-Side Power Switch is off.
The Schottky diode must have current rating higher
than the maximum output current and a reverse
voltage rating higher than the maximum input
voltage. Further more, the low forward voltage
Schottky is preferable for high efficiency and
smoothly operation.
Input Capacitor
The input capacitor needs to be carefully selected
to maintain sufficiently low ripple at the supply input
of the converter. A low ESR capacitor is highly
recommended. Since large current flows in and out
of this capacitor during switching, its ESR also
affects efficiency.
The input capacitance needs to be higher than
10µF. The best choice is the ceramic type.
However, low ESR tantalum or electrolytic types
may also be used provided that the RMS ripple
current rating is higher than 50% of the output
current. The input capacitor should be placed close
to the IN and GND pins of the IC, with the shortest
traces possible. In the case of tantalum or
electrolytic types,
a
ceramic capacitor is
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ACT4529
Rev 4, 06-Jan-2017
APPLICATIONS INFORMATION
Current Sense Resistor
The traces leading to and from the sense resistor
can be significant error sources. With small value
sense resistors, trace resistance shared with the
load can cause significant errors. It is recommended
to connect the sense resistor pads directly to the
CSP and CSN pins using “Kelvin” or “4-wire”
connection techniques as shown below.
PCB Load
Trace
Kevin Sense
Traces
Sense
Resistor
Current Limit Setting
If output current hits current limit, output voltage
drops to keep the current to a constant value.
The following equation calculates the constant
current limit.
66 mV
ILimit ( A)
(6)
Rcs (m)
Where Rcs is current sense resistor.
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ACT4529
Rev 4, 06-Jan-2017
APPLICATIONS INFORMATION
4) Schottky anode pad and IC exposed pad
should be placed close to ground clips in CLA
applications
PCB Layout Guidance
When laying out the printed circuit board, the
following checklist should be used to ensure proper
operation of the IC.
5) Use “Kelvin” or “4-wire” connection techniques
from the sense resistor pads directly to the CSP
and CSN pins. The CSP and CSN traces
should be in parallel to avoid interference.
1) Arrange the power components to reduce the
AC loop size consisting of CIN, VIN pin, SW pin
and the Schottky diode.
6) Place multiple vias between top and bottom
GND planes for best heat dissipation and noise
immunity.
2) The high power loss components, e.g. the
controller, Schottky diode, and the inductor
should be placed carefully to make the thermal
spread evenly on the board.
7) Use short traces connecting HSB-CHSB-SW
loop.
3) Place input decoupling ceramic capacitor CIN as
close to VIN pin as possible. CIN should be
connected to power GND with several vias or
short and wide copper trace.
8) SW pad is noise node switching from VIN to
GND. It should be isolated away from the rest
of circuit for good EMI and low noise operation.
Example PCB Layout
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
Typical Application Circuit
C3
22nF
Rcs
20mÙ
CSN
HSB
4.5V to 40V
SW
IN
U1
L1
5V/9V/12V
40ìH
ACT4529
CSP
DM
Vout
D-
C1
47ìF
C2
10ìF
C4
C5
C6
2.2ìF
GND PDC DP
22ìF 220ìF
D1
D+
SK54L
CC1
CC2
GND
I/O
CC1
CC2
USB-PD Controller
BOM List for 2.4A Car Charger
ITEM REFERENCE
DESCRIPTION
MANUFACTURER
QTY
1
1
2
U1
C1
C2
C3
C4
C5
C6
L1
IC, ACT4529, SOP-8EP
Capacitor, Electrolytic, 47µF/35V
Active-Semi
Murata, TDK
Murata, TDK
Murata, TDK
Murata, TDK
Murata, TDK
Murata, TDK
1
3
Capacitor, Ceramic, 10µF/25V, 1206, SMD
Capacitor, Ceramic, 22nF/25V, 0603, SMD
Capacitor, Ceramic, 22µF/16V, 1206, SMD
Capacitor, Electrolytic, 220µF/16V
Capacitor, Ceramic, 2.2µF/16V, 0805, SMD
Inductor, 40µH, 4A, 20%
1
4
1
5
1
6
1
7
1
8
1
9
D1
Rcs
Diode, Schottky, 40V/5A, SK54L
Panjit
1
10
Chip Resistor, 20mΩ, 1206, 1%
Murata, TDK
1
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ACT4529
Rev 4, 06-Jan-2017
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in typical application circuit, Ta = 25°C, unless otherwise specified)
Efficiency vs. Load current ( 5V Vout)
Efficiency vs. Load current ( 9V Vout)
100
95
100
95
VIN =12V
90
90
VIN =12V
VIN =24V
85
80
75
85
80
75
VIN =24V
70
70
65
60
65
60
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
2000
2500
3000
Load Current (mA)
Load Current (mA)
Output CC/CV Curve (5V Vout)
Efficiency vs. Load current ( 12V Vout)
6.0
5.0
4.0
3.0
2.0
100
95
90
VIN =12V
VIN =24V
VIN =12V
VIN =24V
85
80
75
70
1.0
0
65
60
0
500
1000
1500
2000
2500
3000
0
5000
1000
1500
2000
2500
3000
3500
Load Current (mA)
Output Current (mA)
Output CC/CV Curve (12V Vout)
Output CC/CV Curve (9V Vout)
10.0
8.0
14.0
12.0
10.0
8.0
VIN =24V
VIN =12V
VIN =12V
6.0
VIN =24V
6.0
4.0
4.0
2.0
0
2.0
0
0
5000
1000
1500
2000
2500
3000
3500
0
5000
1000
1500
2000
2500
3000
3500
Output Current (mA)
Output Current (mA)
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Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in typical application circuit, Ta = 25°C, unless otherwise specified)
Output Over Voltage (5V Vout)
Start up into CC Mode
CH1
CH1
CH2
CH2
CH3
CH1: VIN, 10V/div
CH1: VOUT, 1V/div
CH2: SW, 10V/div
TIME: 1ms/div
CH2: VOUT, 2V/div
CH3: IOUT, 2A/div
TIME: 400µs/div
Load Transient (80mA-1A-80mA)
Vin=12V, Vout=5V
Load Transient (1A-2.4A-1A)
Vin=12V, Vout=5V
CH1
CH2
CH1
CH2
CH1: VOUT, 100mV/div
CH1: VOUT, 200mV/div
CH2: IOUT, 1A/div
TIME: 400us//div
CH2: IOUT, 1A/div
TIME: 400us//div
Load Transient (80mA-1A-80mA)
Vin=12.6V, Vout=12V
Load Transient (1A-2.4A-1A)
Vin=12.6V, Vout=12V
CH1
CH2
CH1
CH2
CH1: VOUT, 200mV/div
CH1: VOUT, 200mV/div
CH2: IOUT, 1A/div
TIME: 400us//div
CH2: IOUT, 1A/div
TIME: 400us//div
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ACT4529
Rev 4, 06-Jan-2017
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in typical application circuit, Ta = 25°C, unless otherwise specified)
Voltage Transient (5V-9V)
Voltage Transient (9V-5V)
CH1
CH1
CH1: VOUT, 2V/div
TIME: 10ms//div
CH1: VOUT, 2V/div
TIME: 10ms//div
Voltage Transient (5V-12V)
Voltage Transient (12V-5V)
CH1
CH1
CH1: VOUT, 2V/div
TIME: 10ms//div
CH1: VOUT, 2V/div
TIME: 10ms//div
Innovative PowerTM
- 14 -
www.active-semi.com
Copyright © 2015-2017 Active-Semi, Inc.
ACT4529
Rev 4, 06-Jan-2017
PACKAGE OUTLINE
SOP-8EP PACKAGE OUTLINE AND DIMENSIONS
DIMENSION IN
MILLIMETERS
DIMENSION IN
INCHES
SYMBOL
MIN
MAX
1.727
0.152
1.550
0.510
0.250
5.100
3.402
4.000
6.200
2.513
MIN
MAX
0.068
0.006
0.061
0.020
0.010
0.200
0.134
0.157
0.244
0.099
A
A1
A2
b
1.350
0.000
1.245
0.330
0.170
4.700
3.202
3.734
5.800
2.313
0.053
0.000
0.049
0.013
0.007
0.185
0.126
0.147
0.228
0.091
c
D
D1
E
E1
E2
e
1.270 TYP
0.050 TYP
0.400
1.270
0.016
0.050
L
0°
8°
0°
8°
è
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
- 15 -
www.active-semi.com
Copyright © 2015-2017 Active-Semi, Inc.
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