127102-HMC856LC5 [ADI]

EVAL BOARD HMC856LC5;
127102-HMC856LC5
型号: 127102-HMC856LC5
厂家: ADI    ADI
描述:

EVAL BOARD HMC856LC5

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28 Gbps, 5-Bit, Digital Time Delay with  
Programmable Output Voltage  
Data Sheet  
HMC856  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Differential and single-ended operation  
Supports data rates up to 28 Gbps  
Fast rise/fall time: 20 ps/18 ps  
Low power consumption: 610 mW typical  
Programmable differential  
Output voltage swing: 500 mV p-p to 1350 mV p-p  
Single supply: −3.3 V  
5 mm × 5 mm, 32-terminal ceramic leadless chip carrier (LCC)  
package: 25 mm2  
GND  
I+  
1
2
3
4
5
6
7
8
24 GND  
23 O+  
HMC856  
50Ω  
50Ω  
50Ω  
50Ω  
DELAY  
I–  
22 O–  
GND  
GND  
B0+  
B0–  
NC  
21 GND  
20 GND  
19 B4+  
18 B4–  
17 NC  
600Ω  
600Ω  
APPLICATIONS  
SONET OC-192  
600Ω 600Ω  
600Ω  
High speed serial logic  
Clock and data recovery  
Broadband test and measurement equipment  
Frequency synthesis  
PACKAGE  
BASE  
V
Matched timing  
EE  
Figure 1.  
GENERAL DESCRIPTION  
The HMC856 is a wideband time delay device with a 5-bit  
digital control designed for timing compensation or clock skew  
management applications. The time delay provides nearly  
100 ps (maximum) of delay range with 3 ps resolution and  
supports 28 Gbps data. The monotonic delay is compensated  
for stable operation over both power supply and temperature  
variation.  
outputs are source terminated to 50 Ω and can also be ac or dc-  
coupled. Connect outputs directly to a 50 Ω ground terminated  
system or drive devices with CML logic input. The control lines,  
B4 to B0, are differential CML inputs terminated with 600 Ω to  
the positive rail, which supports lower power control options.  
The HMC856 features an output level control pin, VR, that  
allows loss compensation or signal level optimization. The  
HMC856 operates from a single −3.3 V supply and is available  
in a 5 mm × 5 mm LCC package.  
All differential inputs to the HMC856 are current mode logic  
(CML) and terminated on chip with 50 Ω to the positive supply  
ground, GND, and can be ac or dc-coupled. The differential CML  
Rev. D  
Document Feedback  
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2018 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 
HMC856  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Pin Configuration and Function Descriptions..............................5  
Interface Schematics .....................................................................6  
Typical Performance Characteristics ..............................................7  
Theory of Operation ...................................................................... 10  
Applications Information .............................................................. 11  
Evaluation Printed Circuit Board (PCB) ................................ 11  
Typical Application Circuit....................................................... 12  
Outline Dimensions....................................................................... 13  
Ordering Guide .......................................................................... 13  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Specifications............................................................... 3  
Timing Diagram ........................................................................... 3  
Absolute Maximum Ratings............................................................ 4  
ESD Caution.................................................................................. 4  
REVISION HISTORY  
6/2018—Rev. C to Rev. D  
Changes to Figure 1.......................................................................... 1  
Changes to Resolution Parameter, Table 1 and Figure 2............. 3  
Changes to Figure 22 Caption and Figure 23 ............................... 9  
Changes to Theory of Operation Section.................................... 10  
Changes to Figure 25...................................................................... 12  
Changes to Ordering Guide .......................................................... 13  
This Hittite Microwave Products data sheet has been reformatted to  
meet the styles and standards of Analog Devices, Inc.  
12/2016—Rev. 01.0611 to Rev. C  
Updated Format..................................................................Universal  
Changes to Features Section, General Description Section, and  
Figure 1 .............................................................................................. 1  
Added Power Consumption Parameter, Table 1 .......................... 3  
Changes to Figure 2.......................................................................... 3  
Changes to Table 2 ............................................................................ 4  
Changes to Figure 3 and Table 3 ..................................................... 5  
Changes to Typical Performance Characteristics Section........... 7  
Added Theory of Operation Section ........................................... 10  
Changes to Table 4 and Figure 24 Caption ................................. 11  
Changes to Figure 25...................................................................... 12  
Updated Outline Dimensions ....................................................... 13  
Changes to Ordering Guide .......................................................... 13  
Rev. D | Page 2 of 13  
 
Data Sheet  
HMC856  
SPECIFICATIONS  
ELECTRICAL SPECIFICATIONS  
TA = 25°C, VEE = −3.3 V, VR = 0 V, unless otherwise noted.  
Table 1.  
Parameter  
Symbol  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
POWER SUPPLY  
Voltage  
Current  
VEE  
−3.7  
−3.3  
185  
610  
−2.9  
28  
V
mA  
mW  
Gbps  
POWER CONSUMPTION  
MAXIMUM DATA RATE  
INPUT VOLTAGE  
Single-Ended  
Differential  
CML logic input  
−1.5  
0.1  
+0.5  
2.0  
V
V
OUTPUT  
Rise/Fall Time  
Single-Ended Amplitude  
Differential Amplitude  
High Voltage  
Low Voltage  
RETURN LOSS  
Input  
tR, tF  
Differential, 20% to 80%  
20/18  
565  
1130  
−20  
ps  
mV p-p  
mV p-p  
mV  
500  
1350  
−585  
mV  
Frequency <12 GHz  
RMS  
10  
10  
dB  
dB  
Output  
JITTER  
Random  
Deterministic  
JR  
JD  
0.2  
<2  
ps rms  
ps p-p  
215 − 1 pseudo random binary sequence (PRBS)  
28 Gbps input  
VR PIN CURRENT  
VR = 0 V  
VR = 0.4 V  
3
mA  
mA  
4.25  
DELAY  
Propagation Delay Data to Data  
Control Range  
Temperature Variation  
tPROP  
255  
92  
ps  
ps  
ps  
ps  
ps  
TA = 85°C  
TA = −40°C  
9
4
12  
8
Resolution  
tPROG_DELAY  
3
TIMING DIAGRAM  
I±  
1
2
3
4
5
6
tPROP  
80%  
20%  
80%  
20%  
O±  
1
1
2
3
4
5
tF  
tR  
tPROG_DELAY  
Figure 2. Timing Diagram  
Rev. D | Page 3 of 13  
 
 
 
HMC856  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
Parameter  
Rating  
Power Supply Voltage (VEE)  
Input Signals  
Output Signals  
Maximum Junction Temperature  
Continuous Power Dissipation, PDISS  
(T = 85°C, Derate 33 mW/°C Above 85°C)  
Thermal Resistance, θJC (Worst Case Device  
to Package Exposed Paddle)  
−3.75 V to +0.5 V  
−2 V to +0.5 V  
−1.5 V to 0.5 V  
125°C  
1.33 W  
ESD CAUTION  
30°C/W  
Temperature  
Storage  
Operating  
−65°C to +150°C  
−40°C to +85°C  
260°C  
Reflow (MSL3 Rating)  
ESD Sensitivity Human Body Model (HBM)  
Class 1C  
Rev. D | Page 4 of 13  
 
 
Data Sheet  
HMC856  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
GND  
I+  
I–  
1
2
3
4
5
6
7
8
24 GND  
23 O+  
22  
O–  
HMC856  
21 GND  
GND  
GND  
B0+  
B0–  
NC  
TOP VIEW  
(Not to Scale)  
20  
19  
GND  
B4+  
18 B4–  
17 NC  
PACKAGE  
BASE  
V
EE  
NOTES  
1. NC = NO CONNECT.  
2. NIC = NOT INTERNALLY CONNECTED.  
3. EXPOSED PAD. THE EXPOSED PAD MUST  
BE CONNECTED TO THE NEGATIVE  
VOLTAGE SUPPLY.  
Figure 3. Pin Configuration  
Table 3. Pin Function Descriptions  
Pin Number  
1, 4, 5, 11, 14, 20, 21, 24  
2, 3  
Mnemonic  
Description  
GND  
I+, I−  
Signal Ground.  
Differential Data Inputs. CML referenced to positive supply.  
6, 7, 9, 10, 12, 13, 15, 16, B0+, B0−, B1+, B1−, B2+, B2−,  
Differential Digital Control Inputs. CML referenced to positive supply.  
18, 19  
B3+, B3−, B4−, B4+  
8, 17  
NC  
No Connect. These pins are internally connected to the device. These pins can  
be connected to radio frequency (RF)/dc ground without affecting performance.  
25, 32  
NIC  
Not Internally Connected. These pins can be connected to radio frequency  
(RF)/dc ground without affecting performance.  
22, 23  
26, 31  
27, 30  
O−, O+  
GND  
VEE  
Differential Data Outputs. CML referenced to positive supply, 50 Ω termination.  
Supply Ground.  
Negative Supply Voltage. These pins and the exposed pad must be connected  
to the negative voltage supply.  
28  
29  
VR  
Output Level Control. Output levels can be increased or decreased by  
applying voltage to VR, as shown in Figure 12.  
DC Bias Voltage. VB must be connected to ground.  
VB  
EPAD (VEE)  
Exposed Pad. The exposed pad must be connected to the negative voltage supply.  
Rev. D | Page 5 of 13  
 
HMC856  
Data Sheet  
INTERFACE SCHEMATICS  
GND  
GND  
GND  
O+  
GND  
O–  
50Ω  
50Ω  
Figure 4. GND Interface Schematic  
Figure 7. O+, O− Interface Schematic  
VR  
GND  
GND  
I+  
GND  
I–  
50Ω  
50Ω  
Figure 5. I+, I− Interface Schematic  
Figure 8. VR Interface Schematic  
GND  
GND  
600Ω  
Bx+  
GND  
600Ω  
Bx–  
Figure 6. BX+, BX− Interface Schematic  
Rev. D | Page 6 of 13  
 
Data Sheet  
HMC856  
TYPICAL PERFORMANCE CHARACTERISTICS  
VEE = −3.3 V, VR = 0 V, 400 mV, 28 Gbps, PRBS 215 − 1, input applied, unless otherwise noted.  
280  
260  
240  
220  
200  
180  
160  
140  
120  
1500  
1400  
1300  
1200  
1100  
1000  
900  
+85°C  
+25°C  
–40°C  
+85°C  
+25°C  
–40°C  
800  
700  
600  
500  
–1.2  
–3.7  
–3.6  
–3.5  
–3.4  
–3.3  
–3.2  
–3.1  
–3.0  
–2.9  
–1.0  
–0.8  
–0.6  
–0.4  
–0.2  
0
0.2  
0.4  
SUPPLY VOLTAGE (V)  
VR (V)  
Figure 9. DC Current vs. Supply Voltage, VR = 0 V at Various Temperatures  
Figure 12. Differential Output Voltage vs. VR at Various Temperatures  
280  
24  
+85°C  
260  
RISE  
FALL  
+25°C  
–40°C  
240  
22  
20  
18  
16  
14  
220  
200  
180  
160  
140  
120  
100  
80  
–1.2  
–1.0  
–0.8  
–0.6  
–0.4  
–0.2  
0
0.2  
0.4  
–3.7  
–3.6  
–3.5  
–3.4  
–3.3  
–3.2  
–3.1  
–3.0  
–2.9  
VR (V)  
SUPPLY VOLTAGE (V)  
Figure 10. DC Current vs. VR at Various Temperatures  
Figure 13. Rise/Fall Time vs. Supply Voltage  
1500  
1400  
1300  
1200  
1100  
1000  
900  
26  
+85°C  
+25°C  
–40°C  
RISE  
FALL  
24  
22  
20  
18  
16  
800  
700  
–3.7  
–3.6  
–3.5  
–3.4  
–3.3  
–3.2  
–3.1  
–3.0  
–2.9  
–1.2  
–1.0  
–0.8  
–0.6  
–0.4  
–0.2  
0
0.2  
0.4  
SUPPLY VOLTAGE (V)  
VR (V)  
Figure 11. Differential Output Voltage vs. Supply Voltage at Various  
Temperatures  
Figure 14. Rise/Fall Time vs. VR  
Rev. D | Page 7 of 13  
 
 
HMC856  
Data Sheet  
100  
98  
96  
94  
92  
90  
88  
86  
84  
82  
100  
98  
96  
94  
92  
90  
88  
86  
84  
82  
80  
+85°C  
+25°C  
–40°C  
+85°C  
+25°C  
–40°C  
80  
–3.7  
–3.6  
–3.5  
–3.4  
–3.3  
–3.2  
–3.1  
–3.0  
–2.9  
–1.2  
–1.0  
–0.8  
–0.6  
–0.4  
–0.2  
0
0.2  
0.4  
SUPPLY VOLTAGE (V)  
VR (V)  
Figure 15. Delay vs. Supply Voltage at Various Temperatures  
Figure 18. Delay vs. VR at Various Temperatures  
10  
5
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
–5  
–10  
–15  
–20  
–25  
–30  
+85°C  
+25°C  
–40°C  
0
5
10  
15  
20  
25  
0
4
8
12  
16  
20  
24  
28  
32  
FREQUENCY (GHz)  
Bx± DIGITAL DELAY SETTING (Bits)  
Figure 19. Normalized Delay vs. Bx Digital Delay Setting  
Figure 16. Input Return Loss vs. Frequency  
(Device Measured on an Evaluation Board with Port Extensions Normalized  
to Minimum Delay, 0 Setting (B4 :B0 = 00000), at its Respective  
Temperature)  
(Device Measured on an Evaluation Board with Port Extensions)  
360  
350  
5
0
+85°C  
340  
+25°C  
–40°C  
–5  
330  
320  
310  
300  
290  
280  
270  
260  
250  
–10  
–15  
–20  
–25  
–30  
–35  
0
4
8
12  
16  
20  
24  
28  
32  
0
5
10  
15  
20  
25  
SETTING (Bits)  
FREQUENCY (GHz)  
Figure 20. Absolute Delay vs. Setting  
(Normalized to 0 Setting at its Respective Temperature)  
Figure 17. Output Return Loss vs. Frequency  
(Device Measured on an Evaluation Board with Port Extensions)  
Rev. D | Page 8 of 13  
Data Sheet  
HMC856  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
–30dBm  
–25dBm  
–20dBm  
–10dBm  
0dBm  
5
0
5
10  
15  
20  
CH5 98.0mV  
17.6ps  
FREQUENCY (GHz)  
Figure 21. Single-Ended Output Eye Diagram at 28 Gbps,  
Measured VOUT = 550 mV p-p  
Figure 23. Saturated Gain vs. Frequency at Various Input Powers  
(Device Measured on an Evaluation Board with Port Extensions), The Output  
is Saturated, Limiting the Gain for Larger Input Signals, Gain ≈ Saturated  
Output Power − Input Power  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
31  
16  
8
4
2
1
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
Figure 22. Delay vs. Temperature at Various Bit Settings  
(Device Measured on an Evaluation Board with Port Extensions)  
Rev. D | Page 9 of 13  
 
HMC856  
Data Sheet  
THEORY OF OPERATION  
The HMC856 is a wideband time delay device with a 5-bit digital  
control designed for timing compensation or clock skew  
management applications. The HMC856 operates from a single  
−3.3 V supply and is available in a 5 mm × 5 mm LCC package.  
50 Ω is recommended. For dc coupling, inputs and outputs can be  
directly interfaced with another CML circuit. The control lines, B4  
to B0, are also CML, but they are terminated with 600 Ω to the  
positive rail for low power operation.  
The HMC856 can support data rates up to 28 Gbps and is able  
to provide 100 ps variable delay with 3 ps resolution. The total  
propagation delay of the HMC856 varies between 250 ps and  
350 ps. The maximum achievable bandwidth of the HMC856  
depends on the power of the input signal. The highest  
bandwidth of the device is at the larger input power levels, as  
shown in Figure 23.  
The HMC856 features an output level control pin, VR, that  
allows loss compensation or signal level optimization. VR can  
have a voltage value between −1.2 V and 0.4 V, which results in  
a differential output swing of 500 mV p-p and 1350 mV p-p.  
Increasing the output swing affects the rise and fall times. As  
VR becomes higher, the rise and fall times increase. Changing  
the VR pin also changes the power dissipation because the  
HMC856 can consume between 140 mA and 200 mA at room  
temperature depending on the VR pin.  
The HMC856 uses a CML interface, which uses 50 Ω internal  
terminations to the ground. The input and output pins can be  
interfaced with either ac or dc coupling. For ac coupling, using a  
series resistor, which is effectively short circuit, and an ac load of  
Rev. D | Page 10 of 13  
 
Data Sheet  
HMC856  
APPLICATIONS INFORMATION  
EVALUATION PRINTED CIRCUIT BOARD (PCB)  
Table 4. Bill of Materials for the Evaluation PCB 127102-  
HMC856LC51  
The evaluation PCB of the HMC856 uses RF circuit design  
techniques. Signal lines must have 50 Ω impedance whereas the  
package ground leads must connect directly to the ground plane  
similar to that shown in Figure 25. The exposed metal package  
base must connect to VEE. A sufficient number of via holes must  
connect the top and bottom ground planes. The evaluation PCB  
shown in Figure 24 is available from Analog Devices, Inc., upon  
request. Install a jumper on the JP1 header to short VR to GND  
for normal operation.  
Item  
Description  
J1 to J4  
J5  
K connectors  
0.1 inch 2 × 5 header  
J7 to J14  
JP1  
C1, C2  
C3 to C5  
R1, R8  
R2  
R3 to R7  
U1  
PCB2  
0.04 inch dc pin  
0.1 inch 2 position header with shunt  
4.7 μF capacitor, Case A  
100 pF capacitor, 0402 package  
10 Ω resistor, 0603 package  
1.2 kΩ resistor, 0603 package  
2.7 kΩ resistor, 0603 package  
28 Gbps digital time delay HMC856  
127100 evaluation board PCB  
1 127100 is the raw bare PCB. Reference 127102-HMC856LC5 when ordering  
the complete evaluation PCB.  
2 Use Arlon 25FR or Rogers 4350 for circuit board material.  
Figure 24. Evaluation Board Layout, Top Side  
Rev. D | Page 11 of 13  
 
 
 
HMC856  
Data Sheet  
TYPICAL APPLICATION CIRCUIT  
VB  
J12  
VR  
J13  
GND  
J14  
R8  
10  
JP1  
1
2
+
C4  
100pF  
C5  
100pF  
C2  
4.7µF  
R1  
10Ω  
C1  
4.7µF  
C3  
100pF  
+
J10  
J9  
O+  
J4  
I+  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
J1  
50Ω  
50Ω  
50Ω  
50Ω  
DELAY  
O–  
J3  
I–  
J2  
600Ω  
600Ω  
600Ω 600Ω  
600Ω  
VT  
J8  
VS  
J7  
R7  
2.7kΩ  
R2  
1.2kΩ  
R3  
2.7kΩ  
R4  
2.7kΩ  
R5  
2.7kΩ  
R6  
2.7kΩ  
2
1
4
3
6
5
8
7
10  
9
J5  
V
EE  
J11  
Figure 25. Typical Application Circuit  
Rev. D | Page 12 of 13  
 
 
Data Sheet  
HMC856  
OUTLINE DIMENSIONS  
5.13  
5.00 SQ  
4.87  
0.36  
0.30  
0.24  
PIN 1  
INDICATOR  
PIN 1  
(0.32 × 0.32)  
25  
32  
24  
1
0.50  
BSC  
EXPOSED  
PAD  
3.50 SQ  
17  
8
16  
9
BOTTOM VIEW  
3.50 REF  
TOP VIEW  
SIDE VIEW  
0.40  
BSC  
1.12 MAX  
FOR PROPER CONNECTION OF  
THE EXPOSED PAD, REFER TO  
THE PIN CONFIGURATION AND  
FUNCTION DESCRIPTIONS  
SEATING  
PLANE  
SECTION OF THIS DATA SHEET.  
Figure 26. 32-Terminal Ceramic Leadless Chip Carrier [LCC]  
(HE-32-1)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Temperature  
Range  
Moisture Sensitivity  
Package  
Option  
Model1  
Level (MSL) Rating2  
Package Description  
HMC856LC5  
HMC856LC5TR  
HMC856LC5TR-R5  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
MSL3  
MSL3  
MSL3  
32-Terminal Ceramic Leadless Chip Carrier [LCC]  
32-Terminal Ceramic Leadless Chip Carrier [LCC]  
32-Terminal Ceramic Leadless Chip Carrier [LCC]  
Evaluation Board  
HE-32-1  
HE-32-1  
HE-32-1  
127102-  
HMC856LC5  
1 All models are RoHS compliant parts.  
2 See the Absolute Maximum Ratings section.  
©2018 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D14720-0-6/18(D)  
Rev. D | Page 13 of 13  
 
 

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