AD637ARBR [ADI]

RMS TO DC CONVERTER, 0.15MHz, PDSO16;
AD637ARBR
型号: AD637ARBR
厂家: ADI    ADI
描述:

RMS TO DC CONVERTER, 0.15MHz, PDSO16

光电二极管 转换器
文件: 总20页 (文件大小:607K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
High Precision, Wideband  
RMS-to-DC Converter  
AD637  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
High accuracy  
0.02% maximum nonlinearity, 0 V to 2 V rms input  
0.10% additional error to crest factor of 3  
Wide bandwidth  
8 MHz at 2 V rms input  
600 kHz at 100 mV rms  
BUFF IN  
BUFF  
OUT  
25k  
RMS OUT  
ABSOLUTE  
VALUE  
SQUARER/  
DIVIDER  
V
IN  
Computes  
True rms  
Square  
C
25kΩ  
AV  
DEN INPUT  
dB OUTPUT  
Mean square  
Absolute value  
dB output (60 dB range)  
OUTPUT  
OFFSET  
BIAS  
Chip select/power-down feature allows  
Analog three-state operation  
Quiescent current reduction from 2.2 mA to 350 μA  
14-lead SBDIP, 14-lead low cost CERDIP, and 16-lead SOIC_W  
COMMON  
CS  
AD637  
Figure 1.  
GENERAL DESCRIPTION  
The AD637 is a complete, high accuracy, monolithic rms-to-dc  
converter that computes the true rms value of any complex  
waveform. It offers performance that is unprecedented in  
integrated circuit rms-to-dc converters and comparable to  
discrete and modular techniques in accuracy, bandwidth, and  
dynamic range. A crest factor compensation scheme in the  
AD637 permits measurements of signals with crest factors of  
up to 10 with less than 1% additional error. The wide band-  
width of the AD637 permits the measurement of signals up to  
600 kHz with inputs of 200 mV rms and up to 8 MHz when the  
input levels are above 1 V rms.  
The input circuitry of the AD637 is protected from overload  
voltages in excess of the supply levels. The inputs are not  
damaged by input signals if the supply voltages are lost.  
The AD637 is available in accuracy Grade J and Grade K for  
commercial temperature range (0°C to 70°C) applications, accuracy  
Grade A and Grade B for industrial range (−40°C to +85°C) appli-  
cations, and accuracy Grade S rated over the −55°C to +125°C  
temperature range. All versions are available in hermetically sealed,  
14-lead SBDIP, 14-lead CERDIP, and 16-lead SOIC_W packages.  
The AD637 computes the true root mean square, mean square,  
or absolute value of any complex ac (or ac plus dc) input  
waveform and gives an equivalent dc output voltage. The true  
rms value of a waveform is more useful than an average  
rectified signal because it relates directly to the power of the  
signal. The rms value of a statistical signal is also related to the  
standard deviation of the signal.  
As with previous monolithic rms converters from Analog  
Devices, Inc., the AD637 has an auxiliary dB output available to  
users. The logarithm of the rms output signal is brought out to a  
separate pin, allowing direct dB measurement with a useful  
range of 60 dB. An externally programmed reference current  
allows the user to select the 0 dB reference voltage to correspond to  
any level between 0.1 V and 2.0 V rms.  
The AD637 is laser wafer trimmed to achieve rated performance  
without external trimming. The only external component  
required is a capacitor that sets the averaging time period. The  
value of this capacitor also determines low frequency accuracy,  
ripple level, and settling time.  
A chip select connection on the AD637 permits the user to  
decrease the supply current from 2.2 mA to 350 μA during periods  
when the rms function is not in use. This feature facilitates the  
addition of precision rms measurement to remote or handheld  
applications where minimum power consumption is critical. In  
addition, when the AD637 is powered down, the output goes to a  
high impedance state. This allows several AD637s to be tied  
together to form a wideband true rms multiplexer.  
The on-chip buffer amplifier can be used either as an input  
buffer or in an active filter configuration. The filter can be used  
to reduce the amount of ac ripple, thereby increasing accuracy.  
Rev. K  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
AD637  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Choosing the Averaging Time Constant....................................9  
Frequency Response .................................................................. 11  
AC Measurement Accuracy and Crest Factor........................ 12  
Connection for dB Output........................................................ 12  
dB Calibration............................................................................. 13  
Low Frequency Measurements................................................. 14  
Vector Summation ..................................................................... 14  
Evaluation Board ............................................................................ 16  
Outline Dimensions....................................................................... 19  
Ordering Guide .......................................................................... 20  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Absolute Maximum Ratings............................................................ 5  
ESD Caution.................................................................................. 5  
Pin Configurations and Function Descriptions ........................... 6  
Functional Description.................................................................... 7  
Standard Connection................................................................... 8  
Chip Select..................................................................................... 8  
Optional Trims for High Accuracy............................................ 8  
REVISION HISTORY  
2/11—Rev. J to Rev. K  
4/05—Rev. F to Rev. G  
Changes to Figure 15...................................................................... 11  
Changes to Figure 16...................................................................... 12  
Changes to Evaluation Board Section and Figure 23................. 16  
Added Figure 24; Renumbered Sequentially .............................. 17  
Changes to Figure 25 Through Figure 29.................................... 17  
Changes to Figure 30...................................................................... 18  
Added Figure 31.............................................................................. 18  
Deleted Table 6; Renumbered Sequentially ................................ 18  
Changes to Ordering Guide .......................................................... 20  
Updated Format..................................................................Universal  
Changes to Figure 1...........................................................................1  
Changes to General Description .....................................................1  
Deleted Product Highlights .............................................................1  
Moved Figure 4 to Page ....................................................................8  
Changes to Figure 5...........................................................................9  
Changes to Figure 8........................................................................ 10  
Changes to Figure 11, Figure 12, Figure 13, and Figure 14....... 11  
Changes to Figure 19...................................................................... 14  
Changes to Figure 20...................................................................... 14  
Changes to Figure 21...................................................................... 16  
Updated Outline Dimensions....................................................... 17  
Changes to Ordering Guide.......................................................... 18  
4/07—Rev. I to Rev. J  
Added Evaluation Board Section ................................................. 16  
Updated Outline Dimensions....................................................... 20  
10/06—Rev. H to Rev. I  
3/02—Rev. E to Rev. F  
Edits to Ordering Guide ...................................................................3  
Changes to Table 1............................................................................ 3  
Changes to Figure 4.......................................................................... 7  
Changes to Figure 7.......................................................................... 9  
Changes to Figure 16, Figure 18, and Figure 19 ......................... 12  
Changes to Figure 20...................................................................... 13  
12/05—Rev. G to Rev. H  
Updated Format..................................................................Universal  
Changes to Figure 1.......................................................................... 1  
Changes to Figure 11...................................................................... 10  
Updated Outline Dimensions....................................................... 16  
Changes to Ordering Guide .......................................................... 17  
Rev. K | Page 2 of 20  
 
AD637  
SPECIFICATIONS  
At 25°C and 15 V dc, unless otherwise noted.1  
Table 1.  
AD637J/AD637A  
AD637K/AD637B  
AD637S  
Typ  
Parameter  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Max  
Unit  
TRANSFER FUNCTION  
2
2
2
VOUT  
=
avg ×(VIN  
)
VOUT  
=
avg ×(VIN  
)
VOUT  
=
avg ×(VIN )  
CONVERSION ACCURACY  
Total Error, Internal Trim2  
(Figure 5)  
1
0.5  
3.0 0.6  
150  
0.5 0.2  
2.0 0.3  
1
0.5 mV ±± of  
reading  
TMIN to TMAX  
6
0.7 mV ± ± of  
reading  
vs. Supply  
+VIN = 300 mV  
30  
30  
150  
300  
0.1  
30  
150  
300  
0.25  
μV/V  
μV/V  
vs. Supply  
−VIN = −300 mV  
100  
300  
100  
100  
DC Reversal  
Error at 2 V  
0.25  
± of  
reading  
Nonlinearity 2 V Full Scale3  
Nonlinearity 7 V Full Scale  
Total Error, External Trim  
0.04  
0.05  
0.02  
0.05  
0.04  
0.05  
± of FSR  
± of FSR  
±0.5 ± 0.1  
±0.25 ± 0.05  
±0.5 ± 0.1  
mV ± ± of  
reading  
ERROR VS. CREST FACTOR4  
Crest Factor 1 to 2  
Specified accuracy  
±0.1  
Specified accuracy  
±0.1  
Specified accuracy  
±0.1  
Crest Factor = 3  
± of  
reading  
Crest Factor = 10  
±1.0  
25  
±1.0  
25  
±1.0  
25  
± of  
reading  
AVERAGING TIME CONSTANT  
INPUT CHARACTERISTICS  
Signal Range, ±15 V Supply  
Continuous RMS Level  
Peak Transient Input  
ms/μF CAV  
0 to 7  
0 to 7  
0 to 7  
V rms  
V p-p  
±15  
±15  
±15  
Signal Range, ±5 V Supply  
Continuous RMS Level  
Peak Transient Input  
0 to 4  
0 to 4  
0 to 4  
V rms  
V p-p  
V p-p  
±ꢀ  
±ꢀ  
±ꢀ  
Maximum Continuous  
Nondestructive  
±15  
±15  
±15  
Input Level  
(All Supply Voltages)  
Input Resistance  
ꢀ.4  
8
9.ꢀ  
ꢀ.4  
8
9.ꢀ  
ꢀ.4  
8
9.ꢀ  
kΩ  
Input Offset Voltage  
FREQUENCY RESPONSE5  
±0.5  
±0.2  
±0.5  
mV  
Bandwidth for 1±  
Additional Error  
(0.09 dB)  
VIN = 20 mV  
VIN = 200 mV  
VIN = 2 V  
11  
11  
11  
kHz  
kHz  
kHz  
ꢀꢀ  
ꢀꢀ  
ꢀꢀ  
200  
200  
200  
±3 dB Bandwidth  
VIN = 20 mV  
VIN = 200 mV  
VIN = 2 V  
150  
1
150  
1
150  
1
kHz  
MHz  
MHz  
8
8
8
Rev. K | Page 3 of 20  
 
AD637  
AD637J/AD637A  
AD637K/AD637B  
AD637S  
Typ  
Parameter  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Max  
1
Unit  
OUTPUT CHARACTERISTICS  
Offset Voltage  
1
0.5  
mV  
mV/°C  
V
vs. Temperature  
±0.05  
0.089  
±0.04  
0.056  
±0.04  
0.07  
Voltage Swing,  
0 to 12.0 13.5  
0 to 12.0 13.5  
0 to 12.0 13.5  
±15 V Supply, 2 kΩ Load  
Voltage Swing,  
±3 V Supply, 2 kΩ Load  
0 to 2  
6
2.2  
0 to 2  
6
2.2  
0 to 2  
6
2.2  
V
Output Current  
mA  
mA  
Ω
Short-Circuit Current  
20  
20  
20  
Resistance  
0.5  
0.5  
0.5  
Chip Select High  
Resistance  
100  
100  
100  
kΩ  
Chip Select Low  
dB OUTPUT  
Error, VIN 7 mV to 7 V rms,  
0 dB = 1 V rms  
±0.5  
±0.3  
±0.5  
dB  
Scale Factor  
−3  
−3  
−3  
mV/dB  
Scale Factor Temperature  
Coefficient  
+0.33  
+0.33  
+0.33  
± of  
reading/°C  
−0.033  
20  
−0.033  
20  
−0.033  
20  
dB/°C  
μA  
IREF for 0 dB = 1 V rms  
IREF Range  
5
1
80  
100  
5
1
80  
100  
5
1
80  
100  
μA  
BUFFER AMPLIFIER  
Input Output  
−VS to (+VS − 2.5 V)  
−VS to (+VS − 2.5 V)  
−VS to (+VS − 2.5 V)  
V
Voltage Range  
Input Offset Voltage  
Input Current  
±0.8  
2
±0.5  
1
5
±0.8  
±2  
mV  
nA  
±2  
108  
10  
±2  
108  
±2  
108  
±10  
Input Resistance  
Output Current  
Short-Circuit Current  
Small Signal Bandwidth  
Slew Rateꢀ  
Ω
−0.13  
+5  
−0.13  
+5  
−0.13  
+5  
mA  
mA  
MHz  
V/μs  
20  
1
20  
1
20  
1
5
5
5
DENOMINATOR INPUT  
Input Range  
0 to 10  
0 to 10  
0 to 10  
V
Input Resistance  
Offset Voltage  
20  
25  
30  
20  
25  
30  
20  
25  
30  
kΩ  
mV  
±0.2  
±0.5  
±0.2  
±0.5  
±0.2  
±0.5  
CHIP SELECT (CS)  
RMS On Level  
Open or 2.4 V < VC < +VS  
Open or 2.4 V < VC < +VS  
VC < 0.2 V  
Open or 2.4 V < VC < +VS  
RMS Off Level  
VC < 0.2 V  
VC < 0.2 V  
IOUT of Chip Select  
CS Low  
10  
0
10  
0
10  
0
μA  
μA  
μs  
CS High  
On Time Constant  
Off Time Constant  
POWER SUPPLY  
Operating Voltage Range  
Quiescent Current  
Standby Current  
10 + ((25 kΩ) × CAV  
10 + ((25 kΩ) × CAV  
)
)
10 + ((25 kΩ) × CAV  
10 + ((25 kΩ) × CAV  
)
)
10 + ((25 kΩ) × CAV  
10 + ((25 kΩ) × CAV  
)
)
μs  
3.0  
18  
3.0  
18  
3.0  
18  
V
2.2  
3
2.2  
3
2.2  
3
mA  
μA  
350  
450  
350  
450  
350  
450  
1 Specifications shown in bold are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.  
All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units.  
2 Accuracy specified 0 V rms to 7 V rms dc with ADꢀ37 connected, as shown in Figure 5.  
3 Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V.  
4 Error vs. crest factor is specified as additional error for 1 V rms.  
5 Input voltages are expressed in volts rms. Percent is in ± of reading.  
With external 2 kΩ pull-down resistor tied to −VS.  
Rev. K | Page 4 of 20  
AD637  
ABSOLUTE MAXIMUM RATINGS  
Stresses above those listed under Absolute Maximum Ratings  
Table 2.  
Parameter  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rating  
ESD Rating  
Supply Voltage  
500 V  
±18 V dc  
108 mW  
Indefinite  
−ꢀ5°C to +150°C  
300°C  
Internal Quiescent Power Dissipation  
Output Short-Circuit Duration  
Storage Temperature Range  
Lead Temperature (Soldering 10 sec)  
Rated Operating Temperature Range  
ADꢀ37J, ADꢀ37K  
ESD CAUTION  
0°C to 70°C  
ADꢀ37A, ADꢀ37B  
ADꢀ37S, 59ꢀ2-89ꢀ3701CA  
−40°C to +85°C  
−55°C to +125°C  
Rev. K | Page 5 of 20  
 
AD637  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
BUFF IN  
NC  
1
2
3
4
5
6
7
14 BUFF OUT  
13  
BUFF IN  
NC  
1
2
3
4
5
6
7
8
16 BUFF OUT  
V
15  
14  
V
IN  
IN  
COMMON  
OUTPUT OFFSET  
CS  
12 NC  
11 +V  
COMMON  
OUTPUT OFFSET  
CS  
NC  
AD637  
AD637  
TOP VIEW  
13 +V  
12 –V  
S
S
S
TOP VIEW  
(Not to Scale)  
(Not to Scale)  
10 –V  
S
DEN INPUT  
dB OUTPUT  
9
8
RMS OUT  
DEN INPUT  
dB OUTPUT  
NC  
11 RMS OUT  
C
10  
9
C
AV  
AV  
NC  
NC = NO CONNECT  
NC = NO CONNECT  
Figure 2. 14-Lead SBDIP/CERDIP Pin Configuration  
Figure 3. 16-Lead SOIC_W Pin Configuration  
Table 3. 14-Lead SBDIP/CERDIP Pin Function Descriptions  
Table 4. 16-Lead SOIC_W Pin Function Descriptions  
Pin No. Mnemonic  
Description  
Pin No.  
Mnemonic  
Description  
1
2, 12  
3
BUFF IN  
NC  
COMMON  
Buffer Input  
No Connection  
Analog Common  
1
BUFF IN  
Buffer Input  
No Connection  
Analog Common  
2, 8, 9, 14 NC  
3
COMMON  
4
OUTPUT OFFSET Output Offset  
4
OUTPUT OFFSET Output Offset  
5
CS  
Chip Select  
5
CS  
Chip Select  
7
8
9
10  
11  
13  
14  
DEN INPUT  
dB OUTPUT  
CAV  
RMS OUT  
−VS  
+VS  
VIN  
BUFF OUT  
Denominator Input  
dB Output  
Averaging Capacitor Connection  
RMS Output  
Negative Supply Rail  
Positive Supply Rail  
Signal Input  
7
DEN INPUT  
dB OUTPUT  
CAV  
RMS OUT  
−VS  
+VS  
VIN  
BUFF OUT  
Denominator Input  
dB Output  
Averaging Capacitor Connection  
RMS Output  
Negative Supply Rail  
Positive Supply Rail  
Signal Input  
10  
11  
12  
13  
15  
1ꢀ  
Buffer Output  
Buffer Output  
Rev. K | Page ꢀ of 20  
 
AD637  
FUNCTIONAL DESCRIPTION  
FILTER/AMPLIFIER  
8
11  
9
C
AV  
14  
BUFF OUT  
ONE QUADRANT  
SQUARER/DIVIDER  
24k  
+V  
S
1
BUFF IN  
BUFFER  
AMPLIFIER  
A5  
RMS  
OUT  
A4  
I
4
dB  
7
3
I
OUTPUT  
1
24kΩ  
COMMON  
Q4  
Q1  
ABSOLUTE VALUE VOLTAGE TO  
CURRENT CONVERTER  
5
6
4
CS  
Q5  
BIAS  
DEN  
INPUT  
I
3
24kΩ  
Q2  
Q3  
A3  
6kΩ  
6kΩ  
OUTPUT  
OFFSET  
A2  
12kΩ  
125Ω  
AD637  
V
13  
IN  
A1  
10 –V  
S
Figure 4. Simplified Schematic  
The AD637 embodies an implicit solution of the rms equation  
that overcomes the inherent limitations of straightforward rms  
computation. The actual computation performed by the AD637  
follows the equation  
To compute the absolute value of the input signal, the averaging  
capacitor is omitted. However, a small capacitance value at the  
averaging capacitor pin is recommended to maintain stability;  
5 pF is sufficient for this purpose. The circuit operates identically  
to that of the rms configuration, except that I3 is now equal to  
I4, giving  
2
VIN  
V rms = Avg  
V rms  
2
I1  
I4 =  
I4  
Figure 4 is a simplified schematic of the AD637, subdivided  
into four major sections: absolute value circuit (active rectifier),  
squarer/divider, filter circuit, and buffer amplifier. The input  
voltage (VIN), which can be ac or dc, is converted to a unipolar  
current I1 by the active rectifiers A1 and A2. I1 drives one input  
of the squarer/divider, which has the transfer function  
I4 = |I1|  
The denominator current can also be supplied externally by  
providing a reference voltage (VREF) to Pin 6. The circuit operates  
identically to the rms case, except that I3 is now proportional to  
VREF. Therefore,  
2
I1  
2
I4 =  
I1  
I3  
I4 = Avg  
I3  
The output current of the squarer/divider I4 drives A4, forming  
a low-pass filter with the external averaging capacitor. If the RC  
time constant of the filter is much greater than the longest period  
of the input signal, then the A4 output is proportional to the  
average of I4. The output of this filter amplifier is used by A3  
to provide the denominator current I3, which equals Avg I4 and  
is returned to the squarer/divider to complete the implicit rms  
computation  
and  
2
VIN  
VOUT  
=
VDEN  
This is the mean square of the input signal.  
2
I1  
I4  
I4 = Avg  
= I1 rms  
and  
V
OUT = VIN rms  
Rev. K | Page 7 of 20  
 
 
AD637  
20  
15  
10  
5
STANDARD CONNECTION  
The AD637 is simple to connect for a majority of rms  
measurements. In the standard rms connection shown in Figure 5,  
only a single external capacitor is required to set the averaging  
time constant. In this configuration, the AD637 computes the  
true rms of any input signal. An averaging error, the magnitude  
of which is dependent on the value of the averaging capacitor,  
is present at low frequencies. For example, if the filter capacitor,  
C
AV, is 4 μF, the error is 0.1% at 10 Hz and increases to 1% at  
3 Hz. To measure ac signals, the AD637 can be ac-coupled by  
adding a nonpolar capacitor in series with the input, as shown  
in Figure 5.  
0
0
±3  
±5  
±10  
±15  
±18  
SUPPLY VOLTAGE – DUAL SUPPLY (V)  
AD637  
1
BUFF IN  
BUFF  
OUT 14  
NC  
Figure 6. Maximum VOUT vs. Supply Voltage  
2
3
NC  
V
IN  
V
CHIP SELECT  
IN  
13  
ABSOLUTE  
VALUE  
The AD637 includes a chip select feature that allows the user  
to decrease the quiescent current of the device from 2.2 mA to  
350 μA. This is done by driving CS, Pin 5, to below 0.2 V dc.  
Under these conditions, the output goes into a high impedance  
state. In addition to reducing the power consumption,  
the outputs of multiple devices can be connected in parallel  
to form a wide bandwidth rms multiplexer. Tie Pin 5 high to  
disable the chip select.  
COMMON  
NC 12  
11  
+V  
S
(OPTIONAL)  
SQUARER/  
DIVIDER  
OUTPUT  
OFFSET  
4
5
6
7
+V  
BIAS  
+V  
S
S
4.7k  
CS  
10  
9
–V  
C
–V  
S
S
25kΩ  
DEN  
INPUT  
2
= V  
IN  
V
OUT  
25kΩ  
C
+
8
AV  
dB OUTPUT  
AV  
OPTIONAL TRIMS FOR HIGH ACCURACY  
The AD637 includes provisions for trimming out output offset  
and scale factor errors resulting in significant reduction in the  
maximum total error, as shown in Figure 7. The residual error is  
due to a nontrimmable input offset in the absolute value circuit  
and the irreducible nonlinearity of the device.  
Figure 5. Standard RMS Connection  
The performance of the AD637 is tolerant of minor variations  
in the power supply voltages; however, if the supplies used  
exhibit a considerable amount of high frequency ripple, it is  
advisable to bypass both supplies to ground through a 0.1 μF  
Referring to Figure 8, the trimming process is as follows:  
ceramic disc capacitor placed as close to the device as possible.  
Offset trim: Ground the input signal (VIN) and adjust R1 to  
give 0 V output from Pin 9. Alternatively, R1 can be adjusted  
to give the correct output with the lowest expected value of VIN.  
The output signal range of the AD637 is a function of the  
supply voltages, as shown in Figure 6. The output signal can be  
used buffered or nonbuffered, depending on the characteristics  
of the load. If no buffer is needed, tie the buffer input (Pin 1) to  
common. The output of the AD637 is capable of driving 5 mA  
into a 2 kΩ load without degrading the accuracy of the device.  
Scale factor trim: Resistor R4 is inserted in series with the  
input to lower the range of the scale factor. Connect the  
desired full-scale input to VIN, using either a dc or a calibrated ac  
signal, and trim Resistor R3 to give the correct output at Pin 9  
(that is, 1 V dc at the input results in a dc output voltage of  
l.000 V dc). A 2 V p-p sine wave input yields 0.707 V dc at the  
output. Remaining errors are due to the nonlinearity.  
Rev. K | Page 8 of 20  
 
 
 
AD637  
5.0  
2.5  
E
O
IDEAL  
O
E
AD637K MAX  
DC ERROR = AVERAGE OF OUTPUT – IDEAL  
INTERNAL TRIM  
AD637K  
AVERAGE ERROR  
DOUBLE-FREQUENCY  
RIPPLE  
0
EXTERNAL TRIM  
TIME  
Figure 9. Typical Output Waveform for a Sinusoidal Input  
–2.5  
–5.0  
AD637K: 0.5mV ± 0.2%  
This ripple can add a significant amount of uncertainty to the  
accuracy of the measurement being made. The uncertainty can  
be significantly reduced through the use of a postfiltering  
network or by increasing the value of the averaging capacitor.  
0.25mV ± 0.05%  
EXTERNAL  
0
0.5  
1.0  
INPUT LEVEL (V)  
1.5  
2.0  
Figure 7. Maximum Total Error vs.  
Input Level AD637K Internal and External Trims  
The dc error appears as a frequency dependent offset at the  
output of the AD637 and follows the relationship  
AD637  
1
BUFF IN  
BUFF  
OUT 14  
NC  
1
in% of reading  
0.16 + 6.4 τ2 f 2  
R4  
2
3
NC  
V
147  
IN  
V
IN  
13  
ABSOLUTE  
VALUE  
OUTPUT  
OFFSET  
TRIM  
COMMON  
Because the averaging time constant, set by CAV, directly sets  
the time that the rms converter holds the input signal during  
computation, the magnitude of the dc error is determined only  
by CAV and is not affected by postfiltering.  
NC 12  
11  
+V  
S
SQUARER/  
DIVIDER  
R2  
OUTPUT  
OFFSET  
1MΩ  
4
5
6
7
R1  
50kΩ  
+V  
BIAS  
+V  
S
S
4.7kΩ  
–V  
CS  
10  
9
S
+V  
–V  
–V  
S
S
S
25kΩ  
DEN  
INPUT  
2
= V  
IN  
V
OUT  
100  
25kΩ  
C
+
8
AV  
C
dB OUTPUT  
AV  
SCALE FACTOR TRIM  
10  
R3  
1kΩ  
PEAK RIPPLE  
Figure 8. Optional External Gain and Offset Trims  
1.0  
CHOOSING THE AVERAGING TIME CONSTANT  
DC ERROR  
The AD637 computes the true rms value of both dc and ac  
input signals. At dc, the output tracks the absolute value of the  
input exactly; with ac signals, the AD637 output approaches the  
true rms value of the input. The deviation from the ideal rms  
value is due to an averaging error. The averaging error  
comprises an ac component and a dc component. Both  
components are functions of input signal frequency f and the  
averaging time constant τ (τ: 25 ms/μF of averaging capacitance).  
Figure 9 shows that the averaging error is defined as the peak  
0.1  
10  
100  
1k  
10k  
SINE WAVE INPUT FREQUENCY (Hz)  
Figure 10. Comparison of Percent DC Error to the Percent Peak Ripple over  
Frequency Using the AD637 in the Standard RMS Connection with a 1 × μF CAV  
The ac ripple component of averaging error is greatly reduced  
by increasing the value of the averaging capacitor. There are two  
major disadvantages to this: the value of the averaging capacitor  
becomes extremely large and the settling time of the AD637  
increases in direct proportion to the value of the averaging  
capacitor (TS = 115 ms/μF of averaging capacitance). A preferable  
method of reducing the ripple is by using the postfilter network,  
as shown in Figure 11. This network can be used in either a 1-  
pole or 2-pole configuration. For most applications, the 1-pole  
filter gives the best overall compromise between ripple and  
settling time.  
value of the ac component (ripple) and the value of the dc error.  
The peak value of the ac ripple component of the averaging  
error is defined approximately by the relationship  
50  
6.3 τf  
(
)
in % of reading where τ > 1 f  
Rev. K | Page 9 of 20  
 
 
 
 
AD637  
100  
10  
100  
10  
AD637  
1
BUFF IN  
BUFF  
OUT  
0.  
14 RMS OUT  
13  
0
1
%
E
RRO  
2
3
NC  
V
0.  
IN  
ABSOLUTE  
VALUE  
1%  
V
R
IN  
E
RRO  
+
1
COMMON  
%
C3  
NC 12  
R
E
RRO  
SQUARER/  
DIVIDER  
OUTPUT  
OFFSET  
10  
%
R
4
5
6
7
11  
10  
9
1.0  
1.0  
0.1  
0.01  
+V  
S
BIAS  
+V  
–V  
ER  
S
R
OR  
+V  
S
4.7k  
CS  
–V  
S
S
25kΩ  
DEN  
INPUT  
0.1  
25kΩ  
C
+
8
AV  
C
dB OUTPUT  
AV  
*%dc ERROR + %RIPPLE (PEAK)  
0.01  
1
10  
100  
1k  
10k  
100k  
INPUT FREQUENCY (Hz)  
RX  
24kΩ  
24kΩ  
Figure 12. Values for CAV and 1% Settling Time for Stated % of Reading Averaging  
Error* Accuracy Includes 2% Component Tolerance (see * in Figure)  
+
C2  
FOR A SINGLE-POLE  
FILTER SHORT RX  
AND REMOVE C3  
100  
100  
10  
1
*%dc ERROR + %RIPPLE (PEAK)  
ACCURACY ±20% DUE TO  
COMPONENT TOLERANCE  
Figure 11. 2-Pole Sallen-Key Filter  
Figure 12 shows values of CAV and the corresponding averaging  
error as a function of sine wave frequency for the standard rms  
connection. The 1% settling time is shown on the right side of  
Figure 12.  
10  
0
.
0
1
%
0
1
.
1
E
%
R
R
1
E
%
O
R
Figure 13 shows the relationship between the averaging error,  
signal frequency settling time, and averaging capacitor value.  
Figure 13 is drawn for filter capacitor values of 3.3× the  
averaging capacitor value. This ratio sets the magnitude of the  
ac and dc errors equal at 50 Hz. As an example, by using a 1 μF  
averaging capacitor and a 3.3 μF filter capacitor, the ripple for  
a 60 Hz input signal is reduced from 5.3% of the reading using  
the averaging capacitor alone to 0.15% using the 1-pole filter.  
This gives a factor of 30 reduction in ripple, and yet the settling  
time only increases by a factor of 3. The values of filter  
Capacitor CAV and Filter Capacitor C2 can be calculated for  
the desired value of averaging error and settling time by using  
Figure 13.  
R
R
E
5
O
R
%
R
R
E
O
R
R
R
O
0.1  
0.01  
0.1  
R
0.01  
100k  
1
10  
100  
1k  
10k  
INPUT FREQUENCY (Hz)  
Figure 13. Values of CAV, C2, and 1% Settling Time for Stated % of Reading  
Averaging Error* for 1-Pole Post Filter (see * in Figure)  
100  
100  
10  
10  
The symmetry of the input signal also has an effect on the  
magnitude of the averaging error. Table 5 gives the practical  
component values for various types of 60 Hz input signals.  
These capacitor values can be directly scaled for frequencies  
other than 60 Hz—that is, for 30 Hz, these values are doubled,  
and for 120 Hz they are halved.  
0
.
0
1%  
1
1
0
.1  
E
%
RRO  
1%  
ER  
E
R
R
R
ER  
RO  
5
O
%
R
R
R
0.1  
0.01  
0.1  
0.01  
O
R
*%dc ERROR + %RIPPLE (PEAK)  
ACCURACY ±20% DUE TO  
COMPONENT TOLERANCE  
For applications that are extremely sensitive to ripple, the 2-pole  
configuration is suggested. This configuration minimizes capacitor  
values and the settling time while maximizing performance.  
1
10  
100  
1k  
10k  
100k  
INPUT FREQUENCY (Hz)  
Figure 14. Values of CAV, C2, and C3 and 1% Settling Time for Stated % of  
Reading Averaging Error* for 2-Pole Sallen-Key Filter (see * in Figure)  
Figure 14 can be used to determine the required value of CAV  
C2, and C3 for the desired level of ripple and settling time.  
,
Rev. K | Page 10 of 20  
 
 
 
 
AD637  
Table 5. Practical Values of CAV and C2 for Various Input Waveforms  
Recommended Standard Values for CAV and C2  
for 1% Averaging Error @ 60 Hz with T = 16.6 ms  
Absolute Value  
Circuit Waveform  
and Period  
1/2T  
Input Waveform  
and Period  
Minimum R × CAV  
Time Constant  
1% Settling  
Time  
CAV (μF)  
C2 (μF)  
T
1/2T  
0.47  
1.5  
181 ms  
A
0V  
Symmetrical Sine Wave  
T
T
T
0.82  
2.7  
325 ms  
B
0V  
Sine Wave with dc Offset  
T
T
10 (T − T2)  
ꢀ.8  
5.ꢀ  
22  
18  
2.ꢀ7 sec  
2.17 sec  
T
2
C
D
T
2
0V  
Pulse Train Waveform  
T
T
10 (T − 2T2)  
T
2
T
2
0V  
FREQUENCY RESPONSE  
The frequency response of the AD637 at various signal levels is  
shown in Figure 15. The dashed lines show the upper frequency  
limits for 1%, 10%, and 3 dB of additional error. For example,  
note that for 1% additional error with a 2 V rms input, the  
highest frequency allowable is 200 kHz. A 200 mV signal can  
be measured with 1% error at signal frequencies up to 100 kHz.  
10  
1
7V RMS INPUT  
2V RMS INPUT  
1V RMS INPUT  
1%  
10%  
±3dB  
100mV RMS INPUT  
10mV RMS INPUT  
0.1  
0.01  
To take full advantage of the wide bandwidth of the AD637,  
care must be taken in the selection of the input buffer amplifier.  
To ensure that the input signal is accurately presented to the  
converter, the input buffer must have a −3 dB bandwidth that is  
wider than that of the AD637. Note the importance of slew rate  
in this application. For example, the minimum slew rate required  
for a 1 V rms, 5 MHz, sine wave input signal is 44 V/μs. The user is  
cautioned that this is the minimum rising or falling slew rate  
and that care must be exercised in the selection of the buffer  
amplifier, because some amplifiers exhibit a two-to-one  
difference between rising and falling slew rates. The AD845 is  
recommended as a precision input buffer.  
1k  
10k  
100k  
INPUT FREQUENCY (Hz)  
1M  
10M  
Figure 15. Frequency Response  
Rev. K | Page 11 of 20  
 
 
 
AD637  
1.5  
1.0  
0.5  
AC MEASUREMENT ACCURACY AND CREST  
FACTOR  
Crest factor is often overlooked in determining the accuracy of  
an ac measurement. Crest factor is defined as the ratio of the peak  
signal amplitude to the rms value of the signal (CF = VP/V rms).  
Most common waveforms, such as sine and triangle waves, have  
relatively low crest factors (≤2). Waveforms that resemble low  
duty cycle pulse trains, such as those occurring in switching  
power supplies and SCR circuits, have high crest factors. For  
example, a rectangular pulse train with a 1% duty cycle has  
0
–0.5  
–1.0  
–1.5  
POSITIVE INPUT PULSE  
= 22µF  
C
AV  
a crest factor of 10 (CF = 1 η ).  
1
2
3
4
5
6
7
8
9
10  
11  
100µs  
T
T
η = DUTY CYCLE =  
CF = 1/  
(RMS) = 1 V RMS  
CREST FACTOR  
Vp  
e
0
η
Figure 18. Additional Error vs. Crest Factor  
0
e
IN  
100µs  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
Figure 16. Duty Cycle Timing  
10  
C
= 22µF  
AV  
CF = 10  
CF = 7  
1
CF = 10  
0.1  
0.01  
CF = 3  
0
0.5  
1.0  
1.5  
2.0  
CF = 3  
V
(V RMS)  
IN  
Figure 19. Error vs. RMS Input Level for Three Common Crest Factors  
1
10  
100  
1000  
PULSE WIDTH (µs)  
CONNECTION FOR dB OUTPUT  
Figure 17. AD637 Error vs. Pulse Width Rectangular Pulse  
Another feature of the AD637 is the logarithmic, or decibel,  
output. The internal circuit that computes dB works well over  
a 60 dB range. Figure 20 shows the dB measurement connection.  
The user selects the 0 dB level by setting R1 for the proper 0 dB  
reference current, which is set to cancel the log output current  
from the squarer/divider circuit at the desired 0 dB point. The  
external op amp is used to provide a more convenient scale and to  
allow compensation of the +0.33%/°C temperature drift of the  
dB circuit. The temperature resistor R3, as shown in Figure 20,  
is available from Precision Resistor Co., Inc., in Largo, Fla.  
(Model PT146). Consult its website for additional information.  
Figure 18 is a curve of additional reading error for the AD637  
for a 1 V rms input signal with crest factors from 1 to 11.  
A rectangular pulse train (pulse width 100 μs) is used for this  
test because it is the worst-case waveform for rms measurement  
(all the energy is contained in the peaks). The duty cycle and  
peak amplitude were varied to produce crest factors from l to 10  
while maintaining a constant 1 V rms input amplitude.  
Rev. K | Page 12 of 20  
 
 
AD637  
dB CALIBRATION  
Refer to Figure 20:  
Set VIN = 1.00 V dc or 1.00 V rms  
Adjust R1 for 0 dB out = 0.00 V  
Set VIN = 0.1 V dc or 0.10 V rms  
Adjust R2 for dB out = −2.00 V  
Any other dB reference can be used by setting VIN and R1  
accordingly.  
R2  
dB SCALE  
FACTOR  
ADJUST  
33.2k  
SIGNAL  
INPUT  
5kΩ  
+V  
S
BUFFER  
BUFF  
OUT 14  
R3  
1k*  
AD637  
1
2
3
4
5
6
7
BUFF IN  
NC  
7
2
60.4Ω  
6
AD707JN  
V
IN 13  
ABSOLUTE  
VALUE  
3
COMPENSATED  
dB OUTPUT  
+ 100mV/dB  
4
COMMON  
NC 12  
11  
–V  
S
BIAS  
OUTPUT  
OFFSET  
SECTION  
SQUARER/DIVIDER  
+V  
+V  
–V  
S
S
25kΩ  
4.7kΩ  
CS  
10  
9
+V  
S
–V  
S
S
DEN  
INPUT  
V
25kΩ  
OUT  
+
1µF  
8
dB OUTPUT  
FILTER  
C
AV  
10kΩ  
NC = NO CONNECT  
+V  
S
R1  
500kΩ  
+2.5 V  
AD508J  
0dB ADJUST  
*1k+ 3500ppm  
SEE TEXT  
Figure 20. dB Connection  
Rev. K | Page 13 of 20  
 
 
AD637  
V+  
1µF  
3.3M3.3MΩ  
7
3
2
1µF  
6
AD548JN  
BUFFER  
BUFF  
OUT 14  
AD637  
FILTERED  
V RMS OUTPUT  
1
BUFF IN  
4
V
IN 13  
V–  
2
3
NC  
SIGNAL  
INPUT  
ABSOLUTE  
VALUE  
6.8MΩ  
COMMON  
NC 12  
11  
+V  
S
BIAS  
SECTION  
OUTPUT  
OFFSET  
1000pF  
OUTPUT  
OFFSET  
ADJUST  
1MΩ  
4
5
SQUARER/DIVIDER  
+V  
+V  
S
50kΩ  
S
25kΩ  
+V  
CS  
S
10  
–V  
–V  
S
S
–V  
S
4.7kΩ  
V
25kΩ  
2
OUT  
9
V
IN  
V RMS  
+
6
7
DEN  
100µF  
INPUT  
C
AV  
8
FILTER  
dB OUTPUT  
499k1%  
R
C
AV1  
3.3µF  
NOTES  
1. VALUES CHOSEN TO GIVE 0.1% AVERAGING ERROR @ 1Hz.  
2. NC = NO CONNECT.  
Figure 21. AD637 as a Low Frequency RMS Converter  
LOW FREQUENCY MEASUREMENTS  
VECTOR SUMMATION  
If the frequencies of the signals to be measured are below 10 Hz,  
the value of the averaging capacitor required to deliver even 1%  
averaging error in the standard rms connection becomes  
extremely large. Figure 21 shows an alternative method of  
obtaining low frequency rms measurements. The averaging  
time constant is determined by the product of R and CAV1, in  
this circuit, 0.5 sec/μF of CAV. This circuit permits a 20:1  
reduction in the value of the averaging capacitor, permitting the  
use of high quality tantalum capacitors. It is suggested that the  
2-pole, Sallen-Key filter shown in Figure 21 be used to obtain a  
low ripple level and minimize the value of the averaging  
capacitor.  
Vector summation can be accomplished through the use of two  
AD637s, as shown in Figure 22. Here, the averaging capacitors  
are omitted (nominal 100 pF capacitors are used to ensure  
stability of the filter amplifier), and the outputs are summed as  
shown. The output of the circuit is  
2
2
VOUT = VX +VY  
This concept can be expanded to include additional terms by  
feeding the signal from Pin 9 of each additional AD637 through  
a 10 kΩ resistor to the summing junction of the AD711 and  
tying all of the denominator inputs (Pin 6) together.  
If CAV is added to IC1 in this configuration, then the output is  
If the frequency of interest is below 1 Hz, or if the value of the  
averaging capacitor is still too large, the 20:1 ratio can be  
increased. This is accomplished by increasing the value of R.  
If this is done, it is suggested that a low input current, low offset  
voltage amplifier, such as the AD548, be used instead of the  
internal buffer amplifier. This is necessary to minimize the  
offset error introduced by the combination of amplifier input  
currents and the larger resistance.  
2
2
VX + VY  
If the averaging capacitor is included on both IC1 and IC2, the  
output is  
2
2
VX +VY  
This circuit has a dynamic range of 10 V to 10 mV and is  
limited only by the 0.5 mV offset voltage of the AD637.  
The useful bandwidth is 100 kHz.  
Rev. K | Page 14 of 20  
 
 
AD637  
EXPANDABLE  
BUFFER  
AD637  
BUFF  
OUT  
IC1  
BUFF IN  
14  
13  
1
V IN  
X
ABSOLUTE  
VALUE  
2
3
NC  
COMMON  
NC 12  
11  
BIAS  
OUTPUT  
OFFSET  
SECTION  
4
5
6
SQUARER/DIVIDER  
+V  
+V  
S
S
25k  
+V  
10  
9
S
CS  
–V  
–V  
S
S
4.7kΩ  
V
25kΩ  
OUT  
DEN  
INPUT  
100pF  
5pF  
C
FILTER  
AV  
7
dB OUTPUT  
BUFF IN  
8
10kΩ  
10kΩ  
BUFFER  
BUFF  
OUT  
AD637  
IC2  
1
14  
13  
V IN  
Y
AD711K  
2
3
NC  
ABSOLUTE  
VALUE  
COMMON  
10kΩ  
NC 12  
BIAS  
OUTPUT  
OFFSET  
SECTION  
11  
10  
SQUARER/DIVIDER  
4
5
6
+V  
S
+V  
S
20kΩ  
25kΩ  
+V  
S
CS  
–V  
S
–V  
S
4.7kΩ  
DEN  
INPUT  
V
25kΩ  
OUT  
9
8
100pF  
dB OUTPUT  
FILTER  
7
2 2  
+ V  
X Y  
V
=
V
OUT  
Figure 22. Vector Sum Configuration  
Rev. K | Page 15 of 20  
 
AD637  
EVALUATION BOARD  
amp, and is configured on the AD637-EVALZ as a low-pass  
Sallen-Key filter whose fC < 0.5 Hz. Users can connect to the  
buffer by moving the FILTER switch to the on position.  
DC_OUT is still the output of the AD637, and the test loop,  
BUF_OUT, is the output of the buffer. The R2 trimmer adjusts  
the output offset voltage.  
Figure 23 shows a digital image of the AD637-EVALZ, an  
evaluation board specially designed for the AD637. It is  
available at www.analog.com and is fully tested and ready for  
bench testing after connecting power and signal I/O. The circuit  
is configured for dual power supplies, and standard BNC  
connectors serve as the signal input and output ports.  
The LPF frequency is changed by changing the component  
values of CF1, CF2, R4, and R5. See Figure 24 and Figure 30 to  
locate these components. Note that a wide range of capacitor  
and resistor values can be used with the AD637 buffer amplifier.  
Referring to the schematic in Figure 30, the input connector  
RMS_IN is capacitively coupled to Pin 15 (VIN of SOIC package) of  
the AD637. The DC_OUT connector is connected to Pin 11,  
RMS OUT, with provisions for connections to the output buffer  
between Pin 1 and Pin 16. The buffer is an uncommitted op  
Figure 23. AD637-EVALZ  
Rev. K | Page 1ꢀ of 20  
 
 
AD637  
Figure 27. Evaluation Board—Secondary Side Copper  
Figure 28. Evaluation Board—Internal Power Plane  
Figure 29. Evaluation Board—Internal Ground Plane  
Figure 24. AD637-EVALZ Assembly  
Figure 25. Component Side Silkscreen  
Figure 26. Evaluation Board—Component Side Copper  
Rev. K | Page 17 of 20  
 
AD637  
–V  
–V  
+V  
+V  
S
S
S
GND1 GND2 GND3 GND4  
C1  
C2  
10µF  
25V  
+
10µF  
25V  
+
S
FILTER  
BUF_IN  
4
OUT  
1
2
5
3
IN  
6
1
16  
15  
BUFF IN  
NC  
BUFF OUT  
BUF_OUT  
RMS_IN  
RMS_IN  
Z1  
AD637  
2
3
V
IN  
CIN  
22µF  
16V  
+V  
–V  
S
14  
13  
COMMON  
NC  
R1  
1M  
4
5
6
7
R2  
50kꢀ  
OUTPUT  
OFFSET  
+V  
+V  
–V  
S
S
S
C3  
R3  
4.7kꢀ  
0.1µF  
12  
11  
10  
+V  
S
CS  
–V  
S
DC_OUT  
C4  
0.1µF  
S
DC_OUT  
DEN INPUT  
dB OUTPUT  
NC  
RMS OUT  
+
C
AV  
22µF  
16V  
C
AV  
DB_OUT  
8
9
NC  
+
CF1  
47µF  
25V  
R5  
24.3kꢀ  
R4  
24.3kꢀ  
+
CF2  
47µF  
25V  
Figure 30. Evaluation Board Schematic  
AC OR DC INPUT SIGNAL SOURCE  
FROM PRECISION CALIBRATOR  
OR FUNCTION GENERATOR  
POWER  
SUPPLY  
PRECISION DMM TO  
MONITOR VOUT  
Figure 31. AD637-EVALZ Typical Bench Configuration  
Rev. K | Page 18 of 20  
 
AD637  
OUTLINE DIMENSIONS  
0.005 (0.13) MIN  
0.080 (2.03) MAX  
8
14  
0.310 (7.87)  
1
0.220 (5.59)  
7
PIN 1  
0.100 (2.54)  
BSC  
0.320 (8.13)  
0.290 (7.37)  
0.765 (19.43) MAX  
0.060 (1.52)  
0.015 (0.38)  
0.200 (5.08)  
MAX  
0.150  
(3.81)  
MIN  
0.200 (5.08)  
0.125 (3.18)  
0.015 (0.38)  
0.008 (0.20)  
SEATING  
PLANE  
0.070 (1.78)  
0.030 (0.76)  
0.023 (0.58)  
0.014 (0.36)  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 32. 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]  
(D-14)  
Dimensions shown in inches and (millimeters)  
0.098 (2.49) MAX  
8
0.005 (0.13) MIN  
14  
0.310 (7.87)  
0.220 (5.59)  
1
7
PIN 1  
0.100 (2.54) BSC  
0.785 (19.94) MAX  
0.320 (8.13)  
0.290 (7.37)  
0.060 (1.52)  
0.015 (0.38)  
0.200 (5.08)  
MAX  
0.150  
(3.81)  
MIN  
0.200 (5.08)  
0.125 (3.18)  
0.015 (0.38)  
0.008 (0.20)  
SEATING  
PLANE  
15°  
0°  
0.070 (1.78)  
0.030 (0.76)  
0.023 (0.58)  
0.014 (0.36)  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 33. 14-Lead Ceramic Dual In-Line Package [CERDIP]  
(Q-14)  
Dimensions shown in inches and (millimeters)  
Rev. K | Page 19 of 20  
 
AD637  
10.50 (0.4134)  
10.10 (0.3976)  
16  
1
9
8
7.60 (0.2992)  
7.40 (0.2913)  
10.65 (0.4193)  
10.00 (0.3937)  
0.75 (0.0295)  
0.25 (0.0098)  
1.27 (0.0500)  
BSC  
45°  
2.65 (0.1043)  
2.35 (0.0925)  
0.30 (0.0118)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
0.51 (0.0201)  
0.31 (0.0122)  
1.27 (0.0500)  
0.40 (0.0157)  
0.33 (0.0130)  
0.20 (0.0079)  
COMPLIANT TO JEDEC STANDARDS MS-013-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 34. 16-Lead Standard Small Outline Package [SOIC_W]  
Wide Body (RW-16)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Model1  
59ꢀ2-89ꢀ3701CA  
ADꢀ37AQ  
ADꢀ37AR  
ADꢀ37ARZ  
ADꢀ37BQ  
ADꢀ37BR  
ADꢀ37BRZ  
ADꢀ37JD  
Notes  
2
Temperature Range  
−55°C to +125°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
0°C to 70°C  
Package Description  
14-Lead CERDIP  
14-Lead CERDIP  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
14-Lead CERDIP  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
14-Lead SBDIP  
Package Option  
Q-14  
Q-14  
RW-1ꢀ  
RW-1ꢀ  
Q-14  
RW-1ꢀ  
RW-1ꢀ  
D-14  
ADꢀ37JDZ  
0°C to 70°C  
14-Lead SBDIP  
D-14  
ADꢀ37JQ  
ADꢀ37JR  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
14-Lead CERDIP  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
1ꢀ-Lead SOIC_W  
14-Lead SBDIP  
Q-14  
RW-1ꢀ  
RW-1ꢀ  
RW-1ꢀ  
RW-1ꢀ  
RW-1ꢀ  
RW-1ꢀ  
D-14  
ADꢀ37JR-REEL  
ADꢀ37JR-REEL7  
ADꢀ37JRZ  
ADꢀ37JRZ-RL  
ADꢀ37JRZ-R7  
ADꢀ37KD  
ADꢀ37KDZ  
ADꢀ37KQ  
ADꢀ37KRZ  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
−55°C to +125°C  
−55°C to +125°C  
−55°C to +125°C  
14-Lead SBDIP  
D-14  
Q-14  
RW-1ꢀ  
D-14  
D-14  
14-Lead CERDIP  
1ꢀ-Lead SOIC_W  
14-Lead SBDIP  
14-Lead SBDIP  
14-Lead CERDIP  
Evaluation Board  
ADꢀ37SD  
ADꢀ37SD/883B  
ADꢀ37SQ/883B  
ADꢀ37-EVALZ  
Q-14  
1 Z = RoHS Compliant Part.  
2 A standard microcircuit drawing is available.  
©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D00788-0-2/11(K)  
Rev. K | Page 20 of 20  
 
 
 
 
 

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