AD670-703D [ADI]
2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP20, CERAMIC, METAL SEALED, SIDE BRAZED, DIP-20;型号: | AD670-703D |
厂家: | ADI |
描述: | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP20, CERAMIC, METAL SEALED, SIDE BRAZED, DIP-20 CD 转换器 |
文件: | 总7页 (文件大小:775K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
This specification documents the detail requirements for space qualified product manufactured on Analog
Devices, Inc.’s QML certified line per MIL-PRF-38535 Level V except as modified herein. The manufacturing
flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM brochure is to be considered a
part of this specification. http://www.analog.com/aerospace. This data sheet specifically details the space
grade version of this product. A more detailed operational description and a complete data sheet for
commercial product grades can be found at www.analog.com/AD670.
.
Part Number
AD670-703D
Description
8-Bit low cost signal conditioning ADC
Letter
D
Descriptive designator
CDIP2-T20
Case Outline (Lead Finish per MIL-PRF-38535)
20-Lead ceramic, metal sealed, side-brazed leads
VCC to ground......................................................................................................0V to +7.5V
Digital inputs (Pins 11-15) .......................................................................-0.5V to VCC +0.5V
Digital outputs (Pins 1-9) ............................................. Momentary short to VCD or ground
Analog inputs (Pins 16-19) .......................................................................................... ±30V
Power dissipation......................................................................................................450mW
Storage temperature range ........................................................................-65°C to +150°C
Lead temperature range (soldering)......................................................................... +300°C
Operating temperature range ..................................................................... -55°C to +125°C
Junction Temperature (TJ)......................................................................................... 150°C
Thermal Resistance, Sidebrazed (D) Package
Junction-to-Case (4JC) = 25°C/W Max
Junction-to-Ambient (4JA) = 85°C/W Max
NOTE: Twos complement or straightbinary .
Figure 1 - Terminal connections.
NOTES:
1. Status output high.
2. Status output low
3. Status output don’t care
Figure 2. Control signal truth table.
Figure 3. Differential input signal range truth table.
Figure 4. Input selection/output format truth table.
Figure 5. Block diagram.
:
:
P
P
:
:
:
P
TABLE I NOTES:
1/
2/
3/
4/
Tested on both 2.55V full scale and -1.28V to 1.27V full scale.
Minimum resolution for which there are no missing codes.
Parameter is tested at VCC = +5V, but is guaranteed from VCC = 4.5V to VCC = 5.5V
The absolute input signal range defines the limits of input signal value from either the (+) or (-) input to ground (as a function of VCC) over which
the device will produce distinct output codes.
5/
The differential input signal range defines the input signal span over which distinct output codes are produced. As this range is exceeded, the
device ceases to change output state (see fig. 4).
6/
7/
Guaranteed, if not tested, to the specified limits.
255 mV range. CMRR tested with 0V and full scale applied to analog inputs output change measured from 0 to VCM maximum and 0 to VCM
minimum and will not exceed specified limits.
8/
Subgroups 7 and 8 shall include verification of the truth table. (Fig. 3 and Fig. 4)
Figure 6. Timing diagram.
1/
2/
PDA applies to Subgroup 1. Delta's excluded from PDA.
See Table III for delta parameters. See table I for conditions.
:
5.1
5.2
5.3
HTRB is not applicable for this drawing.
Burn-in is per MIL-STD-883 Method 1015 test condition D.
Steady state life test is per MIL-STD-883 Method 1005.
相关型号:
AD670BD
2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP20, SIDE BRAZED, CERAMIC, DIP-20
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