AD707BQ [ADI]
Ultralow Drift Op Amp; 超低漂移运算放大器型号: | AD707BQ |
厂家: | ADI |
描述: | Ultralow Drift Op Amp |
文件: | 总8页 (文件大小:329K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
a
Ultralow Drift Op Amp
AD707
CONNECTION DIAGRAMS
FEATURES
Very High DC Precision
TO-99 (H) Package
15 V max Offset Voltage
0.1 V/؇C max Offset Voltage Drift
0.35 V p-p max Voltage Noise (0.1 Hz to 10 Hz}
8 V/V min Open-Loop Gain
130 dB min CMRR
NULL
8
+V
6
NULL
1
7
5
S
2
–IN
OUTPUT
120 dB min PSRR
1 nA max Input Bias Current
AD707
3
+IN
NC
4
AC Performance
0.3 V/s Slew Rate
0.9 MHz Closed-Loop Bandwidth
Dual Version: AD708
–V
S
NC = NO CONNECT
NOTE: PIN 4 CONNECTED
TO CASE
Available in Tape and Reel in Accordance with
EIA-481A Standard
Plastic (N) and
Cerdip (Q) Packages
SOIC (R) Package
NULL
–IN
NULL
1
2
3
4
8
7
6
5
NULL
8
1
NULL
–IN
+V
S
+V
S
+IN
OUTPUT
NC
OUTPUT
NC
+IN
–V
S
–V
S
5
4
AD707
AD707
PRODUCT DESCRIPTION
NC = NO CONNECT
The AD707 is a low cost, high precision op amp with state-of-
the-art performance that makes it ideal for a wide range of
precision applications. The offset voltage spec of less than 15 µV
is the best available in a bipolar op amp, and maximum input
offset current is 1.0 nA. The top grade is the first bipolar
monolithic op amp to offer a maximum offset voltage drift of
0.1 µV/°C, and offset current drift and input bias current drift
are both specified at 25 pA/°C maximum.
NC = NO CONNECT
APPLICATION HIGHLIGHTS
1. The AD707’s 13 V/µV typical open-loop gain and 140 dB
typical common-mode rejection ratio make it ideal for
precision instrumentation applications.
2. The precision of the AD707 makes tighter error budgets
possible at a lower cost.
The AD707’s open-loop gain is 8 V/µV minimum over the full
±10 V output range when driving a 1 kΩ load. Maximum input
voltage noise is 350 nV p-p (0.1 Hz to 10 Hz). CMRR and
PSRR are 130 dB and 120 dB minimum, respectively.
3. The low offset voltage drift and low noise of the AD707 allow
the designer to amplify very small signals without sacrificing
overall system performance.
The AD707 is available in versions specified over commercial,
industrial and military temperature ranges. It is offered in 8-pin
plastic mini-DIP, small outline (SOIC), hermetic cerdip and
hermetic TO-99 metal can packages. Chips, MIL-STD-883B,
Rev. C, and tape & reel parts are also available.
4. The AD707 can be used where chopper amplifiers are
required, but without the inherent noise and application
problems.
5. The AD707 is an improved pin-for-pin replacement for the
LT1001.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD707–SPECIFICATIONS (@ +25؇C and ؎15 V, unless otherwise noted)
AD707J/A
Min Typ Max
AD707K/B
Min Typ Max
Conditions
Units
INPUT OFFSET VOLTAGE
Initial
30
90
10
25
µV
vs. Temperature
0.3
50
1.0
100
0.1
15
0.3
45
µV/°C
µV
TMIN to TMAX
Long-Term Stability
Adjustment Range
0.3
±4
0.3
±4
µV/month
mV
R2 = 20 kΩ (Figure 19)
INPUT BIAS CURRENT
1.0
2.0
15
2.5
4.0
40
0.5
1.5
15
2.0
4.0
40/40/40
nA
nA
pA/°C
TMIN to TMAX
Average Drift
OFFSET CURRENT
VCM = 0 V
TMIN to TMAX
0.5
2.0
2
2.0
4.0
40
0.3
1.0
1
1.5
2.0
25/25/35
nA
nA
pA/°C
Average Drift
INPUT VOLTAGE NOISE
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
0.23 0.6
10.3 28
10.0 13.0
0.23 0.6
10.3 18
10.0 12
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
9.6
11.0
9.6
11.0
INPUT CURRENT NOISE
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
14
35
14
30
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
0.32 0.9
0.14 0.27
0.12 0.18
0.32 0.8
0.14 0.23
0.12 0.17
COMMON-MODE
REJECTION RATIO
V
CM = ±13 V
120 140
120 140
130 140
120 140
dB
dB
TMIN to TMAX
OPEN-LOOP GAIN
VO = ±10 V
RLOAD ≥ 2 kΩ
TMIN to TMAX
3
3
13
13
5
3
13
13
V/µV
V/µV
POWER SUPPLY
REJECTION RATIO
VS = ±3 V to ±18 V
TMIN to TMAX
110 130
110 130
115 130
110 130
dB
dB
FREQUENCY RESPONSE
Closed-Loop Bandwidth
Slew Rate
0.4
0.12 0.3
0.9
0.4
0.12 0.3
0.9
MHz
V/µs
INPUT RESISTANCE
Differential
Common Mode
24
100
200
45
200
300
MΩ
GΩ
OUTPUT CHARACTERISTICS
Voltage
RLOAD ≥ 10 kΩ
RLOAD ≥ 2 kΩ
RLOAD ≥ 1 kΩ
RLOAD ≥ 2 kΩ
TMIN to TMAX
13.5 14
12.5 13.0
12.0 12.5
13.5 14
12.5 13.0
12.0 12.5
±V
±V
±V
12.0 13.0
60
12.0 13.0
±V
OPEN-LOOP OUTPUT
RESISTANCE
60
Ω
POWER SUPPLY
Current, Quiescent
Power Consumption, No Load
2.5
75
7.5
3
90
9.0
2.5
75
7.5
3
90
9.0
mA
mW
mW
VS = ±15 V
VS = ±3 V
NOTES
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to
calculate outgoing quality levels.
Specifications subject to change without notice.
REV. B
–2–
AD707
ABSOLUTE MAXIMUM RATINGS1
ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q, H) . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . +300°C
Temperature
Range
Package
Description
Package
Option
Model
AD707AH
AD707AQ
AD707AR
AD707AR-REEL
–40°C to +85°C 8-Pin Metal Can
–40°C to +85°C 8-Pin Ceramic DIP
–40°C to +85°C 8-Pin Plastic SOIC
–40°C to +85°C 8-Pin Plastic SOIC
H-08A
Q-8
SO-8
SO-8
SO-8
Q-8
AD707AR-REEL7 –40°C to +85°C 8-Pin Plastic SOIC
AD707BQ
AD707JN
AD707JR
AD707JR-REEL
–40°C to +85°C 8-Pin Ceramic DIP
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
0°C to +70°C
0°C to +70°C
0°C to +70°C
8-Pin Plastic DIP
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic DIP
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic SOIC
N-8
SO-8
SO-8
SO-8
N-8
SO-8
SO-8
SO-8
28-pin plastic package: θJA = 165°C/Watt; 8-pin cerdip package: θJA = 110°C/Watt;
AD707JR-REEL7 0°C to +70°C
8-pin small outline package: θJA = 155°C/Watt; 8-pin header package: θJA
200°C/Watt.
=
AD707KN
AD707KR
AD707KR-REEL
0°C to +70°C
0°C to +70°C
0°C to +70°C
AD707KR-REEL7 0°C to +70°C
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
+V
7
NULL
8
S
6
V
OUT
0.059
(1.51)
4
–V
S
1
2
3
NULL
–IN +IN
0.110 (2.79)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
–3–
AD707–Typical Characteristics
+V
+V
S
35
30
25
20
15
10
5
S
–0.5
–0.5
–1.0
–1.5
+V
+ V
OUT
–1.0
–1.5
R
= 2kΩ
L
@ +25°C
± 15V SUPPLIES
+1.5
+1.0
+1.5
+1.0
+0.5
– V
OUT
–V
+0.5
–V
S
–V
S
0
10
0
5
10
15
20
25
0
5
10
15
20
25
100
1k
10k
SUPPLY VOLTAGE – ±V
LOAD RESISTANCE – Ω
SUPPLY VOLTAGE – ±V
Figure 2. Output Voltage Swing
vs. Supply Voltage
Figure 3. Output Voltage Swing
vs. Load Resistance
Figure 1. Input Common-Mode
Range vs. Supply Voltage
100
4
3
2
100
I
= 1mA
90
O
256 UNITS
10
1
TESTED
80
– 55°C TO +125°C
70
A
= +1000
60
50
40
30
20
10
0
V
0.1
DUAL-IN-LINE PACKAGE
PLASTIC (N) or CERDIP (Q)
A = +1
V
0.01
0.001
0.0001
1
METAL CAN (H) PACKAGE
0
0
1
2
3
4
–0.4 –0.3 –0.2 –0.1
0
0.1 0.2 0.3 0.4
0.1
1
10
100
1k
10k
100k
TIME AFTER POWER ON – Minutes
OFFSET VOLTAGE DRIFT – µV/°C
FREQUENCY – Hz
Figure 4. Offset Voltage Warm-Up
Drift
Figure 5. Typical Distribution of
Offset Voltage Drift
Figure 6. Output Impedance vs.
Frequency
40
30
20
10
0
45
40
35
30
100
90
25
I/F CORNER
0.7Hz
20
15
10
10
0%
5
0
TIME – 1sec/Div
0
1
10
100
0.01
0.1
1
10
100
DIFFERENTIAL VOLTAGE – ±V
FREQUENCY – Hz
Figure 7. Input Current vs.
Differential Input Voltage
Figure 9. 0.1 Hz to 10 Hz Voltage
Noise
Figure 8. Input Noise Spectral
Density
REV. B
–4–
AD707
16
14
12
10
8
140
120
100
80
0
16
14
12
10
8
R
C
= 2kΩ
= 1000pF
L
L
30
60
R
= 1kΩ
R
= 1kΩ
L
LOAD
90
V
= ±10V
OUT
PHASE
MARGIN
=58°
60
120
150
180
6
40
6
GAIN
4
20
4
2
10
2
0
0
0
0
–60 –40 –20
0
20 40 60 80 100 120 140
0.01 0.1
1
10 100 1k 10k 100k 1M 10M
5
10
15
20
25
TEMPERATURE – °C
FREQUENCY – Hz
SUPPLY VOLTAGE – V
Figure 10. Open-Loop Gain vs.
Temperature
Figure 12. Open-Loop Gain and
Phase vs. Frequency
Figure 11. Open-Loop Gain vs.
Supply Voltage
160
140
120
100
80
160
140
120
100
80
35
F
= 3kHz
MAX
R
= 2kΩ
+25°C
= ± 15V
L
30
25
20
15
10
5
V
S
60
60
40
40
20
20
0
0
0.1
0
1k
1
10
100
1k
10k 100k 1M
0.001 0.01 0.1
1
10 100 1k 10k 100k
10k
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
FREQUENCY – Hz
Figure 13. Common-Mode
Rejection vs. Frequency
Figure 15. Power Supply Rejection
vs. Frequency
Figure 14. Large Signal Frequency
Response
4
20mV/DIV
20mV/DIV
3
2
1
0
+125°C
+25°C
–55°C
CH1
CH1
TIME – 2µs/DIV
TIME – 2µs/DIV
0
3
6
9
12
15
18
21
24
SUPPLY VOLTAGE – ±V
Figure 18. Small Signal Transient
Response; AV = +1, RL = 2 kΩ,
CL = 1000 pF
Figure 17. Small Signal Transient
Response; AV = +1, RL = 2 kΩ,
CL = 50 pF
Figure 16. Supply Current vs.
Supply Voltage
REV. B
–5–
AD707
OFFSET NULLING
OPERATION WITH A GAIN OF 100
The input offset voltage of the AD707 is the lowest available in
a bipolar op amp, but if additional nulling is required, the
circuit shown in Figure 19 offers a null range of 200 µV. For
wider null capability, omit R1 and substitute a 20 kΩ potenti-
ometer for R2.
Demonstrating the outstanding dc precision of the AD707 in
practical applications, Table I shows an error budget calculation
for the gain of –100 configuration shown in Figure 21.
Table I. Error Budget
+V
S
Maximum Error Contribution
Av = 100 (C Grade)
(Full Scale: VOUT = 10 V, VIN = 100 mV)
R1
10kΩ
0.1µF
OFFSET
ADJUST
Error Source
R2
2kΩ
7
VOS
IOS
15 µV/100 mV
= 150 ppm
1 ppm
= 13 ppm
1
2
3
(100 Ω)(1 nA)/100 mV
=
8
Gain (2 kΩ Load) (100 V/8 × 106)100 mV
6
AD707
Noise
VOS Drift
0.35 µV/100 mV
(0.1 V/°C)/100 mV
=
=
4 ppm
1 ppm/°C
0.1µF
4
= 168 ppm
+1 ppm/°C
–V
S
Figure 19. External Offset Nulling and Power Supply
Bypassing
Total Unadjusted Error
@ +25°C
@ –55°C to +125°C
= 168 ppm > 12 Bits
= 268 ppm > 11 Bits
GAIN LINEARITY INTO A 1 kΩ LOAD
The gain and gain linearity of the AD707 are the highest
available among monolithic bipolar amplifiers. Unlike other dc
precision amplifiers, the AD707 shows no degradation in gain or
gain linearity when driving loads in excess of 1 kΩ over a ±10 V
output swing. This means high gain accuracy is assured over the
output range. Figure 20 shows the gain of the AD707, OP07, and
the OP77 amplifiers when driving a 1 kΩ load.
With Offset Calibrated Out
@ +25°C
= 17 ppm > 15 Bits
= 117 ppm > 13 Bits
@ –55°C to +125°C
10kΩ
+V
7
S
0.1µF
100Ω
The AD707 will drive 10 mA of output current with no signifi-
cant effect on its gain or linearity.
2
3
V
IN
6
AD707
V
OUT
0.1µF
4
AD707
OP07
99Ω
–V
S
Figure 21. Gain of –100 Configuration
Although the initial offset voltage of the AD707 is very low, it is
nonetheless the major contributor to system error. In cases
requiring additional accuracy, the circuit shown in Figure 19
can be used to null out the initial offset voltage. This method
will also cancel the effects of input offset current error. With the
offsets nulled, the AD707C will add less than 17 ppm of error.
OP77
@ +25°C
R
= 1kΩ
LOAD
This error budget assumes no error in the resistor ratio and no
errors from power supply variation (the 120 dB minimum PSRR
of the AD707C makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
–15
–10
–5
0
5
10
15
OUTPUT VOLTAGE – V
Figure 20. Gain Linearity of the AD707 vs.
Other DC Precision Op Amps
–6–
REV. B
AD707
18-BIT SETTLING TIME
140 dB CMRR INSTRUMENTATION AMPLIFIER
Figure 22 shows the AD707 settling to within 80 µV of its final
value for a 20 V output step in less than 100 µs (in the test con-
figuration shown in Figure 23). To achieve settling to 18 bits,
any amplifier specified to have a gain of 4 V/µV would appear to
be good enough, however, this is not the case. In order to truly
achieve 18-bit accuracy, the gain linearity must be better than
4 ppm.
The extremely tight dc specifications of the AD707 enable the
designer to build very high performance, high gain instrumenta-
tion amplifiers without having to select matched op amps for the
crucial first stage. For the second stage, the lowest grade AD707
is ideally suited. The CMRR is typically the same as the high
grade parts, but does not exact a premium for drift performance
(which is less critical in the second stage). Figure 24 shows an
example of the classic instrumentation amp. Figure 25 shows
that the circuit has at least 140 dB of common-mode rejection
for a ±10 V common-mode input at a gain of 1001 (RG = 20 Ω).
The gain nonlinearity of the AD707 does not contribute to the
error, and the gain itself only contributes 0.1 ppm. The gain
error, along with the VOS and VOS drift errors do not comprise
1 LSB of error in an 18-bit system over the military temperature
range. If calibration is used to null offset errors, the AD707
resolves up to 20 bits at +25°C.
20,000
CIRCUIT GAIN = –––––– + 1
R
G
AD707
3
2
–IN
R4
10kΩ
6
A1
R2
10kΩ
AD707
10kΩ
10kΩ
REFERENCE
SIGNAL
2
3
R
6
G
A3
10V/Div
R1
10kΩ
AD707
D.U.T.
OUTPUT
ERROR
2
3
9.9kΩ
6
A2
R2
50µV/Div
R
CM
+IN
200Ω
OUTPUT:
10V/Div
Figure 24. A 3 Op Amp Instrumentation Amplifier
High CMRR is obtained by first adjusting RCM until the output
does not change as the input is swept through the full common-
mode range. The value of RG, should then be selected to achieve
the desired gain. Matched resistors should be used for the
output stage so that RCM is as small as possible. The smaller the
value Of RCM, the lower the noise introduced by potentiometer
wiper vibrations. To maintain the CMRR at 140 dB over a
20°C range, the resistor ratios in the output stage, R1/R2 and
R3/R4, must track each other better than 10 ppm/°C.
TIME – 50µs/Div
Figure 22. 18-Bit Settling
2x HP1N6263
200kΩ
2
6
OP27
V
x 100
ERROR
7
3
4
0.1µF
10µF
INPUT
CH1
COMMON-MODE
10µF
0.1µF
SIGNAL: 10V/Div
+V
–V
S
S
2kΩ
2kΩ
1.9kΩ
FLAT-TOP
PULSE
GENERATOR
100Ω
V
COMMON-MODE
ERROR REFERRED
TO INPUT: 5µV/Div
IN
2kΩ
2
3
CH2
DATA
DYNAMICS
5109
D.U.T.
AD707
6
OR
TIME – 2 sec/Div
7
EQUIVALENT
4
0.1µF
10µF
Figure 25. Instrumentation Amplifier
Common-Mode Rejection
10µF
0.1µF
+V
–V
S
S
Figure 23. Op Amp Settling Time Test Circuit
REV. B
–7–
AD707
PRECISION CURRENT TRANSMITTER
The performance and accuracy of this circuit will depend almost
entirely on the tolerance and selection of the resistors. The scale
resistor (RSCALE) and the four feedback resistors directly affect
the accuracy of the load current and should be chosen carefully
or trimmed.
The AD707’s excellent dc performance, especially the low offset
voltage, low offset voltage drift and high CMRR, makes it
possible to make a high precision voltage-controlled current
transmitter using a variation of the Howland Current Source
circuit (Figure 26). This circuit provides a bidirectional load
current which is derived from a differential input voltage.
As an example of the accuracy achievable, assume IL must be
10 mA, and the available VIN is only 10 mV.
R3
100kΩ
R4
100kΩ
RSCALE = 10 mV/10 mA = 1 Ω
IERROR due to the AD707C:
0.1µF
+V
7
S
Maximum IERROR = 2(VOS)/RSCALE + 2(VOS Drift)/RSCALE
IOS (100 k/RSCALE
= 2 (15 µV)/l Ω +2 (0.1 µV/°C)/l Ω
+
)
2
3
6
AD707
V
IN
+ 1 nA (100 k)/l Ω (1.5 nA @ 125°C)
= 30 µA + 0.2 µA/°C + 100 µA
(150 µA @ 125°C)
0.1µF
4
R
SCALE
–V
S
R1
100kΩ
R2
100kΩ
= 130 µA/10 mA = 1.3% @ 25°C
= 180 µA/10 mA = 1.8% @ 125°C
R
V
L
IN
R2
tL = ––––––– –––
(
)
R
R1
I
SCALE
L
Low drift, high accuracy resistors are required to achieve high
precision.
Figure 26. Precision Current Source/Sink
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Metal Can
(H-08A)
8-Pin Plastic DIP
(N-8)
REFERENCE PLANE
0.750 (19.05)
0.430 (10.92)
0.348 (8.84)
0.500 (12.70)
0.185 (4.70)
0.165 (4.19)
8
5
4
0.250 (6.35)
MIN
0.280 (7.11)
0.240 (6.10)
0.050
(1.27)
MAX
0.100
(2.54)
BSC
1
0.325 (8.25)
0.300 (7.62)
0.160 (4.06)
0.110 (2.79)
5
0.060 (1.52)
0.015 (0.38)
PIN 1
6
4
2
0.195 (4.95)
0.115 (2.93)
0.335 (8.51)
0.305 (7.75)
0.210 (5.33)
0.045 (1.14)
0.200
(5.08)
BSC
MAX
0.027 (0.69)
7
0.130
(3.30)
MIN
3
0.160 (4.06)
0.370 (9.40)
0.335 (8.51)
0.115 (2.93)
0.022 (0.558)
8
0.015 (0.381)
SEATING
PLANE
0.070 (1.77)
0.045 (1.15)
0.008 (0.204)
1
0.100
(2.54)
BSC
0.100
(2.54)
BSC
0.014 (0.356)
0.019 (0.48)
0.016 (0.41)
0.040 (1.02) MAX
0.034 (0.86)
0.027 (0.69)
0.045 (1.14)
0.010 (0.25)
0.021 (0.53)
0.016 (0.41)
45°
BSC
8-Lead SOIC
(SO-8)
BASE & SEATING PLANE
8-Pin Cerdip
(Q-8)
0.1968 (5.00)
0.1890 (4.80)
0.005 (0.13) MIN
0.055 (1.4) MAX
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
x 45°
1
4
0.0098 (0.25)
0.0040 (0.10)
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
8°
0°
0.200
(5.08)
MAX
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
0.150
(3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
15°
0°
0.023 (0.58) 0.100 0.070 (1.78)
SEATING
PLANE
(2.54)
BSC
0.014 (0.36)
0.030 (0.76)
–8–
REV. B
相关型号:
AD707J-CHIPS
IC OP-AMP, 90 uV OFFSET-MAX, 0.9 MHz BAND WIDTH, UUC5, DIE-5, Operational Amplifier
ADI
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