AD7291TCPZ-EP-RL7 [ADI]
8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor;
| 型号： | AD7291TCPZ-EP-RL7 |
| 厂家： | 
ADI |
| 描述： | 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor 转换器 |
| 文件： | 总8页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
8-Channel, I2C, 12-Bit SAR ADC
with Temperature Sensor
Enhanced Product
AD7291-EP
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
DD
GND
12-bit SAR ADC
8 single-ended analog input channels
Analog input range: 0 V to 2.5 V
12-bit temperature to digital converter
Temperature sensor accuracy of 1°C typical
Channel sequencer operation
Specified for VDD of 2.8 V to 3.6 V
Logic voltage VDRIVE = 1.65 V to 3.6 V
Internal 2.5 V reference
V
REF
REF
BUF
12-BIT
V
IN0
SUCCESSIVE
APPROXIMATION
ADC
T/H
INPUT
MUX
AD7291-EP
V
IN7
I2C-compatible serial interface supports standard and
fast speed modes
SEQUENCER
SCL
SDA
AS1
Out of range indicator/alert function
Autocycle mode
Power-down current: 13 µA maximum
20-lead LFCSP package
CONTROL LOGIC
2
I C INTERFACE
TEMP
SENSOR
AS0
V
DRIVE
ALERT
PD/RST
ENHANCED PRODUCT FEATURES
Figure 1.
Supports defense and aerospace applications (AQEC
standard)
Extended industrial temperature range: −55°C to +125°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available upon request
GENERAL DESCRIPTION
The AD7291-EP is a 12-bit, low power, 8-channel, successive
approximation analog-to-digital converter (ADC) with an
internal temperature sensor.
The AD7291-EP includes a high accuracy band gap temperature
sensor, which is monitored and digitized by the 12-bit ADC to
give a resolution of 0.25°C.
The device operates from a single 3.3 V power supply and
features an I2C-compatible interface. The device contains a
9-channel multiplexer and a track-and-hold amplifier with an
input bandwidth of 30 MHz. The device has an on-chip 2.5 V
reference that can be disabled to allow the use of an external
reference.
The AD7291-EP offers a programmable sequencer, which
enables the selection of a preprogrammable sequence of
channels for conversion.
On-chip limit registers can be programmed with high and low
limits for the conversion results; an out-of-range indicator output
(ALERT) becomes active when the programmed high or low
limits are violated by the conversion result. This output can be
used as an interrupt.
The AD7291-EP provides a 2-wire serial interface compatible
with I2C interfaces. The I2C interface supports standard and fast
I2C interface modes. The AD7291-EP normally remains in a
partial power-down state while not converting and powers up
for conversions. The conversion process can be controlled by a
command mode where conversions occur across I2C write
operations or an autocycle mode selected through software control.
Additional application and technical information can be found
in the AD7291 data sheet.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2017 Analog Devices, Inc. All rights reserved.
www.analog.com
AD7291-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics ..............................................7
Outline Dimensions..........................................................................8
Ordering Guide .............................................................................8
Enhanced Product Features ............................................................ 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
7/2017—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Enhanced Product
SPECIFICATIONS
AD7291-EP
VDD = 2.8 V to 3.6 V; VDRIVE = 1.65 V to 3.6 V; fSCL = 400 kHz, fast SCLK mode; VREF = 2.5 V internal/external; TA = −55°C to +125°C,
unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit1
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio (SNR)
Signal-to-Noise + Distortion Ratio (SINAD)
Total Harmonic Distortion (THD)
Spurious-Free Dynamic Range (SFDR)
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Channel-to-Channel Isolation
Full Power Bandwidth2
fIN = 1 kHz sine wave
70
70
71
71
−84
−85
dB
dB
dB
dB
−78
−80
fA = 5.4 kHz, fB = 4.6 kHz
−88
−88
−100
30
dB
dB
dB
MHz
MHz
fIN = 10 kHz
At 3 dB
At 0.1 dB
10
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Offset Error
Offset Error Matching
Offset Temperature Drift
Gain Error
0.5
0.5
2
2.5
4
1
0.99
4.5
4.5
LSB
LSB
LSB
LSB
ppm/°C
LSB
Guaranteed no missing codes to 12 bits
1
4
Gain Error Matching
Gain Temperature Drift
ANALOG INPUT
1
0.5
2.5
LSB
ppm/°C
Input Voltage Ranges
DC Leakage Current
Input Capacitance2
0
VREF
1
V
0.01
34
8
µA
pF
pF
When in track
When in hold
REFERENCE INPUT/OUTPUT
Reference Output Voltage3
Long-Term Stability
Output Voltage Hysteresis
Reference Input Voltage Range4
DC Leakage Current
VREF Output Impedance
Reference Temperature Coefficient
VREF Noise2
2.4925
1
2.5
150
50
2.5075
V
0.3% maximum at 25°C
For 1000 hours
ppm
ppm
V
µA
Ω
2.5
1
0.01
1
12
External reference applied to Pin VREF
Bandwidth = 10 MHz
35
ppm/°C
µV rms
60
LOGIC INPUTS (SDA, SCL)
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
Input Hysteresis, VHYST
0.7 × VDRIVE
V
V
µA
pF
V
0.3 × VDRIVE
1
0.01
6
VIN = 0 V or VDRIVE
2
0.1 × VDRIVE
Rev. 0 | Page 3 of 8
AD7291-EP
Enhanced Product
Parameter
Min
Typ
Max
Unit1
Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, VOH
VDRIVE − 0.3
VDRIVE − 0.2
V
V
V
V
µA
pF
VDRIVE < 1.8
VDRIVE ≥ 1.8
ISINK = 3 mA
ISINK = 6 mA
Output Low Voltage, VOL
0.4
0.6
1
Floating State Leakage Current
Floating State Output Capacitance2
INTERNAL TEMPERATURE SENSOR
Operating Range
0.01
8
−55
+125
2
3
°C
°C
°C
°C
Accuracy
1
1
0.25
TA = −55°C to +85°C
TA = 85°C to 125°C
LSB size
Resolution
CONVERSION RATE
Conversion Time
Autocycle Update Rate5
Throughput Rate
POWER REQUIREMENTS
VDD
3.2
50
μs
μs
kSPS
22.22
fSCL = 400 kHz
Digital inputs = 0 V or VDRIVE
2.8
1.65
3
3
3.6
3.6
V
V
VDRIVE
6, 7
ITOTAL
Normal Mode (Operational)
Normal Mode (Static)
Full Power-Down Mode
2.9
2.9
0.3
1.6
4.9
3.5
3.4
1.6
4.5
13
mA
mA
μA
μA
μA
TA = −55°C to +25°C
TA = >25°C to 85°C
TA = >85°C to 125°C
Power Dissipation7
Normal Mode (Operational)
8.7
10.5
12.6
12.2
5.8
16.2
46.8
mW
mW
mW
µW
µW
µW
VDD = 3 V, VDRIVE = 3 V
10.4
10.4
1.1
5.8
17.6
Normal Mode (Static)
Full Power-Down Mode
TA = −55°C to +25°C
TA = >25°C to 85°C
TA = >85°C to 125°C
1 All specifications expressed in decibels are referred to full-scale range (FSR) and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
2 Sample tested during initial product release to ensure compliance.
3 Refers to Pin VREF specified for 25oC.
4 A correction factor can be required on the temperature sensor results when using an external VREF (see the AD7291 data sheet).
5 Sampled during initial product release to ensure compliance; not subject to production testing.
6 ITOTAL is the total current flowing in VDD and VDRIVE
.
7 ITOTAL and power dissipation are specified with VDD = VDRIVE = 3.6 V, unless otherwise noted.
Rev. 0 | Page 4 of 8
Enhanced Product
AD7291-EP
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Close attention to
PCB thermal design is required.
Parameter
Rating
VDD to GND1, GND
VDRIVE to GND1, GND
Analog Input Voltage to GND1
Digital Input Voltage to GND1
Digital Output Voltage to GND1
VREF to GND1
−0.3 V to +5 V
−0.3 V to +5 V
−0.3 V to +3 V
−0.3 V to VDRIVE + 0.3 V
−0.3 V to VDRIVE + 0.3 V
−0.3 V to +3 V
−0.3 V to +0.3 V
10 mA
Table 3. Thermal Resistance
Package Type
CP-20-81
θJA
θJC
Unit
52
6.5
°C/W
GND to GND1
1 Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with 9 thermal vias. See JEDEC JESD51.
Input Current to Any Pin Except Supplies1
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Pb-free Temperature, Soldering
Reflow
−55°C to +125°C
−65°C to +150°C
150°C
ESD CAUTION
260(+0)°C
2 kV
ESD
1 Transient currents of up to 100 mA do not cause latch-up.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. 0 | Page 5 of 8
AD7291-EP
Enhanced Product
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
15 SCL
14 SDA
V
V
V
V
V
1
2
3
4
5
IN3
IN4
IN5
IN6
IN7
AD7291-EP
TOP VIEW
(Not to Scale)
13 AS1
ALERT
12
11 AS0
NOTES
1. THE EXPOSED METAL PADDLE ON THE BOTTOM
OF THE LFCSP PACKAGE SHOULD BE SOLDERED
TO PCB GROUND FOR PROPER HEAT DISSIPATION
AND PERFORMANCE.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 to 5,
18 to 20 VIN5, VIN6
VIN3, VIN4
,
,
,
Analog Inputs. The AD7291-EP has eight single-ended analog inputs that are multiplexed into the on-chip track-
and-hold amplifier. Each input channel can accept analog inputs from 0 V to 2.5 V. Any unused input channels
must be connected to GND1 to avoid noise pickup.
V
V
IN7, VIN0
IN1, VIN2
6
7
GND1
Ground. Ground reference point for the internal reference circuitry on the AD7291-EP. All analog input signals and
the external reference signals must be referred to this GND1 voltage. The GND1 pin must be connected to the
ground plane of a system. All ground pins must ideally be at the same potential and must not be more than 0.3 V
apart, even on a transient basis. The VREF pin must be decoupled to this ground pin via a 10 μF decoupling capacitor.
Internal Reference/External Reference Supply. The nominal internal reference voltage of 2.5 V appears at this pin.
Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the rest
of a system. Decoupling capacitors must be connected to this pin to decouple the reference buffer. For best
performance, it is recommended to use a 10 μF decoupling capacitor on this pin to GND1. The internal reference
can be disabled and an external reference supplied to this pin if required. The input voltage range for the external
reference is 2.0 V to 2.5 V.
VREF
8
9
DCAP
Decoupling Capacitor Pin. Decoupling capacitors (1 μF recommended) are connected to this pin to decouple the
internal low dropout regulator (LDO).
Ground. Ground reference point for all analog and digital circuitry on the AD7291-EP. The GND pin must be con-
nected to the ground plane of the system. All ground pins must ideally be at the same potential and must not be
more than 0.3 V apart, even on a transient basis. Both DCAP and VDD pins must be decoupled to this GND pin.
GND
10
11, 13
VDD
Supply Voltage, 2.8 V to 3.6 V. This supply must be decoupled to GND with 10 μF and 100 nF decoupling capacitors.
Logic Inputs. Together, the logic state of these two inputs selects a unique I2C address for the AD7291-EP. See the
AD7291 data sheet for details. The device address depends on the voltage applied to these pins.
Digital Output. This pin acts as an out-of-range indicator and, if enabled, becomes active when the conversion
result violates the DATAHIGH or DATALOW register values. See the AD7291 data sheet for further details.
Digital Input/Output. Serial bus bidirectional data. This open-drain output requires a pull-up resistor. The output
coding is straight binary for the voltage channels and twos complement for the temperature sensor result.
Digital Inputs. Serial I2C Bus Clock. This input requires a pull-up resistor. The data transfer rate in I2C mode is
compatible with both 100 kHz and 400 kHz operating modes.
Logic Power Supply Input. The voltage supplied at this pin determines the voltage at which the interface operates.
This pin must be decoupled to GND. The voltage range on this pin is 1.65 V to 3.6 V and can be less than the
voltage at VDD but must never exceed it by more than 0.3 V.
AS0, AS1
ALERT
SDA
12
14
15
16
SCL
VDRIVE
17
PD/RST
EPAD
Power-Down Pin. This pin places the device into a full power-down mode and enables power conservation when
operation is not required. This pin can be used to reset the device by toggling the pin low for a minimum of 1 ns and a
maximum of 100 ns. If the maximum time is exceeded, the device enters power-down mode. When placing the device
in full power-down mode, the analog inputs must be returned to 0 V.
Exposed Pad. The exposed metal paddle on the bottom of the LFCSP package must be soldered to PCB ground for
proper functionality and heat dissipation.
EPAD
Rev. 0 | Page 6 of 8
Enhanced Product
AD7291-EP
TYPICAL PERFORMANCE CHARACTERISTICS
1.5
7
V
= 3V
DRIVE
6
5
4
3
2
1
0
1.0
0.5
0
–55°C
+25°C
+85°C
+125°C
–0.5
–1.0
–1.5
2.7
2.8
2.9
3.0
3.1
3.2
(V)
3.3
3.4
3.5
3.6
–55 –40 –25 –10
5
20 35 55 65 80 95 110
125
V
DD
TEMPERATURE (°C)
Figure 3. Temperature Accuracy at 3 V
Figure 4. Full Shutdown Current vs. Supply Voltage for Various Temperatures
Rev. 0 | Page 7 of 8
AD7291-EP
Enhanced Product
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
4.10
4.00 SQ
3.90
0.30
0.25
0.18
PIN 1
INDICATOR
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
16
20
0.50
BSC
1
15
2.75
2.60 SQ
2.35
EXPOSED
PAD
5
11
10
6
0.50
0.40
0.30
0.25 MIN
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-11.
Figure 5. 20-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-20-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
−55°C to +125°C
−55°C to +125°C
Package Description
Package Option
CP-20-8
CP-20-8
AD7291TCPZ-EP
AD7291TCPZ-EP-RL7
20-Lead Lead Frame Chip Scale Package [LFCSP]
20-Lead Lead Frame Chip Scale Package [LFCSP]
1 Z = RoHS Compliant Part.
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15915-0-7/17(0)
Rev. 0 | Page 8 of 8
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