AD7524SRZ-EP [ADI]
CMOS 8-Bit Buffered Multiplying DAC;
| 型号： | AD7524SRZ-EP |
| 厂家： | 
ADI |
| 描述： | CMOS 8-Bit Buffered Multiplying DAC 光电二极管 转换器 |
| 文件： | 总8页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMOS, 8-Bit,
Buffered Multiplying DAC
Enhanced Product
AD7524-EP
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
DD
Microprocessor compatible (6800, 8085, Z80)
TTL-/CMOS-compatible inputs
On-chip data latches
14
10kΩ
10kΩ
10kΩ
V
15
REF
20kΩ
20kΩ
20kΩ
20kΩ 20kΩ
Endpoint linearity
Low power consumption
Monotonicity guaranteed (full temperature range)
Latch free (no protection Schottky required)
10kΩ
S1
S2
S3
S8
16
1
R
FB
OUT1
OUT2
2
CHIP SELECT 12
WRITE 13
DATA LATCHES
3
GND
ENHANCED PRODUCT FEATURES
AD7524-EP
Supports defense and aerospace applications (AQEC)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
One assembly/test site
4
5
6
3
DB7
(MSB)
DB6
DB5
DB0
(LSB)
DATA INPUTS
Figure 1.
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Microprocessor controlled gain circuits
Microprocessor controlled attenuator circuits
Microprocessor controlled function generation
Precision AGC circuits
Bus structured instruments
GENERAL DESCRIPTION
The AD7524-EP is a low cost, 8-bit monolithic CMOS DAC
designed for direct interface to most microprocessors.
Featuring operation from 5 V to 15 V, the AD7524-EP interfaces
directly to most microprocessor buses or output ports.
An 8-bit DAC with input latches, the load cycle of the AD7524-EP
is similar to the write cycle of the random access memory. Using
an advanced thin-film on the CMOS fabrication process, the
AD7524-EP provides accuracy to ⅛ LSB with a typical power
dissipation of less than 10 mW.
Excellent multiplying characteristics (2- or 4-quadrant) make
the AD7524-EP an ideal choice for many microprocessor
controlled gain setting and signal control applications.
Additional application and technical information can be found
in the AD7524 data sheet.
An improved design eliminates the protection Schottky previously
required and guarantees TTL compatibility when using a 5 V
supply. The loading speed has also been increased for compatibility
with most microprocessors.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2012 Analog Devices, Inc. All rights reserved.
AD7524-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Write Cycle Timing Diagram ......................................................4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Outline Dimensions..........................................................................7
Ordering Guide .............................................................................7
Enhanced Product Features ............................................................ 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
REVISION HISTORY
1/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Enhanced Product
AD7524-EP
SPECIFICATIONS
VREF = 10 V, VOUT1 = VOUT2 = 0 V, unless otherwise noted. Temperature range goes from −55°C to +125°C.
Table 1.
1
Limit, TA = 25°C
VDD = 5 V VDD = 15 V
Limit, TMIN, TMAX
VDD = 5 V
Test Conditions/
Parameter
VDD = 15 V
Unit
Comments
STATIC PERFORMANCE
Resolution
8
8
8
8
Bits
Relative Accuracy
Monotonicity
Gain Error2
±±12
±±12
±±12
±±12
LSB max
Guaranteed Guaranteed Guaranteed Guaranteed
±2ꢀ
±ꢂ0
±±ꢁ
±±0
±3ꢀ
±ꢂ0
±±ꢀ
±±0
LSB max
ppm1°C
Average Gain TC3
Gain TC measured from
25°C to TMIN or from
25°C to TMAX
3
DC Supply Rejection, ΔGain1ΔVDD
0.08
0.02
0.±6
0.0±
0.0ꢂ
% FSR1%
max
% FSR1% typ
ΔVDD = ±±0%
0.002
0.00±
0.005
Output Leakage Current
IOUT± (Pin ±)
±50
±50
±50
±50
±ꢂ00
±ꢂ00
±200
±200
nA max
DB0 to DB7 = 0 V;WR,
CS = 0 V; VREF = ±±0 V
IOUT2 (Pin 2)
nA max
DB0 to DB7 = VDD; WR,
CS = 0 V; VREF = ±±0 V
DYNAMIC PERFORMANCE
Output Current Settling Time
(to ꢀ LSB)3
ꢂ00
250
500
350
ns max
OUT± load = ±00 Ω,
CEXT = ±3 pF; WR, CS = 0 V;
DB0 to DB7 = 0 V to
V
DD to 0 V
AC Feedthrough3
At OUT±
0.25
0.25
0.25
0.25
0.5
0.5
0.5
0.5
% FSR max
% FSR max
VREF = ±±0 V, ±00 kHz sine
wave; DB0 to DB7 = 0 V;
WR, CS = 0 V
At OUT2
VREF = ±±0 V, ±00 kHz sine
wave; DB0 to DB7 = 0 V;
WR, CS = 0 V
REFERENCE INPUT
RIN (Pin ±5 to GND)ꢂ
5
20
5
20
5
20
5
20
kΩ min
kΩ max
ANALOG OUTPUTS
Output Capacitance3
COUT± (Pin ±)
±20
±20
±20
±20
pF max
DB0 to DB7 = VDD;
WR, CS = 0 V
COUT2 (Pin 2)
COUT± (Pin ±)
30
30
30
30
30
30
30
30
pF max
pF max
DB0 to DB7 = 0 V;
WR, CS = 0 V
COUT2 (Pin 2)
±20
2.ꢂ
±20
±20
±20
pF max
DIGITAL INPUTS
Input High Voltage Requirement, VIH
Input Low Voltage Requirement, VIL 0.8
Input Current, IIN
Input Capacitance3
DB0 to DB7
±3.5
±.5
±±
2.ꢂ
0.5
±±0
±3.5
±.5
±±0
V min
V max
μA max
±±
VIN = 0 V or VDD
5
20
5
20
5
20
5
20
pF max
pF max
VIN = 0 V
VIN = 0 V
WR, CS
Rev. 0 | Page 3 of 8
AD7524-EP
Enhanced Product
1
Limit, TA = 25°C
VDD = 5 V VDD = 15 V
Limit, TMIN, TMAX
VDD = 5 V
Test Conditions/
Comments
See Figure 2
tWR = tCS
Parameter
VDD = 15 V
Unit
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time, tCS
Chip Select to Write Hold Time, tCH
Write Pulse Width, tWR
Data Setup Time, tDS
Data Hold Time, tDH
POWER SUPPLY
5
±70
0
±00
0
2ꢂ0
0
2ꢂ0
±70
±0
±50
0
±50
±00
±0
ns min
ns min
ns min
ns min
ns min
±70
±35
±0
±00
60
±0
tCS ≥ tWR, tCH ≥ 0
IDD
±
2
2
2
mA max
μA max
All digital inputsVIL or VIH
All digital inputs 0V orVDD
±00
±00
500
500
± Temperature range is as follows: −55°C to +±25°C.
2 Gain error is measured using internal feedback resistor. Full-scale range (FSR) = VREF
3 Guaranteed not tested.
.
ꢂ DAC thin-film resistor temperature coefficient is approximately −300 ppm1°C.
5 AC parameter, sample tested @ 25°C to ensure conformance to specification.
WRITE CYCLE TIMING DIAGRAM
tCH
tCS
V
DD
DD
CHIP SELECT
0
tWR
V
WRITE
0
tDS
DATA IN STABLE
tDH
V
0
DD
V
V
DATA IN
(DB0–DB7)
IH
IL
NOTES
1. ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM
10% TO 90% OF V . V = 5V, tR = tF = 20ns; V = 15V, tR = tF = 40ns.
DD DD
DD
V
+V
IL
IH
2. TIMING MEASUREMENT REFERENCE LEVEL IS
2
3. tDS + tDH IS APPROXIMATELY CONSTANT AT 145ns MIN
AT 25°C, V = 5V AND tWR 170ns MIN. THE AD7524 IS SPECIFIED
DD
FOR A MINIMUM tDH OF 10ns. HOWEVER, INAPPLICATIONS WHERE
tDH > 10ns, tDS MAY BE REDUCED ACCORDINGLY UP TO THE LIMIT
tDS = 65ns, tDH = 80ns.
Figure 2. Timing Diagram
Rev. 0 | Page ꢂ of 8
Enhanced Product
AD7524-EP
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Rating
VDD to GND
−0.3 V to +±7 V
±25 V
VR
to GND
FEEDBACK
VREF to GND
±25 V
Digital Input Voltage to GND
OUT±, OUT2 to GND
Power Dissipation (Any Package)
To 75°C
−0.3 V to VDD +0.3 V
−0.3 V to VDD +0.3 V
ESD CAUTION
ꢂ50 mW
Derates above 75°C by
Operating Temperature, Extended
Storage Temperature Range
Lead Temperature (Soldering, ±0 sec)
6 mW1°C
−55°C to +±25°C
−65°C to +±50°C
300°C
Rev. 0 | Page 5 of 8
AD7524-EP
Enhanced Product
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
OUT1
OUT2
GND
1
2
3
4
5
6
7
8
16
15
14
R
FEEDBACK
V
V
REF
AD7524-EP
DD
(MSB) DB7
DB6
13 WR
TOP VIEW
(Not to Scale)
12 CS
DB5
11 DB0 (LSB)
10 DB1
DB4
DB3
9 DB2
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic
Description
±
2
3
ꢂ
OUT±
OUT2
GND
DAC Current Output.
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
Ground.
DB7 (MSB) to Parallel Data Bit 7 to Data Bit 0.
DB0 (LSB)
±2
±3
±ꢂ
±5
±6
CS
WR
Chip Select Input. Active low. Used in conjunction with to load parallel data to the input latch.
Write. When low, use in conjunction with CS to load parallel data.
WR
VDD
VREF
RFEEDBACK
Positive Power Supply Input. These parts can be operated with a supply of 5 V.
DAC Reference Voltage Input Terminal.
DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier output.
Rev. 0 | Page 6 of 8
Enhanced Product
AD7524-EP
OUTLINE DIMENSIONS
10.00 (0.3937)
9.80 (0.3858)
9
8
16
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
45°
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 4. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
AD752ꢂSR-EP
Nonlinearity (VDD = 15 V)
±0.5 LSB
±0.5 LSB
Temperature Range
−55°C to +±25°C
−55°C to +±25°C
Package Description
±6-Lead SOIC_N
±6-Lead SOIC_N
Package Option
R-±6
R-±6
AD752ꢂSR-EP-RL7
Rev. 0 | Page 7 of 8
AD7524-EP
NOTES
Enhanced Product
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01132-0-1/12(0)
Rev. 0 | Page 8 of 8
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