AD790JRZ-REEL7 [ADI]
Fast, Precision Comparator;
| 型号： | AD790JRZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | Fast, Precision Comparator 放大器 光电二极管 |
| 文件： | 总11页 (文件大小：357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Fast, Precision
Comparator
a
AD790
CONNECTION DIAGRAMS
FEATURES
8-Pin Plastic Mini-DIP (N)
and Cerdip (Q) Packages
45 ns max Propagation Delay
Single 5 V or Dual ؎15 V Supply Operation
CMOS or TTL Compatible Output
250 V max Input Offset Voltage
500 V max Input Hysteresis Voltage
15 V max Differential Input Voltage
Onboard Latch
60 mW Power Dissipation
Available in 8-Pin Plastic and Hermetic Cerdip
Packages
+V
S
1
2
8
7
V
LOGIC
AD790
+IN
–IN
OUTPUT
+
–
3
4
6
5
GROUND
LATCH
–V
S
Available in Tape and Reel in Accordance with
EIA-481A Standard
8-Pin SOIC (R) Package
APPLICATIONS
Zero-Crossing Detectors
Overvoltage Detectors
Pulse-Width Modulators
Precision Rectifiers
Discrete A/D Converters
Delta-Sigma Modulator A/Ds
GROUND
LATCH
1
2
3
4
OUTPUT
8
7
AD790
–
V
LOGIC
–V
S
6
5
+V
S
–IN
+IN
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD790 is a fast (45 ns), precise voltage comparator, with a
number of features that make it exceptionally versatile and easy
to use. The AD790 may operate from either a single 5 V supply
or a dual 15 V supply. In the single-supply mode, the AD790’s
inputs may be referred to ground, a feature not found in other
comparators. In the dual-supply mode it has the unique ability
of handling a maximum differential voltage of 15 V across its in-
put terminals, easing their interfacing to large amplitude and
dynamic signals.
1. The AD790’s combination of speed, precision, versatility
and low cost makes it suitable as a general purpose compara-
tor in analog signal processing and data acquisition systems.
2. Built-in hysteresis and a low-glitch output stage minimize the
chance of unwanted oscillations, making the AD790 easier to
use than standard open-loop comparators.
3. The hysteresis combined with a wide input voltage range
enables the AD790 to respond to both slow, low level (e.g.,
10 mV) signals and fast, large amplitude (e.g., 10 V) signals.
This device is fabricated using Analog Devices’ Complementary
Bipolar (CB) process—which gives the AD790’s combination
of fast response time and outstanding input voltage resolution
(1 mV max). To preserve its speed and accuracy, the AD790
incorporates a “low glitch” output stage that does not exhibit
the large current spikes normally found in TTL or CMOS output
stages. Its controlled switching reduces power supply disturbances
that can feed back to the input and cause undesired oscillations.
The AD790 also has a latching function which makes it suitable
for applications requiring synchronous operation.
4. A wide variety of supply voltages is acceptable for operation
of the AD790, ranging from single 5 V to dual +5 V/–12 V,
5 V, or +5 V/ 15 V supplies.
5. The AD790’s power dissipation is the lowest of any compara-
tor in its speed range.
6. The AD790’s output swing is symmetric between VLOGIC
and ground, thus providing a predictable output under a
wide range of input and output conditions.
The AD790 is available in five performance grades. The
AD790J and the AD790K are rated over the commercial tem-
perature range of 0°C to 70°C. The AD790A and AD790B are
rated over the industrial temperature range of –40°C to +85°C.
The AD790S is rated over the military temperature range of
–55°C to +125°C.
E
REV.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
2014
© Analog Devices, Inc.,
781/461-3113
Fax:
AD790* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
• AD790 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
DOCUMENTATION
Application Notes
• AN-25: Applying the OP06 Op Amp As a High Precision
Comparator
DISCUSSIONS
View all AD790 EngineerZone Discussions.
• AN-352: High Speed Comparators Provide Many Useful
Circuit Functions When Used Correctly
Data Sheet
SAMPLE AND BUY
Visit the product page to see pricing options.
• AD790: Fast, Precision Comparator Data Sheet
REFERENCE DESIGNS
• CN0123
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
REFERENCE MATERIALS
Product Selection Guide
DOCUMENT FEEDBACK
• Comparators Product Brochure 2007
Submit feedback for this data sheet.
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AD790–SPECIFICATIONS
(Operation @ 25؇C and +VS = 15 V, –VS = –15 V, VLOGIC = 5 V unless otherwise noted.)
DUAL SUPPLY
AD790J/A
Min Typ
AD790K/B
Min Typ Max
AD790S
Min Typ
Parameter
Conditions
Max
Max
Unit
RESPONSE CHARACTERISTIC 100 mV Step
Propagation Delay, tPD
5 mV Overdrive
TMIN to TMAX
40
45
45/50
40
45
45/50
40
45
60
ns
ns
OUTPUT CHARACTERISTICS
Output HIGH Voltage, VOH
1.6 mA Source
6.4 mA Source
TMIN to TMAX
1.6 mA Sink
4.65
4.45
4.65
4.45
4.65
4.45
4.3
4.3/4.3
4.3
4.3
4.3
4.3
V
V
V
V
V
Output LOW Voltage, VOL
0.35
0.35
0.35
6.4 mA Sink
TMIN to TMAX
0.44 0.5
0.5/0.5
0.44 0.5
0.44 0.5
0.5
0.5
INPUT CHARACTERISTICS
Offset Voltage1
0.2
1.0
0.05 0.25
0.2
1.0
1.5
0.65
5
mV
mV
mV
µA
TMIN to TMAX
TMIN to TMAX
Either Input
TMIN to TMAX
1.5
0.6
5
0.5
Hysteresis2
Bias Current
0.3
0.4
2.5
0.3
0.4
1.8
0.5
3.5
4.5
0.3
0.4
2.5
6.5
7
µA
Offset Current
0.04 0.25
0.02 0.15
0.04 0.25
µA
µA
TMIN to TMAX
0.3
0.2
0.4
Power Supply
Rejection Ratio DC
VS 20%
TMIN to TMAX
80
76
90
88
88
85
100
93
80
76
90
85
dB
dB
Input Voltage Range
Differential Voltage
Common Mode
Common Mode
Rejection Ratio
VS ≤ 15 V
؎VS
+VS–2 V –VS
؎VS
+VS–2 V –VS
؎VS
+VS–2 V V
V
–VS
80
–10 V<VCM
<+10 V
TMIN to TMAX
95
88
85
105
80
76
95
dB
76
90
100
88
dB
Input Impedance
20ʈ2
20ʈ2
20ʈ2
MΩʈpF
LATCH CHARACTERISTICS
Latch Hold Time, tH
Latch Setup Time, tS
LOW Input Level, VIL
HIGH Input Level, VIH
Latch Input Current
25
5
35
10
0.8
1.6
5
25
5
35
10
0.8
1.6
3.5
5
25
5
35
10
0.8
ns
ns
V
V
µA
µA
TMIN to TMAX
TMIN to TMA X
1.6
2.3
2.3
2.3
5
8
TMIN to TMAX
7
SUPPLY CHARACTERISTICS
Diff Supply Voltage3
VLOGIC = 5 V
TMIN to TMAX
TMIN to TMAX
4.5
4.0
33
7
4.5
4.0
33
7
4.7
4.2
33
7
V
V
Logic Supply
Quiescent Current
+VS
–VS
VLOGIC
+VS = 15 V
–VS = –15 V
VLOGIC = 5 V
8
4
2
10
5
3.3
242
8
4
2
10
5
3.3
242
8
4
2
10
5
3.3
242
mA
mA
mA
mW
Power Dissipation
TEMPERATURE RANGE
Rated Performance
TMIN to TMAX
0 to 70/–40 to +85
0 to 70/–40 to +85
–55 to +125
°C
NOTES
1Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure 6.
2Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure 6.
3+VS must be no lower than (VLOGIC –0.5 V) in any supply operating conditions, except during power up.
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test.
Specifications subject to change without notice.
E
–2–
REV.
AD790
(Operation @ 25؇C and +VS = VLOGIC = 5 V, –VS = 0 V unless otherwise noted.)1
SINGLE SUPPLY
AD790J/A
Min Typ
AD790K/B
Min Typ Max
AD790S
Min Typ
Parameter
Conditions
Max
Max
Unit
RESPONSE CHARACTERISTIC 100 mV Step
Propagation Delay, tPD
5 mV Overdrive
TMIN to TMAX
45
50
50/60
45
50
50/60
45
50
65
ns
ns
OUTPUT CHARACTERISTICS
Output HIGH Voltage, VOH
1.6 mA Source
6.4 mA Source
TMIN to TMAX
1.6 mA Sink
4.65
4.45
4.65
4.45
4.65
4.45
4.3
4.3
4.3
4.3
4.3
4.3
V
V
V
V
V
Output LOW Voltage, VOL
0.35
0.35
0.35
6.4 mA Sink
TMIN to TMAX
0.44 0.5
0.44 0.5
0.44 0.5
0.5
0.5
0.5
INPUT CHARACTERISTICS
Offset Voltage2
0.45 1.5
0.35 0.6
0.45 1.5
mV
mV
mV
µA
TMIN to TMAX
TMIN to TMAX
Either Input
TMIN to TMAX
2.0
0.85
2.0
Hysteresis3
Bias Current
0.3
0.5
2.7
0.75
5
7
0.3
0.5
2.0
0.65
3.5
5
0.3
0.7
2.7
1.0
5
8
µA
Offset Current
0.04 0.25
0.02 0.15
0.04 0.25
µA
µA
TMIN to TMAX
0.3
0.2
0.4
Power Supply
Rejection Ratio DC
4.5 V≤VS≤5.5 V
TMIN to TMAX
80
90
86
82
100
93
80
76
90
85
dB
dB
76/76 88
Input Voltage Range
Differential Voltage
Common Mode
؎VS
+VS–2 V
؎VS
+VS–2 V
؎VS
20ʈ2
V
0
0
0
+VS–2 V V
Input Impedance
20ʈ2
20ʈ2
MΩʈpF
LATCH CHARACTERISTICS
Latch Hold Time, tH
Latch Setup Time, tS
LOW Input Level, VIL
HIGH Input Level, VIH
Latch Input Current
25
5
35
10
0.8
25
5
35
10
0.8
25
5
35
10
0.8
ns
ns
V
V
µA
µA
TMIN to TMAX
TMIN to TMAX
1.6
4.5
1.6
4.5
1.6
4.7
2.3
10
5
7
2.3
10
3.5
5
2.3
10
5
8
TMIN to TMAX
TMIN to TMAX
SUPPLY CHARACTERISTICS
Supply Voltage4
Quiescent Current
7
12
60
7
12
60
7
12
60
V
mA
mW
Power Dissipation
TEMPERATURE RANGE
Rated Performance
TMIN to TMAX
0 to 70/–40 to +85
0 to 70/–40 to +85
–55 to +125
°C
NOTES
1Pin 1 tied to Pin 8, and Pin 4 tied to Pin 6.
2Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure 6.
3Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure 6.
4–VS must not be connected above ground.
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test.
Specifications subject to change without notice.
E
REV.
–3–
AD790
ABSOLUTE MAXIMUM RATINGS1, 2
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . 500 mW
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . 16.5 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
(N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
(Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . 300°C
Logic Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause perma-
nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Thermal characteristics: plastic N-8 package: θJA = 90°C/watt; ceramic Q-8
package: θJA = 110°C/watt, θJC = 30°C/watt. SOIC (R-8) package: θJA = 160°C
watt; θJC = 42°C/watt.
+
15V
LATCH
(OPTIONAL)
+ 5V
LATCH
(OPTIONAL)
0.1µF
5V
+
0.1µF
0.1µF
510
Ω
510
Ω
1
1
8
2
3
+IN
–IN
8
5
+IN
–IN
2
3
OUTPUT
7
5
AD790
OUTPUT
7
AD790
6
6
4
4
0.1µF
–
15V
Figure 2. Basic Single Supply
Configuration (N, Q Package Pinout)
Figure 1. Basic Dual Supply
Configuration (N, Q Package Pinout)
+15V
1
0.1µF
+5V
0.1µF
1k
–100mV
8
2
3
TEK
5
7904
SCOPE
7
AD790
25Ω
130Ω
0.1µF
6
4
MPS
571
–1.3V
–1.7V
0.1µF
PULSE
GENERATOR
–15V
HP2835
HP8112
50Ω
400Ω
650Ω
10kΩ
–
5V
VOLTAGE
–5mV
SOURCE
–5V
10Ω
Figure 3. Response Time Test Circuit (N, Q Package Pinout)
E
REV.
–4–
Typical Performace Characteristics–AD790
TPC 3. Propagation Delay vs.
TPC 2. Propagation Delay vs.
Fanout (LSTTL and CMOS)
Load Capacitance
TPC 1. Propagation Delay vs.
Overdrive
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
TEMP = +25°C
0
2
4
6
8
10
I
– mA
SINK
TPC 6. Output Low Voltage vs.
Sink Current
TPC 5. Propagation Delay vs.
Temperature
TPC 4. Propagation Delay vs.
Source Resistance
t
H
5.0
4.9
0
INPUT
4.8
TEMP = +25°C
4.7
t
S
4.6
4.5
V
IH
LATCH
V
IL
4.4
4.3
t
PD
V
V
OH
4.2
OUTPUT
0
2
4
6
8
10
OL
I
– mA
SOURCE
TPC 7. Output High Voltage vs.
Source Current
TPC 8. Total Supply Current vs.
Temperature
t
t
= SETUP TIME
= HOLD TIME
S
H
t
= COMPARATOR RESPONSE TIME
PD
Figure 4. Latch Timing
E
REV.
–5–
AD790
CIRCUIT DESCRIPTION
VOUT
The AD790 possesses the overall characteristics of a standard
monolithic comparator: differential inputs, high gain and a logic
output. However, its function is implemented with an architec-
ture which offers several advantages over previous comparator
designs. Specifically, the output stage alleviates some of the limi-
tations of classic “TTL” comparators and provides a symmetric
output. A simplified representation of the AD790 circuitry is
shown in Figure 5.
VH
VH
VOH
VOL
+
IN
0
VOS
VLOGIC
VH = HYSTERESIS VOLTAGE
VOS = INPUT OFFSET VOLTAGE
+
+
IN
2
3
A1
Q1
–
VOUT
7
GND
+
IN
+
–
OUTPUT
Av
–
Figure 6. Hysteresis Definitions (N, Q Package Pinout)
IN
hysteresis range. This built-in hysteresis allows the AD790 to
avoid oscillation when an input signal slowly crosses the ground
level.
–
+
Q2
GND
A2
SUPPLY VOLTAGE CONNECTIONS
GAIN STAGE
OUTPUT STAGE
The AD790 may be operated from either single or dual supply
voltages. Internally, the VLOGIC circuitry and the analog front-
end of the AD790 are connected to separate supply pins. If dual
supplies are used, any combination of voltages in which +VS ≥
Figure 5. AD790 Block Diagram
The output stage takes the amplified differential input signal and
converts it to a single-ended logic output. The output swing is
defined by the pull-up PNP and the pull-down NPN. These pro-
duce inherent rail-to-rail output levels, compatible with CMOS
logic, as well as TTL, without the need for clamping to internal
bias levels. Furthermore, the pull-up and pull-down levels are
symmetric about the center of the supply range and are refer-
enced off the VLOGIC supply and ground. The output stage has
nearly symmetric dynamic drive capability, yielding equal rise
and fall times into subsequent logic gates.
VLOGIC – 0.5 V and –VS ≤ 0 may be chosen. For single supply
operation (i.e., +VS = VLOGIC), the supply voltage can be oper-
ated between 4.5 V and 7 V. Figure 7 shows some other examples
of typical supply connections possible with the AD790.
BYPASSING AND GROUNDING
Although the AD790 is designed to be stable and free from
oscillations, it is important to properly bypass and ground the
power supplies. Ceramic 0.1 µF capacitors are recommended
and should be connected directly at the AD790’s supply pins.
These capacitors provide transient currents to the device during
comparator switching. The AD790 has three supply voltage
pins, +VS, –VS and VLOGIC. It is important to have a common
ground lead on the board for the supply grounds and the GND
pin of the AD790 to provide the proper return path for the
supply current.
Unlike classic TTL or CMOS output stages, the AD790 circuit
does not exhibit large current spikes due to unwanted current
flow between the output transistors. The AD790 output stage
has a controlled switching scheme in which amplifiers A1 and
A2 drive the output transistors in a manner designed to reduce
the current flow between Q1 and Q2. This also helps minimize
the disturbances feeding back to the input which can cause
troublesome oscillations.
LATCH OPERATION
The AD790 has a latch function for retaining input information
at the output. The comparator decision is “latched” and the
output state is held when Pin 5 is brought low. As long as Pin 5
is kept low, the output remains in the high or low state, and
does not respond to changing inputs. Proper capture of the
input signal requires that the timing relationships shown in
Figure 4 are followed. Pin 5 should be driven with CMOS or
TTL logic levels.
The output high and low levels are well controlled values defined
by VLOGIC (5 V), ground and the transistor equivalent Schottky
clamps and are compatible with TTL and CMOS logic require-
ments. The fanout of the output stage is shown in TPC 3 for
standard LSTTL or HCMOS gates. Output drive behavior vs.
capacitive load is shown in TPC 2.
HYSTERESIS
The AD790 uses internal feedback to develop hysteresis about
the input reference voltage. Figure 6 shows how the input offset
voltage and hysteresis terms are defined. Input offset voltage
(VOS) is the difference between the center of the hysteresis
range and the ground level. This can be either positive or nega-
tive. The hysteresis voltage (VH) is one-half the width of the
The output of the AD790 will respond to the input when Pin 5
is at a high logic level. When not in use, Pin 5 should be connected
to the positive logic supply. When using dual supplies, it is rec-
ommended that a 510 Ω resistor be placed in series with Pin 5
and the driving logic gate to limit input currents during powerup.
E
REV.
–6–
Applying the AD790
+
+
5V
5V
8
The minus supply current is proportional to absolute tempera-
ture and compensates for the change in the sense resistance
with temperature. The width and length of the PC board trace
determine the resistance of the trace and consequently the trip
current level.
+
12V
1
0.1µF
0.1µF
0.1µF
+IN
1
510Ω
8
+IN
–IN
2
3
5
2
3
OUT
7
AD790
5
OUT
6
AD790
7
6
4
–IN
4
I
LIMIT = 10 mV/RSENSE
0.1µF
RSENSE = rho (trace length/trace width)
rho = resistance of a unit square of trace
–
15V
+VS = +12V, –VS = 0V
LOGIC = +5V
+
5V
8
+VS = +5V, –VS = –15V
VLOGIC = +5V
V
0.1µF
1
+IN
2
3
+V
S
5
OUT
7
AD790
6
–IN
4
L
O
0.1µF
5V
1
+
0.1µF
A
D
–
5V
+VS = +5V, –VS = –5V, VLOGIC = +5V
510Ω
PC BOARD
TRACE
8
Figure 7. Typical Power Supply Connections
(N, Q Package Pinout)
2
3
5
OUTPUT
7
AD790
6
Window Comparator for Overvoltage Detection
The wide differential input range of the AD790 makes it suitable
for monitoring large amplitude signals. The simple overvoltage
detection circuit shown in Figure 8 illustrates direct connection
of the input signal to the high impedance inputs of the comparator
without the need for special clamp diodes to limit the differen-
tial
4
R
SENSE
2.7
Ω
≈ 10mV/100mA
input voltage across the inputs.
+5V
0.1µF
0.1µF
+15V
1
Figure 9. Ground Referred Overload Detector Circuit
(N, Q Package Pinout)
Precision Full-Wave Rectifier
510Ω
8
SIGN 1 = HIGH
0 = LOW
The high speed and precision of the AD790 make it suitable
for use in the wide dynamic range full-wave rectifier shown in
Figure 10. This circuit is capable of rectifying low level signals
as small as a few mV or as high as 10 V. Input resolution, propaga-
tion delay and op amp settling will ultimately limit the maximum
input frequency for a given accuracy level. Total comparator
plus switch delay is approximately 100 ns, which limits the
maximum input frequency to 1 MHz for clean rectification.
+7.5V
3
2
5
7
AD790
6
4
OVERRANGE = 1
7432
–15V
0.1µF
V
IN
+15V
+5V
0.1µF
Ω
10k
0.1µF
1
+15V
7
510Ω
0.1µF
8
3
2
5
10kΩ
7
AD790
2
3
6
–7.5V
V
6
IN
AD711
V
20k
Ω
OUT
4
+15V
1
4
0.1µF
0.1µF
0.1µF
+5V
8
–15V
0.1µF
–15V
510Ω
FET SWITCHES THE GAIN
FROM +1 TO –1
3
2
5
Figure 8. Overvoltage Detector
(N, Q Package Pinout)
7
AD790
NMOS
FET
6
4
(R
< 20 )
Ω
ON
Single Supply Ground Referred Overload Detector
The AD790 is useful as an overload detector for sensitive loads
that must be powered from a single supply. A simple ground
referenced overload detector is shown in Figure 8. The com-
parator senses a voltage across a PC board trace and compares
that to a reference (trip) voltage established by the comparator’s
minus supply current through a 2.7 Ω resistor. This sets up a
10 mV reference level that is compared to the sense voltage.
–15V
0.1µF
Figure 10. Precision Full-Wave Rectifier
(N, Q Package Pinout)
E
REV.
–7–
AD790
Bipolar to CMOS/TTL
+ 5V
–
5V
It is sometimes desirable to translate a bipolar signal (e.g.,
5 V) coming from a communications cable or another section
of the system to CMOS/TTL logic levels; such an application is
referred to as a line receiver. Previously, the interface to the
bipolar signal required either a dual ( ) power supply or a refer-
ence voltage level about which the line receiver would switch.
The AD790 may be used in a simple circuit to provide a unique
capability: the ability to receive a bipolar signal while powered
from a single 5 V supply. Other comparators cannot perform
this task. Figure 11 shows a 1 kΩ resistor in series with the input
signal which is then clamped by a Schottky diode, holding the
input of the comparator at 0.4 V below ground. Although the
comparator is specified for a common mode range down to –VS,
(in this case ground) it is permissible to bring one of the inputs
a few hundred mV below ground. The comparator switches
around this level and produces a CMOS/TTL compatible swing.
The circuit will operate to switching frequencies of 20 MHz.
4.7V
0.3V
BIPOLAR
SIGNAL
INPUT
400Ω*
1
1k
Ω
8
2
3
TTL
LEVEL
OUTPUT
5
6
7
STANDARD
SCHOTTKY
DIODE
4
GND
*A RESISTOR UP TO 10kΩ MAYBE USED TO
REDUCE THE SOURCE AND SINK CURRENT OF
THE DRIVER. HOWEVER, THIS WILL SLIGHTLY
LOWER THE MAXIMUM USABLE CLOCK RATE.
Figure 11. A Bipolar to CMOS TTL Line Receiver (N, Q
Package Pinout)
E
REV.
–8–
AD790
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 12. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
0.055 (1.40)
MAX
8
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.405 (10.29) MAX
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
15°
0°
0.070 (1.78)
0.030 (0.76)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 13. 8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Rev. E | Page 9
AD790
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 14. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
AD790JN
AD790JNZ
AD790JR
AD790JR-REEL
AD790JR-REEL7
AD790JRZ
AD790JRZ-REEL
AD790JRZ-REEL7
AD790AQ
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package Description
8-Lead PDIP
8-Lead PDIP
Package Option
N-8
N-8
R-8
8-Lead SOIC_N
8-Lead SOIC Reel
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC Reel
8-Lead SOIC Reel
8-Lead CERDIP
8-Lead CERDIP
R-8
R-8
−40°C to +85°C
−55°C to +125°C
Q-8
Q-8
AD790SQ
1 Z = RoHS Compliant Part.
REVISION HISTORY
11/14—Rev. D to Rev. E
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide .......................................................... 10
5/02—Rev. C to Rev. D
Edits to SOIC (R-8) Package ........................................................... 9
03/02—Rev. B to Rev. C
Edits to Features................................................................................ 1
Edits to Product Description .......................................................... 1
Deleted Metalization Photograph .................................................. 4
Edits to Ordering Guide .................................................................. 4
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00844-0-11/14(E)
Rev. E | Page 10
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