AD8031ART-REEL7 [ADI]
2.7 V, 800 uA, 80 MHz Rail-to-Rail I/O Amplifiers; 2.7 V ， 800微安， 80 MHz轨到轨输入/输出放大器
| 型号： | AD8031ART-REEL7 |
| 厂家： | 
ADI |
| 描述： | 2.7 V, 800 uA, 80 MHz Rail-to-Rail I/O Amplifiers |
| 文件： | 总16页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2.7 V, 800 A, 80 MHz
a
Rail-to-Rail I/O Amplifiers
AD8031/AD8032
FEATURES
CONNECTION DIAGRAMS
Low Power
8-Lead Plastic DIP (N)
and SOIC (R) Packages
8-Lead Plastic DIP (N),
SOIC (R) and SOIC (RM)
Packages
Supply Current 800 A/Amplifier
Fully Specified at +2.7 V, +5 V and ؎5 V Supplies
High Speed and Fast Settling on +5 V
80 MHz –3 dB Bandwidth (G = +1)
30 V/s Slew Rate
125 ns Settling Time to 0.1%
Rail-to-Rail Input and Output
No Phase Reversal with Input 0.5 V Beyond Supplies
Input CMVR Extends Beyond Rails by 200 mV
Output Swing to Within 20 mV of Either Rail
Low Distortion
AD8031
NC
–IN
+IN
NC
+V
1
8
OUT1
–IN1
+IN1
8
7
6
5
+V
S
1
2
3
4
2
3
7
6
OUT2
–IN2
S
OUT
NC
–V
S
5
–V
S
+IN2
4
AD8032
NC = NO CONNECT
5-Lead Plastic Surface Mount Package
SOT-23-5 (RT-5)
–62 dB @ 1 MHz, VO = 2 V p-p
–86 dB @ 100 kHz, VO = 4.6 V p-p
Output Current: 15 mA
AD8031
V
1
2
3
+V
S
5
OUT
High Grade Option
–V
S
VOS (max) = 1.5 mV
APPLICATIONS
4
–IN
+IN
(Not to Scale)
High-Speed Battery-Operated Systems
High Component Density Systems
Portable Test Instruments
A/D Buffer
Active Filters
High-Speed Set-and-Demand Amplifier
to high-speed systems where component density requires lower
power dissipation. The AD8031/AD8032 are available in 8-lead
plastic DIP and SOIC packages and will operate over the indus-
trial temperature range of –40°C to +85°C. The AD8031A is also
available in the space-saving 5-lead SOT-23-5 package and the
AD8032A is available in AN 8-lead µSOIC package.
GENERAL DESCRIPTION
The AD8031 (single) and AD8032 (dual) single supply voltage
feedback amplifiers feature high-speed performance with 80 MHz
of small signal bandwidth, 30 V/µs slew rate and 125 ns settling
time. This performance is possible while consuming less than
4.0 mW of power from a single +5 V supply. These features
increase the operation time of high speed battery-powered
systems without compromising dynamic performance.
The products have true single supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V,
+5 V and ±5 V supplies. The input voltage range can extend to
500 mV beyond each rail. The output voltage swings to within
20 mV of each rail providing the maximum output dynamic range.
2s/Div
2s/Div
Input VIN
Output VOUT
The AD8031/AD8032 also offer excellent signal quality for only
800 µA of supply current per amplifier; THD is –62 dBc with a
2 V p-p, 1 MHz output signal and –86 dBc for a 100 kHz, 4.6 V p-p
signal on +5 V supply. The low distortion and fast settling time
make them ideal as buffers to single supply, A-to-D converters.
+5V
V
OUT
V
IN
1.7pF
1k⍀
+2.5V
Operating on supplies from +2.7 V to +12 V and dual supplies up to
±6 V, the AD8031/AD8032 are ideal for a wide range of applications,
from battery-operated systems with large bandwidth requirements
Circuit Diagram
Figure 1. Rail-to-Rail Performance at 100 kHz
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
AD8031/AD8032–SPECIFICATIONS
(@ TA = +25؇C, VS = +2.7 V, RL = 1 k⍀ to +1.35 V, RF = 2.5 k⍀ unless otherwise noted)
+2.7 V Supply
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Slew Rate
G = +1, VO < 0.4 V p-p
G = –1, VO = 2 V Step
G = –1, VO = 2 V Step, CL = 10 pF
54
25
80
30
125
54
25
80
30
125
MHz
V/µs
ns
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
–62
–86
15
2.4
5
–62
–86
15
2.4
5
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
dB
Input Voltage Noise
Input Current Noise
f = 100 kHz
f = 1 kHz
Crosstalk (AD8032 Only)
DC PERFORMANCE
f = 5 MHz
–60
–60
VCC
Input Offset Voltage
VCM
=
;
VOUT = 1.35 V
±1
±6
±6
±0.5
±1.6
±1.5 mV
±2.5 mV
2
TMIN to TMAX
±10
VCC
Offset Drift
VCM
=
;
VOUT = 1.35 V
10
10
µV/°C
2
VCC
Input Bias Current
VCM
=
;
VOUT = 1.35 V
0.45
2
0.45
2
µA
2
TMIN to TMAX
2.2
2.2
µA
Input Offset Current
Open Loop Gain
50
80
500
50
80
500
nA
VCC
VCM
=
;
VOUT = 0.35 V to 2.35 V
76
74
76
74
dB
dB
2
TMIN to TMAX
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
40
280
1.6
MΩ
kΩ
pF
Input Voltage Range
–0.5 to
+3.2
–0.2 to
+2.9
64
–0.5 to
+3.2
–0.2 to
+2.9
64
V
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential Input Voltage
V
VCM = 0 V to 2.7 V
VCM = 0 V to 1.55 V
46
58
46
58
dB
dB
V
74
74
3.4
3.4
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
RL = 10 kΩ
RL = 1 kΩ
+0.05
+2.6
+0.15
+2.55
+0.02
+2.68
+0.08
+2.6
15
21
–34
15
+0.05
+2.6
+0.15
+2.55
+0.02
+2.68
+0.08
+2.6
15
21
–34
15
V
V
V
V
mA
mA
mA
pF
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 41)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
+2.7
75
+12
1250
+2.7
75
+12
1250 µA
V
750
86
750
86
VS– = 0 V to –1 V or
VS+ = +2.7 V to +3.7 V
dB
Specifications subject to change without notice.
–2–
REV. B
AD8031/AD8032
SPECIFICATIONS
(@ TA = +25؇C, VS = +5 V, RL = 1 k⍀ to +2.5 V, RF = 2.5 k⍀ unless otherwise noted)
+5 V Supply
AD8031A/AD8032A
AD8031B/AD8032B
Min Typ Max
Parameter
Conditions
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Slew Rate
G = +1, VO < 0.4 V p-p
G = –1, VO = 2 V Step
G = –1, VO = 2 V Step, CL = 10 pF
54
27
80
32
125
54
27
80
32
125
MHz
V/µs
ns
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
–62
–86
15
2.4
5
0.17
0.11
–60
–62
–86
15
2.4
5
0.17
0.11
–60
dBc
dBc
Input Voltage Noise
Input Current Noise
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
f = 100 kHz
f = 1 kHz
Differential Gain
RL = 1 kΩ
Differential Phase
RL = 1 kΩ
Crosstalk (AD8032 Only)
f = 5 MHz
DC PERFORMANCE
VCC
Input Offset Voltage
VCM
=
;
VOUT = 2.5 V
±1
±6
±6
±0.5
±1.6
±1.5 mV
±2.5 mV
2
TMIN to TMAX
±10
VCC
Offset Drift
VCM
=
;
VOUT = 2.5 V
5
5
µV/°C
2
VCC
Input Bias Current
VCM
=
;
VOUT = 2.5 V
0.45
1.2
0.45
1.2
µA
2
TMIN to TMAX
2.0
2.0
µA
Input Offset Current
Open Loop Gain
50
82
350
50
82
250
nA
VCC
VCM
=
;
VOUT = 1.5 V to 3.5 V 76
74
76
74
dB
dB
2
TMIN to TMAX
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
40
280
1.6
MΩ
kΩ
pF
Input Voltage Range
–0.5 to
+5.5
–0.2 to
+5.2
70
–0.5 to
+5.5
–0.2 to
+5.2
70
V
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential Input Voltage
V
VCM = 0 V to 5 V
VCM = 0 V to 3.8 V
56
66
56
66
dB
dB
V
80
80
3.4
3.4
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
RL = 10 kΩ
RL = 1 kΩ
+0.05
+4.95
+0.2
+0.02
+4.98
+0.1
+4.9
15
28
–46
15
+0.05
+4.95
+0.2
+0.02
+4.98
+0.1
+4.9
15
28
–46
15
V
V
V
V
mA
mA
mA
pF
+4.8
+4.8
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 41)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
+2.7
75
+12
1400
+2.7
75
+12
1400 µA
V
800
86
800
86
VS– = 0 V to –1 V or
VS+ = +5 V to +6 V
dB
Specifications subject to change without notice.
REV. B
–3–
AD8031/AD8032–SPECIFICATIONS
(@ T = +25؇C, V = ؎5 V, R = 1 k⍀ to 0 V, R = 2.5 k⍀ unless otherwise noted)
؎5 V Supply
A
S
L
F
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Slew Rate
G = +1, VO < 0.4 V p-p
G = –1, VO = 2 V Step
G = –1, VO = 2 V Step, CL = 10 pF
54
30
80
35
125
54
30
80
35
125
MHz
V/µs
ns
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
f
C = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
–62
–86
15
2.4
5
0.15
0.15
–60
–62
–86
15
2.4
5
0.15
0.15
–60
dBc
dBc
Input Voltage Noise
Input Current Noise
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
f = 100 kHz
f = 1 kHz
RL = 1 kΩ
RL = 1 kΩ
Differential Gain
Differential Phase
Crosstalk (AD8032 Only)
f = 5 MHz
DC PERFORMANCE
Input Offset Voltage
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
VCM = 0 V; VOUT = 0 V
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
±1
±6
5
±6
±10
±0.5
±1.6
5
±1.5 mV
±2.5 mV
µV/°C
µA
Offset Drift
Input Bias Current
0.45
1.2
2.0
350
0.45
1.2
2.0
250
µA
nA
dB
dB
Input Offset Current
Open Loop Gain
50
80
50
80
VCM = 0 V; VOUT = ±2 V
TMIN to TMAX
76
74
76
74
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
40
280
1.6
MΩ
kΩ
pF
Input Voltage Range
–5.5 to
+5.5
–5.2 to
+5.2
80
–5.5 to
+5.5
–5.2 to
+5.2
80
V
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential/Input Voltage
V
VCM = –5 V to +5 V
VCM = –5 V to +3.5 V
60
66
60
66
dB
dB
V
90
90
3.4
3.4
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
RL = 10 kΩ
RL = 1 kΩ
–4.94
+4.94
–4.7
–4.98
+4.98
–4.85
+4.75
15
35
–50
15
–4.94
+4.94
–4.7
–4.98
+4.98
–4.85
+4.75
15
35
–50
15
V
V
V
V
mA
mA
mA
pF
+4.7
+4.7
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 41)
Capacitive Load Drive
POWER SUPPLY
Operating Range
±1.35
±6
±1.35
±6
V
Quiescent Current per Amplifier
Power Supply Rejection Ratio
900
86
1600
900
86
1600 µA
VS– = –5 V to –6 V or
VS+ = +5 V to +6 V
76
76
dB
Specifications subject to change without notice.
REV. B
–4–
AD8031/AD8032
ABSOLUTE MAXIMUM RATINGS1
temperature of the plastic, approximately +150°C. Exceeding
this limit temporarily may cause a shift in parametric perfor-
mance due to a change in the stresses exerted on the die by
the package. Exceeding a junction temperature of +175°C for
an extended period can result in device failure.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12.6 V
Internal Power Dissipation2
Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline Package (R) . . . . . . . . . . . . . . . . . . 0.8 Watts
µSOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 Watts
SOT-23-5 (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts
Input Voltage (Common-Mode) . . . . . . . . . . . . . ±VS ± 0.5 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±3.4 V
Output Short Circuit Duration
While the AD8031/AD8032 are internally short circuit pro-
tected, this may not be sufficient to guarantee that the maxi-
mum junction temperature (+150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 2.
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range (N, R, RM, RT)
2.0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
8-LEAD PLASTIC
DIP PACKAGE
T = +150؇C
J
NOTES
1.5
1.0
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for the device in free air:
8-LEAD SOIC PACKAGE
8-LEAD SOIC
8-Lead Plastic DIP Package: θJA = 90°C/W.
8-Lead SOIC Package: θJA = 155°C/W.
8-Lead µSOIC Package: θJA = 200°C/W.
5-Lead SOT-23-5 Package: θJA = 240°C/W.
SOT-23-5
0.5
0
MAXIMUM POWER DISSIPATION
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
The maximum power that can be safely dissipated by the
AD8031/AD8032 are limited by the associated rise in junction
temperature. The maximum safe junction temperature for plas-
tic encapsulated devices is determined by the glass transition
AMBIENT TEMPERATURE – ؇C
Figure 2. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Temperature
Range
Package
Descriptions
Package
Options
Brand
Code
Model
AD8031AN
AD8031AR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Plastic DIP
8-Lead SOIC
N-8
SO-8
SO-8
SO-8
RT-5
RT-5
N-8
SO-8
SO-8
SO-8
AD8031AR-REEL
AD8031AR-REEL7
AD8031ART-REEL
AD8031ART-REEL7
AD8031BN
AD8031BR
AD8031BR-REEL
AD8031BR-REEL7
13" Tape and Reel
7" Tape and Reel
13" Tape and Reel
7" Tape and Reel
8-Lead Plastic DIP
8-Lead SOIC
H0A
H0A
13" Tape and Reel
7" Tape and Reel
AD8032AN
AD8032AR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Plastic DIP
8-Lead SOIC
13" Tape and Reel
7" Tape and Reel
8-Lead µSOIC
13" Tape and Reel
7" Tape and Reel
8-Lead Plastic DIP
8-Lead SOIC
13" Tape and Reel
7" Tape and Reel
N-8
SO-8
SO-8
SO-8
RM-8
RM-8
RM-8
N-8
SO-8
SO-8
SO-8
AD8032AR-REEL
AD8032AR-REEL7
AD8032ARM
AD8032ARM-REEL
AD8032ARM-REEL7
AD8032BN
AD8032BR
AD8032BR-REEL
AD8032BR-REEL7
H9A
H9A
H9A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8031/AD8032 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
–5–
AD8031/AD8032–Typical Performance Characteristics
90
80
70
60
50
40
30
20
10
0
800
600
400
200
0
N = 250
V
= +5V
V
= +2.7V
S
S
V
= +10V
S
–200
–400
–600
–800
–5
–4
–3 –2
–1
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
9
10
V
– mV
COMMON-MODE VOLTAGE – V
OS
Figure 3. Typical VOS Distribution @ VS = 5 V
Figure 6. Input Bias Current vs. Common-Mode Voltage
0
2.5
2.3
2.1
V
= +5V
S
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
V
= +5V
S
1.9
1.7
1.5
V
= ؎5V
S
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE – ؇C
COMMON-MODE VOLTAGE – V
Figure 4. Input Offset Voltage vs. Temperature
Figure 7. VOS vs. Common-Mode Voltage
1
1000
0.95
؎I , V = ؎5V
S
S
950
900
850
800
V
= +5V
S
0.9
0.85
0.8
+I , V = +5V
S
S
0.75
0.7
750
700
650
600
0.65
+I , V = +2.7V
S
S
0.6
0.55
0.5
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE – ؇C
TEMPERATURE – ؇C
Figure 5. Input Bias Current vs. Temperature
Figure 8. Supply Current vs. Temperature
REV. B
–6–
AD8031/AD8032
0
–0.5
–1
1.2
1
V
= +2.7V
CC
V
CC
V
= +10V
CC
V
OUT
V
IN
R
0.8
0.6
0.4
LOAD
V
= +5V
CC
V
EE
V
CC
2
V
CC
V
= +5V
–1.5
CC
V
OUT
R
LOAD
V
IN
V
= +10V
CC
V
EE
–2
V
2
CC
0.2
0
V
= +2.7V
CC
–2.5
100
1k
– Ohms
10k
1k
– Ohms
10k
100
R
R
LOAD
LOAD
Figure 9. +Output Saturation Voltage vs. RLOAD @ +85°C
Figure 12. –Output Saturation Voltage vs. RLOAD @ +85°C
0
1.2
V
= +2.7V
CC
V
CC
1
–0.5
–1
V
= +10V
CC
V
OUT
LOAD
V
IN
R
0.8
0.6
0.4
V
= +5V
CC
V
EE
V
2
CC
V
CC
V
= +5V
CC
–1.5
V
OUT
R
LOAD
V
IN
V
= +10V
CC
V
EE
–2
V
2
CC
0.2
0
V
= +2.7V
CC
–2.5
100
1k
– Ohms
10k
1k
– Ohms
10k
100
R
R
LOAD
LOAD
Figure 10. +Output Saturation Voltage vs. RLOAD @ +25°C
Figure 13. –Output Saturation Voltage vs. RLOAD @ +25°C
0
1.2
V
= +2.7V
CC
V
CC
1
–0.5
–1
V
= +10V
CC
V
OUT
LOAD
V
IN
R
0.8
0.6
0.4
V
= +5V
V
CC
EE
V
2
CC
V
CC
V
= +5V
–1.5
CC
V
OUT
LOAD
V
IN
V
= +10V
R
CC
V
EE
–2
V
2
CC
0.2
0
V
= +2.7V
CC
–2.5
100
1k
– Ohms
10k
1k
– Ohms
10k
100
R
R
LOAD
LOAD
Figure 11. +Output Saturation Voltage vs. RLOAD @ –40°C
Figure 14. –Output Saturation Voltage vs. RLOAD @ –40°C
REV. B
–7–
AD8031/AD8032–Typical Performance Characteristics
110
V
= +5V
S
105
100
95
90
85
80
75
70
65
60
500mV
1V
–A
OL
100
90
10
0
+A
OL
V
= +5V
S
10
–10
0%
500mV
2.5
–1.5
0.5
4.5
6.5
INPUT VOLTAGE – Volts
0
2k
4k
R
6k
– Ohms
8k
10k
LOAD
Figure 15. Open-Loop Gain (AOL) vs. RLOAD
Figure 18. Differential Input Overvoltage I-V
Characteristics
86
0.05
0.00
V
= +5V
S
R
= 1k⍀
L
84
82
80
–0.05
–0.10
–A
OL
–0.15
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
+A
OL
0.10
0.05
0.00
78
76
–0.05
–0.10
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
TEMPERATURE – ؇C
Figure 16. Open-Loop Gain (AOL) vs. Temperature
Figure 19. Differential Gain and Phase @ VS = ±5 V;
RL = 1 k⍀
110
100
V
= +5V
S
R
= 10k⍀
V
= +5V
LOAD
S
100
90
100
10
1
30
10
3
VOLTAGE NOISE
R
= 1k⍀
LOAD
80
70
60
50
CURRENT NOISE
0.1
1
0.3
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
10
100
1k
10k
100k
1M
10M
V
– V
OUT
FREQUENCY – Hz
Figure 17. Open-Loop Gain (AOL) vs. VOUT
Figure 20. Input Voltage Noise vs. Frequency
REV. B
–8–
AD8031/AD8032
5
V
= +5V
40
30
S
4
3
G = +1
= 1k⍀
R
L
GAIN
20
10
2
1
0
0
–10
–20
–90
–1
–2
–3
–4
–5
PHASE
–135
–180
–225
0.3
1
10
FREQUENCY – MHz
100
0.1
1
10
100
FREQUENCY – MHz
Figure 21. Unity Gain , –3 dB Bandwidth
Figure 24. Open-Loop Frequency Response
–20
3
V
V
= +5V
S
2
1
0
= –16dBm
–30
–40
IN
V
+85؇C
CC
2
G = +1, R = 2k⍀ TO
L
–40؇C
+25؇C
1.3V p-p
= +2.7V
–50
–60
–1
–2
–3
–4
V
2.5V p-p
= +2.7V
S
V
V
S
S
2k⍀
2V p-p
= +2.7V
V
OUT
V
V
S
IN
50⍀
–70
–80
4.8V p-p
= +5V
V
S
–5
0.1
1
10
100
1k
10k
100k
1M
10M
FREQUENCY – MHz
FUNDAMENTAL FREQUENCY – Hz
Figure 22. Closed-Loop Gain vs. Temperature
Figure 25. Total Harmonic Distortion vs. Frequency; G = +1
2
–20
V
= +2.7V
S
V
R
= +5V
+ C
L
S
1
0
R
+ C TO 1.35V
L
L
G = +2
= +5V
–30
–40
–50
–60
L
V
S
V
TO 2.5V
CC
2
R
= 1k⍀ TO
L
V
= ؎5V
S
–1
–2
4.8V p-p
1V p-p
–3
–4
–5
G = +1
C
R
= 5pF
L
L
–70
–80
–90
= 1k⍀
4.6V p-p
–6
–7
4V p-p
–8
100k
1M
10M
FREQUENCY – Hz
100M
1k
10k
100k
1M
10M
FUNDAMENTAL FREQUENCY – Hz
Figure 23. Closed-Loop Gain vs. Supply Voltage
Figure 26. Total Harmonic Distortion vs. Frequency; G = +2
REV. B
–9–
AD8031/AD8032–Typical Performance Characteristics
10
0
V
= ؎5V
S
–20
V
= +5V
8
S
–40
–60
6
V
V
= +5V
S
4
–80
= +2.7V
S
–100
–120
2
0
1k
10k
100k
FREQUENCY – Hz
1M
10M
100
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
Figure 27. Large Signal Response
Figure 30. PSRR vs. Frequency
V
S
= +5V
R
= 10k⍀ TO 2.5V
= 6V p-p
L
V
IN
100
50
RB = 50⍀
T
5.5
G = +1
4.5
3.5
2.5
1.5
10
1
0.5
RB
T
–0.5
V
0.1
OUT
RB = 0
T
10s / Div
0.1
1
10
100 200
FREQUENCY – MHz
Figure 31. Output Voltage
Figure 28. ROUT vs. Frequency
0
–20
V
= +5V
V
= +5V
S
S
INPUT
G = +1
INPUT = 650mV
BEYOND RAILS
5.5
4.5
3.5
2.5
1.5
–40
–60
0.5
–0.5
–80
–100
10s / Div
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 32. Output Voltage Phase Reversal Behavior
Figure 29. CMRR vs. Frequency
REV. B
–10–
AD8031/AD8032
R
L
TO
V
S
= +2.7V
+2.5V
R
L
= 1k⍀
2.85
G = –1
2.35
1.85
1.35
0.85
R
1.35V
TO
L
0.35
V
S
= +5V
R
= 1k⍀
L
R
L
TO GND
R
L
TO GND
G = –1
0
10s / Div
10s / Div
Figure 33. Output Swing
Figure 35. Output Swing
G = +2
G = +1
R
R
C
= R = 2.5k⍀
= 2k⍀
= 5pF
= +5V
R
R
C
= 0
F
L
L
S
G
F
L
L
S
= 2k⍀ TO 2.5V
= 5pF TO 2.5V
= +5V
3.1
2.56
2.9
2.7
2.54
2.52
V
V
2.5
2.3
2.50
2.48
2.1
1.9
2.46
2.44
50ns/Div
50ns /Div
Figure 34. 1 V Step Response
Figure 36. 100 mV Step Response
–50
–60
–70
–80
V
V
= ؎2.5V
S
= +10dBm
IN
–90
–100
2.5k⍀ 2.5k⍀
2.5k⍀
2.5k⍀
V
OUT
V
IN
1k⍀
50⍀
50⍀
RECEIVER
TRANSMITTER
0.1
1
10
100 200
FREQUENCY – MHz
Figure 37. Crosstalk vs. Frequency
REV. B
–11–
AD8031/AD8032
THEORY OF OPERATION
Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the ampli-
fier to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage will also change to reflect the offset of the
input pair in control. The transition region is small, on the order
of 180 mV. These sudden changes in the dc parameters of
the input stage can produce glitches that will adversely affect
distortion.
The AD8031/AD8032 are single and dual versions of high
speed, low power voltage feedback amplifiers featuring an inno-
vative architecture that maximizes the dynamic range capability
on the inputs and outputs. Linear input common-mode range
exceeds either supply voltage by 200 mV, and the amplifiers
show no phase reversal up to 500 mV beyond supply. The out-
put swings to within 20 mV of either supply when driving a light
load; 300 mV when driving up to 5 mA.
Fabricated on Analog Devices’ XFCB, a 4 GHz dielectrically
isolated fully complementary bipolar process, the amplifier
provides an impressive 80 MHz bandwidth when used as a
follower and 30 V/µs slew rate at only 800 µA supply current.
Careful design allows the amplifier to operate with a supply
voltage as low as 2.7 volts.
Overdriving the Input Stage
Sustained input differential voltages greater than 3.4 volts
should be avoided as the input transistors may be damaged.
Input clamp diodes are recommended if the possibility of this
condition exists.
Input Stage Operation
The voltages at the collectors of the input pairs are set to 200 mV
from the power supply rails. This allows the amplifier to remain
in linear operation for input voltages up to 500 mV beyond the
supply voltages. Driving the input common-mode voltage be-
yond that point will forward bias the collector junction of the
input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided as it is easy
to exceed the maximum allowed input differential voltage when
the amplifier is in phase reversal.
A simplified schematic of the input stage appears in Figure 38.
For common-mode voltages up to 1.1 volts within the positive
supply, (0 V to 3.9 V on a single 5 V supply) tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the amplifier’s input current will change
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance (which deter-
mines the amplifier’s gain and bandwidth) in both regions of
operation.
V
CC
R1
2k⍀
I3
25A
R2
2k⍀
I2
90A
Q9
1.1V
R5
50k⍀
Q3
V
Q2
R9
Q6
Q10
IN
1
R6
R7
1
850⍀ 850⍀
Q8
Q7
Q5
R8
4
4
4
4
850⍀ 850⍀
V
Q13
Q17
I4
25A
IP
OUTPUT STAGE,
COMMON-MODE
FEEDBACK
Q14
Q11
1
1
Q15
Q16
R4
2k⍀
R3
2k⍀
I1
5A
Q18
Q4
V
EE
Figure 38. Simplified Schematic of AD8031 Input Stage
REV. B
–12–
AD8031/AD8032
Output Overdrive Recovery
Output Stage, Open-Loop Gain and Distortion vs. Clearance
from Power Supply
The AD8031 features a rail-to-rail output stage. The output
transistors operate as common emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier’s
open-loop gain.
Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 40, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.
I2
25A
I1
25A
Q51
Q42
Q47
R
G
R
F
R
F
= R = 2k⍀
G
DIFFERENTIAL
DRIVE
FROM
INPUT STAGE
V
Q37
Q38
OUT
V
IN
C9
5pF
R
L
Q68
50⍀
R29
300⍀
Q20
Q27
Q21
V
OUT
C5
1.5pF
Q43
Q48
Q49
I4
25A
I5
25A
V
= ؎2.5V
= ؎2.5V
S
V
IN
Q50
Q44
R
L
= +1k⍀ TO GND
1V
100ns
Figure 39. Output Stage Simplified Schematic
The output voltage limit depends on how much current the
Figure 40. Overdrive Recovery
Driving Capacitive Loads
output transistors are required to source or sink. For applica-
tions with very low drive requirements (a unity gain follower
driving another amplifier input, for instance), the AD8031 typi-
cally swings within 20 mV of either voltage supply. As the re-
quired current load increases, the saturation output voltage will
increase linearly as ILOAD × RC, where ILOAD is the required load
current and RC is the output transistor collector resistance. For
the AD8031, the collector resistances for both output transistors
are typically 25 Ω. As the current load exceeds the rated output
current of 15 mA, the amount of base drive current required to
drive the output transistor into saturation will reach its limit,
and the amplifier’s output swing will rapidly decrease.
Capacitive loads interact with an op amp’s output impedance to
create an extra delay in the feedback path. This reduces circuit
stability, and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.
The capacitive load drive of the AD8031/AD8032 can be in-
creased by adding a low valued resistor in series with the capaci-
tive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby, diminishing its
influence. Figure 41 shows the effects of a series resistor on
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger ca-
pacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier will be
dominated by the roll-off of the series resistor and capacitive
load.
The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and also depends on the output
voltage. Open-loop gain stays constant to within 250 mV of the
positive power supply, 150 mV of the negative power supply and
then decreases as the output transistors are driven further into
saturation.
1000
The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically an amplifier’s
distortion performance degrades as the output voltage ampli-
tude increases.
R
= 5⍀
S
V
= +5V
S
200mV STEP
WITH 30% OVERSHOOT
R
= 0⍀
S
100
10
Used as a unity gain follower, the AD8031/AD8032 output will
exhibit more distortion in the peak output voltage region around
R
= 20⍀
S
V
CC –0.7 V. This unusual distortion characteristic is caused by
the input stage architecture and is discussed in detail in the
section covering “Input Stage Operation.”
R
= 20⍀
S
R
F
R
G
V
R
OUT
S
R
= 0⍀, 5⍀
S
C
L
1
0
1
2
3
4
5
CLOSED-LOOP GAIN – V/V
Figure 41. Capacitive Load Drive vs. Closed-Loop Gain
REV. B
–13–
AD8031/AD8032
0
–10
–20
–30
APPLICATIONS
A 2 MHz Single Supply Biquad Bandpass Filter
Figure 42 shows a circuit for a single supply biquad bandpass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 kΩ resistors
connected between +5 V and ground. This bias point is also
decoupled to ground with a 0.1 µF capacitor. The frequency
response of the filter is shown in Figure 43.
In order to maintain an accurate center frequency, it is essential
that the op amp has sufficient loop gain at 2 MHz. This requires
the choice of an op amp with a significantly higher unity gain
crossover frequency. The unity gain crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of the
individual op amp circuits, we can see that each op amp has a
loop gain of at least 21 dB. This level is high enough to ensure
that the center frequency of the filter is not affected by the op
amp’s bandwidth. If, for example, an op amp with a gain band-
width product of 10 MHz was chosen in this application, the
resulting center frequency would shift by 20% to 1.6 MHz.
–40
–50
10k
100k
1M
10M
100M
FREQUENCY – Hz
Figure 43. Frequency Response of 2 MHz Bandpass Filter
High Performance Single Supply Line Driver
Even though the AD8031/AD8032 swing close to both rails,
the AD8031 has optimum distortion performance when the
signal has a common-mode level half way between the supplies
and when there is about 500 mV of headroom to each rail. If
low distortion is required in single supply applications for sig-
nals that swing close to ground, an emitter follower circuit can
be used at the op amp output.
R6
1k⍀
C1
50pF
+5V
R2
2k⍀
R4
2k⍀
10F
+5V
0.1F
+5V
0.1F
0.1F
C2
50pF
R1
3k⍀
R3
2k⍀
7
3
V
IN
V
IN
6
R5
2k⍀
1k⍀
2N3904
49.9⍀
2
AD8031
AD8031
4
1/2
AD8032
1/2
AD8032
49.9⍀
200⍀
2.49k⍀
2.49k⍀
V
OUT
0.1F
1k⍀
49.9⍀
V
OUT
Figure 42. A 2 MHz Biquad Bandpass Filter Using AD8031/
AD8032
Figure 44. Low Distortion Line Driver for Single Supply
Ground Referenced Signals
REV. B
–14–
AD8031/AD8032
Figure 44 shows the AD8031 configured as a single supply gain-
of-2 line driver. With the output driving a back terminated 50 Ω
line, the overall gain from VIN to VOUT is unity. In addition to
minimizing reflections, the 50 Ω back termination resistor pro-
tects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, very low distortion is attain-
able even when the output signal swings to within 50 mV of
ground. The circuit was tested at 500 kHz and 2 MHz. Figures
45 and 46 show the output signal swing and frequency spectrum
at 500 kHz. At this frequency, the output signal (at VOUT),
which has a peak-to-peak swing of 1.95 V (50 mV to 2 V), has a
THD of –68 dB (SFDR = –77 dB).
Figures 47 and 48 show the output signal swing and frequency
spectrum at 2 MHz. As expected, there is some degradation in
signal quality at the higher frequency. When the output signal
has a peak-to-peak swing of 1.45 V (swinging from 50 mV to
1.5 V), the THD is –55 dB (SFDR = –60 dB).
This circuit could also be used to drive the analog input of a
single supply high speed ADC whose input voltage range is
referenced to ground (e.g., 0 V to 2 V or 0 V to 4 V). In this
case, a back termination resistor is not necessary (assuming a
short physical distance from transistor to ADC), so the emit-
ter of the external transistor would be connected directly to the
ADC input. The available output voltage swing of the circuit
would, therefore be doubled.
1.5V
100
90
100
90
2V
10
0%
10
0%
0.2V
200ns
50mV
50mV
0.5V
1s
Figure 45. Output Signal Swing of Low Distortion Line
Driver at 500 kHz
Figure 47. Output Signal Swing of Low Distortion Line
Driver at 2 MHz
+7dBm
+9dBm
START 0Hz
STOP 20MHz
STOP 5MHz
START 0Hz
Figure 48. THD of Low Distortion Line Driver at 2 MHz
Figure 46. THD of Low Distortion Line Driver at 500 kHz
REV. B
–15–
AD8031/AD8032
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic SOIC
(SO-8)
8-Lead Plastic DIP
(N-8)
0.1968 (5.00)
0.1890 (4.80)
0.39 (9.91)
MAX
8
5
4
8
1
5
4
0.25
(6.35)
0.31
(7.87)
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
1
0.30 (7.62)
REF
PIN 1
0.035 ±0.01
(0.89 ±0.25)
PIN 1
0.0098 (0.25)
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.165 ±0.01
(4.19 ±0.25)
0.0040 (0.10)
0.18 ±0.03
(4.57 ±0.76)
0.125 (3.18)
MIN
15°
0°
0.011 ±0.003
(0.28 ±0.08)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.018 ±0.003 0.10
(0.46 ±0.08) (2.54)
BSC
0.033
(0.84)
NOM
SEATING
PLANE
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8-Lead SOIC
5-Lead Plastic Surface Mount (SOT-23)
(RT-5)
(RM-8)
0.122 (3.10)
0.114 (2.90)
0.1181 (3.00)
0.1102 (2.80)
5
4
8
1
5
1
4
3
0.1181 (3.00)
0.1024 (2.60)
0.0669 (1.70)
0.0590 (1.50)
0.199 (5.05)
0.187 (4.75)
0.122 (3.10)
0.114 (2.90)
2
PIN 1
PIN 1
0.0374 (0.95) BSC
0.0256 (0.65) BSC
0.0748 (1.90)
BSC
0.120 (3.05)
0.112 (2.84)
0.120 (3.05)
0.112 (2.84)
0.0079 (0.20)
0.0031 (0.08)
0.0512 (1.30)
0.0354 (0.90)
0.0571 (1.45)
0.0374 (0.95)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
33°
27°
10؇
0؇
0.018 (0.46)
SEATING
PLANE
0.0197 (0.50)
0.0138 (0.35)
0.0059 (0.15)
0.0019 (0.05)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
0.0217 (0.55)
0.0138 (0.35)
SEATING
PLANE
0.008 (0.20)
REV. B
–16–
相关型号：
©2020 ICPDF网 联系我们和版权申明