AD8055ARTZ-R2 [ADI]
Low Cost, 300 MHz Voltage Feedback Amplifiers; 低成本， 300 MHz电压反馈放大器
| 型号： | AD8055ARTZ-R2 |
| 厂家： | 
ADI |
| 描述： | Low Cost, 300 MHz Voltage Feedback Amplifiers |
| 文件： | 总16页 (文件大小：302K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, 300 MHz
Voltage Feedback Amplifiers
AD8055/AD8056
CONNECTION DIAGRAMS
FEATURES
Low cost single (AD8055) and dual (AD8056)
Easy-to-use voltage feedback architecture
High speed
300 MHz, −3 dB bandwidth (G = +1)
1400 V/μs slew rate
20 ns settling to 0.1%
Low distortion: −72 dBc @ 10 MHz
Low noise: 6 nV/√Hz
1
2
3
4
NC
–IN
+IN
8
7
6
5
NC
1
2
3
V
5
4
+V
OUT
–V
S
+V
S
S
V
OUT
+IN
–IN
–V
S
NC
AD8055
AD8055
Figure 2. RJ-5
S
NC = NO CONNECT
Figure 1. N-8 and R-8
1
2
3
4
8
7
6
5
OUT1
–IN1
+IN1
+V
Low dc errors: 5 mV max VOS, 1.2 μA max IB
Small packaging
OUT
–IN2
+IN2
AD8055 available in 5-lead SOT-23
AD8056 available in 8-lead MSOP
Excellent video specifications (RL = 150 Ω, G = +2)
Gain flatness 0.1 dB to 40 MHz
0.01% differential gain error
–V
S
AD8056
Figure 3. N-8, R-8, and RM-8
Their 0.1 dB flatness out to 40 MHz, wide bandwidth out to
300 MHz, along with 1400 V/μs slew rate and 20 ns settling
time, make them useful for a variety of high speed applications.
0.02° differential phase error
Drives 4 video loads (37.5 V) with 0.02% differential
Gain and 0.1° differential phase
Low power, 5 V supplies 5 mA typ/amplifier power
supply current
The AD8055 and AD8056 require only 5 mA typ/amplifier of
supply current and operate on a dual 5 V or a single +12 V
power supply, while capable of delivering over 60 mA of load
current. The AD8055 is available in a small 8-lead PDIP, an 8-lead
SOIC, and a 5-lead SOT-23, while the AD8056 is available in an
8-lead MSOP. These features make the AD8055/AD8056 ideal
for portable and battery-powered applications where size and
power are critical. These amplifiers in the R-8, N-8, and RM-8
packages are available in the extended temperature range of
−40°C to +125°C.
High output drive current: over 60 mA
APPLICATIONS
Imaging
Photodiode preamps
Video line drivers
Differential line drivers
Professional cameras
Video switchers
Special effects
5
V
R
= 100mV p-p
= 100Ω
OUT
L
R
C
4
3
V
V
OUT
IN
50Ω
A-to-D drivers
Active filters
G = +1
= 0Ω
R
R
2
R
F
F
C
R
R
L
G
= 100Ω
G = +2
= 402Ω
1
R
F
GENERAL DESCRIPTION
0
–1
–2
–3
–4
–5
The AD8055 (single) and AD8056 (dual) voltage feedback
amplifiers offer bandwidth and slew rate typically found in
current feedback amplifiers. Additionally, these amplifiers are
easy to use and available at a very low cost.
G = +10
F
R
= 909Ω
G = +5
R
= 1000Ω
F
Despite their low cost, the AD8055 and AD8056 provide
excellent overall performance. For video applications, their
differential gain and phase error are 0.01% and 0.02° into a
150 Ω load and 0.02% and 0.1° while driving four video loads
(37.50 Ω).
0.3M
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 4. Frequency Response
Rev. J
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD8055/AD8056
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications..................................................................................... 12
Four-Line Video Driver............................................................. 12
Single-Ended-to-Differential Line Driver............................... 12
Low Noise, Low Power Preamp................................................ 12
Power Dissipation Limits .......................................................... 13
Resistor Selection ....................................................................... 13
Driving Capacitive Loads.......................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
General Description......................................................................... 1
Connection Diagrams...................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Test Circuits ..................................................................................... 11
REVISION HISTORY
2/06—Rev. I to Rev. J
10/02—Rev. E to Rev. F
Changes to Format .............................................................Universal
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
Text Changes to Reflect Extended Temperature Range for
R-8, N-8 Packages..............................................................................1
Changes to Specifications.................................................................2
Changes to Absolute Maximum Ratings........................................3
Figure 2 Replaced ..............................................................................3
Changes to Ordering Guide.............................................................3
Outline Dimensions Updated....................................................... 11
2/04—Rev. H to Rev. I
Changes to Features.......................................................................... 1
Changes to Ordering Guide ............................................................ 3
7/01—Rev. D to Rev. E
TPC 24 Replaced with New Graph .................................................7
6/03—Rev. G to Rev. H
Changes to Absolute Maximum Ratings....................................... 3
Updated Ordering Guide................................................................. 3
Updated Outline Dimensions....................................................... 11
3/01—Rev. C to Rev. D
Edit to Curve in TPC 23...................................................................7
2/03—Rev. F to Rev. G
2/01—Rev. B to Rev. C
Edits to Text at Top of Specifications Page (65 to 5)....................2
Changes to Product Description .................................................... 1
Changes to Specifications................................................................ 2
Change to Ordering Guide.............................................................. 3
Outline Dimensions Updated....................................................... 11
Rev. J | Page 2 of 16
AD8055/AD8056
SPECIFICATIONS
TA = 25°C, VS = 5 V, RF = 402 Ω, RL = 100 Ω, Gain = +2, unless otherwise noted.
Table 1.
AD8055A/AD8056A
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth
G = +1, VO = 0.1 V p-p
G=+1, VO = 2 V p-p
G=+2, VO = 0.1 V p-p
G=+2, VO = 2 V p-p
VO = 100 mV p-p
G = +1, VO = 4 V step
G = +2, VO = 4 V step
G = +2, VO = 2 V step
G = +1, VO = 0.5 V step
G = +1, VO = 4 V step
G = +2, VO = 0.5 V step
G = +2, VO = 4 V step
220
125
120
125
25
300
150
160
150
40
MHz
MHz
MHz
MHz
MHz
V/μs
V/μs
ns
ns
ns
ns
ns
Bandwidth for 0.1 dB Flatness
Slew Rate
1000 1400
750
840
20
2
2.7
2.8
4
Settling Time to 0.1%
Rise and Fall Time, 10% to 90%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
fC = 10 MHz, VO = 2 V p-p, RL = 1 kΩ
fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ
−72
−57
−60
6
dBc
dBc
dB
nV/√Hz
pA/√Hz
%
%
Degree
Degree
Crosstalk, Output-to-Output (AD8056) f = 5 MHz, G = +2
Input Voltage Noise
Input Current Noise
Differential Gain Error
f = 100 kHz
f = 100 kHz
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
1
0.01
0.02
0.02
0.1
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
3
5
10
mV
mV
μV/°C
μA
μA
dB
TMIN to TMAX
Offset Drift
Input Bias Current
6
0.4
71
1.2
TMIN to TMAX
VO = 2.5 V
TMIN to TMAX
1
66
64
Open-Loop Gain
dB
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
10
2
3.2
82
MΩ
pF
V
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current1
VCM
=
2.5 V
dB
RL = 150 Ω
VO = 2.0 V
2.9
55
3.1
60
110
V
mA
mA
Short-Circuit Current1
Rev. J | Page 3 of 16
AD8055/AD8056
AD8055A/AD8056A
Parameter
Conditions
Min
Typ
Max
Unit
POWER SUPPLY
Operating Range
Quiescent Current
4.0
5.0
5.4
7.6
6.0
6.5
V
AD8055
TMIN to 125°C
TMIN to 85°C
AD8056
TMIN to 125°C
TMIN to 85°C
+VS = +5 V to +6 V, −VS = −5 V
−VS = –5 V to −6 V, +VS = +5 V
AD8055ART
mA
mA
mA
mA
mA
mA
dB
7.3
12
10
13.9
13.3
Power Supply Rejection Ratio
66
69
72
86
dB
OPERATING TEMPERATURE RANGE
−40
+85
°C
AD8055AR, AD8055AN, AD8056AR, AD8056AN, AD8056ARM −40
+125 °C
1 Output current is limited by the maximum power dissipation in the package. See Figure 5.
Rev. J | Page 4 of 16
AD8055/AD8056
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
MAXIMUM POWER DISSIPATION
Ratings
The maximum power that can be safely dissipated by the
AD8055/AD8056 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.
Supply Voltage
13.2 V
VS
2.5 V
Observe Power
Derating Curves
−65°C to +150°C
−40°C to +125°C
300°C
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range N, R
Operating Temperature Range (A Grade)
Lead Temperature (Soldering 10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
While the AD8055/AD8056 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves.
2.5
2.0
PDIP-8
SOIC-8
1.5
1.0
MSOP-8
0.5
SOT-23-5
0
–55 –45 –35 –25 –15 –5
5
15 25 35 45 55 65 75 85 95 105 115 125
AMBIENT TEMPERATURE (°C)
Figure 5. Plot of Maximum Power Dissipation vs.
Temperature for AD8055/AD8056
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. J | Page 5 of 16
AD8055/AD8056
TYPICAL PERFORMANCE CHARACTERISTICS
0V
0V
20mV
5ns
1V
5ns
Figure 6. Small Step Response, G = +1 (See Figure 34)
Figure 9. Large Step Response, G = −1 (See Figure 35)
5
4
3
2
1
0
V
= 100mV p-p
OUT
L
R
C
R
= 100Ω
V
V
OUT
IN
50Ω
G = +1
F
C
R
R
= 0Ω
R
F
R
R
L
G
= 100Ω
G = +2
= 402Ω
R
F
0V
–1
–2
–3
–4
–5
G = +10
F
R
= 909Ω
G = +5
1V
5ns
R
= 1000Ω
F
0.3M
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 7. Large Step Response, G = +1 (See Figure 34)
Figure 10. Small Signal Frequency Response, G = +1, G = +2, G = +5, G = +10
5
V
R
= 2V p-p
OUT
L
= 100Ω
4
3
2
G = +1
= 0Ω
1
R
F
0V
0
G = +2
R = 402Ω
F
–1
–2
–3
G = +10
= 909Ω
R
F
G = +5
F
20mV
5ns
–4
–5
R
= 1000Ω
0.3M
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 8. Small Step Response, G = −1 (See Figure 35)
Figure 11. Large Signal Frequency Response, G = +1, G = +2, G = +5, G = +10
Rev. J | Page 6 of 16
AD8055/AD8056
–40
–50
–60
–70
–80
–90
0.5
0.4
V
= 100mV
OUT
G = +2
R
R
= 100Ω
= 402Ω
G = +2
= 1kΩ
L
F
0.3
R
L
0.2
0.1
0
SECOND
–0.1
–0.2
–0.3
–0.4
–0.5
THIRD
0
0.4
0.8 1.2
1.6 2.0
2.4 2.8
3.2 3.6
4.0
0.3M
1M
10M
100M
1G
V
(V p-p)
FREQUENCY (Hz)
OUT
Figure 12. 0.1 dB Flatness
Figure 15. Distortion vs. VOUT @ 20 MHz
–50
–60
10
9
8
7
6
5
4
3
2
1
0
G = +1
V
= 2V p-p
OUT
R
R
= 100Ω
L
F
G = +2
= 100Ω
= 0Ω
R
L
SECOND
–70
FALL TIME
–80
THIRD
–90
RISE TIME
–100
10k
100k
1M
FREQUENCY (Hz)
10M
100M
0
0.5 1.0 1.5
2.0 2.5 3.0 3.5
4.0 4.5 5.0
V
(V p-p)
IN
Figure 13. Harmonic Distortion vs. Frequency
Figure 16. Rise Time and Fall Time vs. VIN
10
9
8
7
6
5
4
3
2
1
0
–50
–60
G = +1
L
F
R
R
= 1kΩ
= 0Ω
V
= 2V p-p
OUT
G = +2
= 1kΩ
R
L
–70
FALL TIME
–80
SECOND
–90
RISE TIME
THIRD
0
0.5 1.0 1.5
2.0 2.5 3.0 3.5
V
4.0 4.5 5.0
–100
(V p-p)
10k
100k
1M
10M
100M
IN
FREQUENCY (Hz)
Figure 17. Rise Time and Fall Time vs. VIN
Figure 14. Harmonic Distortion vs. Frequency
Rev. J | Page 7 of 16
AD8055/AD8056
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
10
0
V
V
= 0V TO +2V OR
= 0V TO –2V
G = +2
= 402Ω
OUT
OUT
R
F
G = +2
R
= 100Ω
L
–10
–20
–30
–40
–50
–60
–70
–80
–90
–PSRR
+PSRR
–0.1
–0.2
–0.3
–0.4
–0.5
0
10
20
30
40
50
60
0.1
1
10
100
500
FREQUENCY (MHz)
TIME (ns)
Figure 18. Settling Time
Figure 21. PSRR vs. Frequency
10
9
8
7
6
5
4
3
2
1
0
G = +2
L
F
V
IN
R
R
= 100Ω
= 402Ω
G = +1
R
= 100Ω
L
S
V
= ±5V
V
OUT
RISE TIME
FALL TIME
1V
50ns
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
V
(V p-p)
IN
Figure 19. Rise Time and Fall Time vs. VIN
Figure 22. Overload Recovery
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
G = +2
–20
–30
R
R
= 1kΩ
L
F
V
= 0dBm
IN
= 402Ω
G = +2
R
R
= 100Ω
= 402Ω
L
F
–40
RISE TIME
FALL TIME
–50
–60
SIDE 2 DRIVEN
–70
–80
SIDE 1 DRIVEN
–90
–100
–110
–120
0
0.2
0.4
0.6
0.8
(V p-p)
1.0
1.2
1.4
1.6
V
IN
0.1
1
10
FREQUENCY (MHz)
100 200
Figure 20. Rise Time and Fall Time vs. VIN
Figure 23. Crosstalk (Output-to-Output) vs. Frequency
Rev. J | Page 8 of 16
AD8055/AD8056
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
402Ω
402Ω
402Ω
180
135
90
50Ω
58Ω
402Ω
45
0
–45
–90
10k
100k
1M
10M
100M
500M
0.1
1
10
FREQUENCY (MHz)
100
500
FREQUENCY (Hz)
Figure 24. CMRR vs. Frequency
Figure 27. Phase vs. Frequency
0.04
0.02
G = +2
V
(1V/DIV)
1 BACK TERMINATED LOAD (150Ω)
IN
R
R
= 100Ω
L
F
S
= 402Ω
= ±5V
V
V
(2V/DIV)
OUT
0
G = +2
= 402Ω
–0.02
R
F
–0.04
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
IRE
0.04
0.02
1 BACK TERMINATED LOAD (150Ω)
0
–0.02
–0.04
G = +2
F
50ns
R
= 402Ω
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
IRE
Figure 25. Overload Recovery
Figure 28. Differential Gain and Differential Phase
90
80
70
60
50
40
30
20
10
0
0.04
0.02
4 VIDEO LOADS (37.5Ω)
R
= 100Ω
L
0
G = +2
–0.02
R
= 402Ω
F
–0.04
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
IRE
0.15
0.10
4 VIDEO LOADS (37.5Ω)
0.05
0
–0.05
–0.10
G = +2
R
= 402Ω
F
–10
0.01
–0.15
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
IRE
0.1
1
10
100
500
FREQUENCY (MHz)
Figure 26. Open-Loop Gain vs. Frequency
Figure 29. Differential Gain and Differential Phase
Rev. J | Page 9 of 16
AD8055/AD8056
100
10
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= ±5V
S
R
= 1kΩ
L
R
= 150Ω
L
R
= 50Ω
L
1
0.1
10
100
1k
10k
100k
1M
10M 50M
–55
–35
–15
5
25
45
65
85
105
125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 30. Output Swing vs. Temperature
Figure 32. Current Noise vs. Frequency
1000
100
45
40
35
30
25
20
15
10
G = +2
= 402Ω
R
F
10
6nV/ Hz
5
0
1
10
–5
0.01
100
1k
10k
100k
1M
10M 50M
0.1
1
10
100
500
FREQUENCY (Hz)
FREQUENCY (MHz)
Figure 31. Voltage Noise vs. Frequency
Figure 33. Output Impedance vs. Frequency
Rev. J | Page 10 of 16
AD8055/AD8056
TEST CIRCUITS
4.7µF
402Ω
+V
S
0.01µF
4.7µF
+V
S
0.001µF
0.01µF
HP8130A
V
IN
100Ω
PULSE
7
0.001µF
3
2
GENERATOR
V
OUT
T
/T = 1ns
HP8130A
PULSE
R
F
6
V
50Ω
AD8055
IN
402Ω
7
2
3
100Ω
GENERATOR
R
4
T
/T = 0.67ns
4.7µF
0.01µF
F
6
57Ω
AD8055
V
OUT
100Ω
4
4.7µF
0.01µF
0.001µF
–V
S
0.001µF
–V
S
Figure 35. G = −1, RL = 100 Ω
Figure 34. G = +1, RL = 100 Ω
Rev. J | Page 11 of 16
AD8055/AD8056
APPLICATIONS
Between these points, a feedback resistor can be used to close
the loop. As in the case of a conventional op amp inverting gain
stage, an input resistor is added to vary the gain.
FOUR-LINE VIDEO DRIVER
The AD8055 is a useful low cost circuit for driving up to four
video lines. For such an application, the amplifier is configured
for a noninverting gain of 2, as shown in Figure 36. The input
video source is terminated in 75 ꢀ and is applied to the high
impedance noninverting input.
The gain of this circuit from the input to AMP1 output is RF/RI,
while the gain to the output of AMP2 is −RF /RI. The circuit
therefore creates a balanced differential output signal from a
single-ended input. The advantage of this circuit is that the gain
can be changed by changing a single resistor, while still
maintaining the balanced differential outputs.
Each output cable is connected to the op amp output via a 75 ꢀ
series back termination resistor for proper cable termination.
The terminating resistors at the other ends of the lines divide
the output signal by 2, which is compensated for by the gain of 2
of the op amp stage.
R
F
402Ω
+5V
For a single load, the differential gain error of this circuit was
measured as 0.01%, with a differential phase error of 0.02°. The
two load measurements were 0.02% and 0.03°, respectively. For
four loads, the differential gain error is 0.02%, while the
differential phase increases to 0.1°.
0.1µF
1
10µF
R
402Ω
I
8
3
2
V
IN
49.9Ω
+V
AMP1
OUT
402Ω
402Ω
75Ω
V
OUT1
+5V
402Ω
402Ω
75Ω
402Ω
AD8056
75Ω
0.1µF
10µF
10µF
V
402Ω
75Ω
OUT2
2
7
75Ω
6
AD8055
6
5
V
3
4
IN
49.9Ω
75Ω
75Ω
7
–V
OUT
AMP2
4
V
V
OUT3
0.1µF
75Ω
75Ω
75Ω
0.1µF
10µF
–5V
–5V
OUT4
Figure 37. Single-Ended-to-Differential Line Driver
Figure 36. Four-Line Video Driver
LOW NOISE, LOW POWER PREAMP
The AD8055 makes a good, low cost, low noise, low power
preamp. A gain-of-10 preamp can be made with a feedback
resistor of 909 ꢀ and a gain resistor of 100 ꢀ, as shown in
Figure 38. The circuit has a −3 dB bandwidth of 20 MHz.
SINGLE-ENDED-TO-DIFFERENTIAL LINE DRIVER
Creating differential signals from single-ended signals is
required for driving balanced, twisted pair cables, differential
input ADCs, and other applications that require differential
signals. This can be accomplished by using an inverting and a
noninverting amplifier stage to create the complementary
signals.
909Ω
+5V
+
10µF
0.1µF
6
100Ω
2
3
7
The circuit shown in Figure 37 shows how an AD8056 can be
used to make a single-ended-to-differential converter that offers
some advantages over the architecture previously mentioned.
Each op amp is configured for unity gain by the feedback
resistors from the outputs to the inverting inputs. In addition,
each output drives the opposite op amp with a gain of −1 by
means of the crossed resistors. The result of this is that the
outputs are complementary and there is high gain in the overall
configuration.
V
AD8055
OUT
4
R
S
0.1µF
10µF
–5V
Figure 38. Low Noise, Low Power Preamp with G = +10 and BW = 20 MHz
With a low source resistance (< approximately 100 ꢀ), the
major contributors to the input-referred noise of this circuit are
the input voltage noise of the amplifier and the noise of the
100 Ω resistor. These are 6 nV/√Hz and 1.2 nV/√Hz, respectively.
These values yield a total input referred noise of 6.1 nV/√Hz.
Feedback techniques similar to a conventional op amp are used
to control the gain of the circuit. From the noninverting input
of AMP1 to the output of AMP2 is an inverting gain.
Rev. J | Page 12 of 16
AD8055/AD8056
5
4
POWER DISSIPATION LIMITS
402Ω
402Ω
With a 10 V supply (total VCC − VEE), the quiescent power
dissipation of the AD8055 in the SOT-23-5 package is 65 mW,
while the quiescent power dissipation of the AD8056 in the
MSOP-8 is 120 mW. This translates into a 15.6°C rise above the
ambient for the SOT-23-5 package and a 24°C rise for the
MSOP-8 package.
3
C
= 30pF
L
C
100Ω
V
= 0dBm
L
IN
2
50Ω
1
0
C
L
= 20pF
= 10pF
–1
–2
–3
–4
–5
C
L
The power dissipated under heavy load conditions is
approximately equal to the supply voltage minus the output
voltage, times the load current, plus the quiescent power
previously computed. The total power dissipation is then
multiplied by the thermal resistance of the package to find the
temperature rise, above ambient, of the part. The junction
temperature should be kept below 150°C.
C
= 0pF
L
0.3
1
10
FREQUENCY (MHz)
100
500
Figure 39. Capacitive Load Drive
In general, to minimize peaking or to ensure the stability for
larger values of capacitive loads, a small series resistor, RS, can
be added between the op amp output and the capacitor, CL. For
the setup depicted in Figure 40, the relationship between RS and
CL was empirically derived and is shown in Figure 41. RS was
chosen to produce less than 1 dB of peaking in the frequency
response. Note also that after a sharp rise, RS quickly settles to
approximately 25 ꢀ.
The AD8055 in the SOT-23-5 package can dissipate 270 mW,
while the AD8056 in the MSOP-8 package can dissipate
325 mW (at 85°C ambient) without exceeding the maximum
die temperature. In the case of the AD8056, this is greater than
1.5 V rms into 50 ꢀ, enough to accommodate a 4 V p-p sine
wave signal on both outputs simultaneously. However, because
each output of the AD8055 or AD8056 is capable of supplying
as much as 110 mA into a short circuit, a continuous short-
circuit condition will exceed the maximum safe junction
temperature.
402Ω
+5V
0.1µF
6
10µF
RESISTOR SELECTION
402Ω
7
2
3
FET PROBE
Table 3 is a guide for resistor selection for maintaining gain
flatness vs. frequency for various values of gain.
R
S
V
AD8055
OUT
C
L
4
V
= 0dBm
IN
Table 3.
Gain
+1
+2
+5
+10
50Ω
0.1µF
10µF
RF (Ω)
0
402
1 k
RG (Ω)
−3 dB Bandwidth (MHz)
–5V
300
160
45
Figure 40. Setup for RS vs. CL
402
249
100
40
35
30
25
20
15
10
5
909
20
DRIVING CAPACITIVE LOADS
When driving a capacitive load, most op amps exhibit peaking
in the frequency response just before the frequency rolls off.
Figure 39 shows the responses for an AD8056 running at a gain
of +2, with an 100 ꢀ load that is shunted by various values of
capacitance. It can be seen that under these conditions the part
is still stable with capacitive loads of up to 30 pF.
0
0
10
20
30
40
(pF)
50
60
270
C
L
Figure 41. RS vs. CL
Rev. J | Page 13 of 16
AD8055/AD8056
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
1
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 42. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. J | Page 14 of 16
AD8055/AD8056
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 44. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.22
0.08
10°
5°
0°
0.15 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 45. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Rev. J | Page 15 of 16
AD8055/AD8056
ORDERING GUIDE
Model
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
Branding
AD8055AN
AD8055ANZ1
AD8055AR
AD8055AR-REEL
AD8055AR-REEL7
AD8055ARZ1
AD8055ARZ-REEL1
AD8055ARZ-REEL71
AD8055ART-R2
AD8055ART-REEL
AD8055ART-REEL7
AD8055ARTZ-R21
AD8055ARTZ-REEL71
AD8056AN
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
5-Lead SOT-23, Reel
5-Lead SOT-23, 13" Tape and Reel
5-Lead SOT-23, 7" Tape and Reel
5-Lead SOT-23, Reel
5-Lead SOT-23, 7" Tape and Reel
8-Lead PDIP
H3A
H3A
H3A
H3A
H072
AD8056ANZ1
AD8056AR
8-Lead PDIP
8-Lead SOIC_N
AD8056AR-REEL
AD8056AR-REEL7
AD8056ARZ1
AD8056ARZ-REEL1
AD8056ARZ-REEL71
AD8056ARM
AD8056ARM-REEL
AD8056ARM-REEL7
AD8056ARMZ1
AD8056ARMZ-REEL1
AD8056ARMZ-REEL71
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
H5A
H5A
H5A
H5A#
H5A#
H5A#
1 Z = Pb-free part, # denotes lead-free product may be top or bottom marked.
2 Prior to 0542, parts were branded H3A.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C01063-0-2/06(J)
Rev. J | Page 16 of 16
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