AD8251ARZ-R7 [ADI]
12MHz 20V/us G=1,2,4,8 Programmable Gain iCMOS Instrumentation Amplifier; 12MHz的20V / us的G = 1,2,4,8可编程增益的iCMOS仪表放大器型号: | AD8251ARZ-R7 |
厂家: | ADI |
描述: | 12MHz 20V/us G=1,2,4,8 Programmable Gain iCMOS Instrumentation Amplifier |
文件: | 总8页 (文件大小:124K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
12MHz 20V/μs G=1,2,4,8 Programmable
Gain
i
CMOS™ Instrumentation Amplifier
Preliminary Technical Data
AD8251
FEATURES
Easy to Use
GENERAL DESCRIPTION
Programmable Gains: 1, 2, 4, 8
Digital or Pin Programmable Gain Setting
Temp Range -40°C to 85°C
The AD8251 is a digitally gain programmable
instrumentation amplifier that has high GΩ input
impedance and low distortion making it suitable for sensor
interfacing and driving high sample rate analog to digital
converters. It has high bandwidth of 12MHz, low distortion
and settle time of 0.5us to 0.01%. Offset drift and gain drift
are limited to 1uV/°C and 10ppm/°C respectively. In
addition to its wide input common-voltage range, it boasts a
high common-mode rejection of 80dB at G=1 from DC to
50kHz. The combination of precision DC performance
coupled with high speed capabilities make the AD8251 an
excellent candidate for data acquisition and medical
applications. Furthermore, this monolithic solution
simplifies design, manufacturing and boosts performance of
instrumentation by maintaining tight match of internal
resistors and amplifiers.
EXCELLENT DC PERFORMANCE
High CMRR 98dB G=8
Low Gain Drift: 10ppm/°C
Low Offset Drift: 1uV/°C
Low Offset: 75uV G=8
EXCELLENT AC PERFORMANCE
Fast Settle Time: 0.5us to 0.01%
High Slew Rate: 20V/μs
High CMRR over Frequency: 80dB to 50kHz
Low Noise: 13nV√Hz, G=8
Low Power: 3.5 mA (typ)
Supply: ±5V to ±12V
The AD8251’s user interface comprises of a parallel port that
allows users to set the gain in one of three different ways. A
two bit word sent to A1 and A2, via a bus may be latched
Applications
Data Acquisition
Bio-Medical Analysis
Test and Measurement
High Performance System Monitoring
using the
input. An alternative is to set the gain within
WR
1μs by using the gain port in transparent mode where the
state of A0 and A1 directly set the gain. The last method is
to strap A1 and A2 to a high or low voltage potential,
permanently setting the gain.
DGD
WR
A1
A0
Logic
-IN
The AD8251 is available in a 10 pin MSOP package and
specified over -40°C to 85°C, making it an excellent solution
for applications where size and packing density are
important considerations.
OUT
+IN
AD8251
+VS
-VS
REF
Figure 1. Functional Block Diagram
Rev.PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2006 Analog Devices, Inc. All rights reserved.
AD8251
Preliminary Technical Data
TABLE OF CONTENTS
AD8251—Specifications.................................................................. 3
Transparent Gain Setting Mode: .................................................5
Write Enable Gain Setting Mode:................................................5
Outline Dimensions..........................................................................5
ESD Caution...................................................................................5
Preliminary Revision : B
Timing Diagram ........................................................................... 5
Absolute Maximum Ratings............................................................ 5
Pin Configurations And Functional Descriptions ....................... 5
REVISION HISTORY
Rev. PrB | Page 2 of 8
Preliminary Technical Data
AD8251
AD8251—SPECIFICATIONS
Table 1. VS = 12 V, VREF = 0 V (@TA = 25oC, G = +1, RL = 2 kΩ, unless otherwise noted.)
AD8251ARM
Typ Max
Parameter
Conditions
Min
Unit
COMMON-MODE REJECTION RATIO
(CMRR)
CMRR to 60 Hz with 1 kΩ Source
Imbalance
VCM = -10 V to +10 V
G = 1
G = 2
G = 4
G = 8
80
86
92
98
dB
dB
dB
dB
CMRR to 50kHz
VCM = -10 V to +10 V
G = 1
G = 2
G = 4
G = 8
80
dB
dB
dB
dB
NOISE
Voltage Noise, 1kHz
G=1
G=2
G=4
G=8
G=1
G=2
G=4
G=8
32
20
15
13
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
ꢀV p-p
ꢀV p-p
ꢀV p-p
ꢀV p-p
fA/√Hz
RTI, 0.1 Hz to 10 Hz
Current Noise
VOLTAGE OFFSET
Offset, VOS
f = 1kHz
G=1, VS = ±5 V to ±12 V
T = -40°C to +85°C
T = -40°C to +85°C
G=2, VS = ±5 V to ±12 V
T = -40°C to +85°C
T = -40°C to +85°C
G=4, VS = ±5 V to ±12 V
T = -40°C to +85°C
T = -40°C to +85°C
G=8, VS = ±5 V to ±12 V
T = -40°C to +85°C
T = -40°C to +85°C
250
150
100
75
μV
Over Temperature
Average TC
μV
μV/°C
μV
Offset, VOS
Over Temperature
Average TC
μV
μV/°C
μV
Offset, VOS
Over Temperature
Average TC
μV
μV/°C
μV
Offset, VOS
Over Temperature
Average TC
μV
μV/°C
Offset Referred to the Input vs.
Supply (PSR)
VS = ±8 V to ±12 V
G = 1
G = 2
G = 4
G = 8
115
110
110
110
dB
dB
dB
dB
96
INPUT CURRENT
Input Bias Current
Over Temperature
10
25
35
nA
nA
T = -40°C to +85°C
Rev. PrB| Page 3 of 8
AD8251
Preliminary Technical Data
AD8251ARM
Parameter
Conditions
Min
Typ Max
Unit
Average TC
pA/°C
nA
5
10
Input Offset Current
Over Temperature
Average TC
T = -40°C to +85°C
nA
1.5
pA/°C
DYNAMIC RESPONSE
Small Signal -3dB Bandwidth
17
15
12
5
MHz
MHz
MHz
MHz
G=1
G=2
G=4
G=8
Settling Time 0.01%
10 V Step
G=1
0.5
μS
μS
μS
μS
G=2
G=4
G=8
Settling Time 0.001%
10 V Step
G=1
1.5
μS
μS
μS
μS
G=2
G=4
G=8
Slew Rate
20
G=1
G=2
G=4
G=8
35
35
35
35
V/μS
V/μS
V/μS
V/μS
30
30
30
Total Harmonic Distortion +
Noise
RL = 100kOhms, G=1
RL = 2kOhms, G=1
%
%
GAIN
Gain Range: 1, 2, 4, 8
Gain Error
1
10
V/V
%
VOUT= ±10 V
G=1
0.05
G=2
G=4
G=8
Gain Nonlinearity
VOUT = –10 V to +10 V
G=1, RL = 10 kΩ
G=2, RL = 10 kΩ
G=4, RL = 10 kΩ
G=8, RL = 10 kΩ
G=1-8, RL = 2 kΩ
All Gains
4
4
4
4
4
ppm
ppm
ppm
ppm
Gain Nonlinearity
Gain vs. Temperature
ppm
10
ppm/°C
INPUT
Input Impedance
Differential
1|| 2
1|| 2
GΩ|| pF
GΩ|| pF
Common Mode
+Vs
1.5
Input Operating Voltage Range
Over Temperature
VS = ±5 V to ±12 V
T = -40°C to +85°C
-Vs + 1
V
V
Rev. PrB | Page 4 of 8
Preliminary Technical Data
AD8251
AD8251ARM
Typ Max
Parameter
Conditions
Min
Unit
OUTPUT
RL = 10 kΩ,
–Vs +
1.5
+Vs –
1.5
Output Swing
VS = ±5 V to ±12 V
T = -40°C to +85°C
V
Over Temperature
Short Circuit Current
REFERENCE INPUT
RIN
V
20
20
mA
kΩ
μA
V
IIN
VIN+, VIN–, VREF = 0
–Vs
+Vs
Voltage Range
Gain to Output
V/V
V
Digital Logic Inputs
Digital Ground Voltage, DGND
Digital Input Voltage Low
Digital Input Voltage High
Digital Input Leakage Current
Gain Switching Time
TSU
V
1
4
Referenced to DGND
Referenced to DGND
V
V
pA
ns
ns
ns
ns
ns
THD
TWR_LO
TWR_HI
POWER SUPPLY
Operating Range3
Quiescent Current
Over Temperature
TEMPERATURE RANGE
Specified Performance
±5
±12
3.5
mA
mA
T = -40°C to +85°C
–40
+85
°C
TIMING DIAGRAM
t
t
WR-LO
WR-HI
WR
t
t
HD
SU
A0, A1
Figure 2.Timing Diagram
Rev. PrB| Page 5 of 8
AD8251
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Board)
Table 2. AD8251 Absolute Maximum Ratings
Package Glass Transition
Temperature
°C
Parameter
Rating
ESD (Human Body Model)
ESD (Charge Device Model)
ESD (Machine Model)
kV
kV
kV
Supply Voltage
+/-14V
Power Dissipation
See Figure 2
Output Short Circuit Current
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature
Operating Temperature Range
-Vs – 0.5 V to +Vs + 0.5 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
V
–65°C to +125°C
–40°C to +85°C
°C
Lead Temperature Range
(Soldering 10 sec)
Junction Temperature
°C
ΘJA (4 layer JEDEC Standard
°C/W
Rev. PrB | Page 6 of 8
Preliminary Technical Data
AD8251
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
TRANSPARENT GAIN SETTING MODE:
-IN
DGND
-VS
1
2
3
4
5
10 +IN
9
8
7
6
VREF
In this mode, the gain is set by toggling A0 and A1 to HIGH or
LOW. To enable transparent mode, tie to –Vs. This
AD8251
+VS
TOP VIEW
WR
(Not to Scale)
A0
VOUT
WR
configures the AD8251 to change gains when A0 and A1 are set
according to Table 4.
A1
NC = NO CONNECT
Table 4. . Transparent Mode Gain Settings
Figure 3. 10-Lead MSOP
G
WR A1 A0
-Vs LO LO
-Vs LO HI
-Vs HI LO
-Vs HI HI
1
2
4
8
WRITE ENABLE GAIN SETTING MODE:
In this mode, the gains are changed only during the negative
edge of the
strobe. So for instance, the gain is determined
WR
by the two bit value held on A0 and A1 at the time the
strobe transitions from HIGH to LOW.
WR
Table 3. Pin Function Descriptions—
10-Lead MSOP(ARM PACKAGE)
Pin No.
Name
Description
t
t
WR-LO
WR-HI
1
-IN
Inverting Input Terminal (True
differential input)
WR
2
3
4
5
6
7
8
9
DGND
-Vs
Digital Ground.
t
t
HD
SU
Negative Supply Terminal
Gain Setting Pin (LSB)
Gain Setting Pin (MSB)
Write Enable
A0, A1
A0
A1
WR
Table 5. : Write Enable Mode Gain Settings
Gain (changes to) WR A1 A0
VOUT
+Vs
VREF
Output Terminal
Positive Supply Terminal
Reference Voltage Terminal (drive this
pin with a low impedance voltage
source to level shift the output signal)
1
HI -> LO LO LO
HI -> LO LO HI
HI -> LO HI LO
HI -> LO HI HI
2
10
+IN
Non-inverting Input Terminal (True
differential input)
4
8
No Change
No Change
No Change
X = don’t care
LO->LO
LO->HI
HI-> HI
X
X
X
X
X
X
GAIN SETTING
The AD8251’s gains are set digitally. The A0 and A1 pins must
be set either HIGH or LOW with respect to digital ground,
DGND. The
pin is a tri-state switch. It may be set to one of
WR
three levels, HIGH, LOW or to –VS. A HIGH signal is typically
greater than 4V but less than 6V and a LOW signal is typically
less than 1V but higher than DGND, 0V. Gains can be
programmed using the following methods:
.
Rev. PrB| Page 7 of 8
AD8251
Preliminary Technical Data
OUTLINE DIMENSIONS
3.10
3.00
2.90
6
10
5.15
4.90
4.65
3.10
3.00
2.90
1
5
PIN 1
0.50 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.05
0.33
0.17
SEATING
PLANE
0.23
0.08
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 4. 10 Lead MSOP (RM) – Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table 6. Ordering Guide
AD00000 Products
Temperature Package
Package Description
10-Lead MSOP
Package Option
RM-10
Branding
AD8251ARZ
–40°C to +85°C
AD8251ARZ-RL
AD8251ARZ-R7
AD8251-EVAL
–40°C to +85°C
10-Lead MSOP
RM-10
–40°C to +85°C
10-Lead MSOP
RM-10
Evaluation Board
Rev. PrB | Page 8 of 8
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