AD8273_08 [ADI]
Dual-Channel, Audio Difference Amplifier; 双通道音频差分放大器
| 型号： | AD8273_08 |
| 厂家： | 
ADI |
| 描述： | Dual-Channel, Audio Difference Amplifier |
| 文件： | 总16页 (文件大小：423K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual-Channel,
Audio Difference Amplifier
AD8273
FUNCTIONAL BLOCK DIAGRAM
FEATURES
+V
S
Two gain settings
11
Gain of ½ (−6 dB)
Gain of 2 (+6 dB)
12kΩ
6kΩ
2
12
13
0.05% maximum gain error
10 ppm maximum gain drift
Excellent ac specifications
20 V/μs minimum slew rate
800 ns to 0.01% settling time
Low distortion: 0.004%, 20 Hz to 20 kHz
High accuracy dc performance
77 dB minimum CMRR
700 μV maximum offset voltage
14-lead SOIC package
Supply current: 2.5 mA maximum per channel
Supply range: 2.5 V to 18 V
12kΩ
12kΩ
6kΩ
6kΩ
3
6
14
10
9
8
12kΩ
6kΩ
5
4
–V
S
Figure 1.
APPLICATIONS
High performance audio
Instrumentation amplifier building blocks
Level translators
Automatic test equipment
Sin/Cos encoders
GENERAL DESCRIPTION
Table 1. Difference Amplifiers by Category
The AD8273 is a low distortion, dual-channel amplifier with
internal gain setting resistors. With no external components,
it can be configured as a high performance difference amplifier
(G = ½ or 2), inverting amplifier (G = ½ or 2), or noninverting
amplifier (G = 1½ or 3).
Low
Distortion
High
Voltage
Single-Supply
Unidirectional
Single-Supply
Bidirectional
AD8270
AD8273
AMP03
AD628
AD629
AD8202
AD8203
AD8205
AD8206
AD8216
The AD8273 operates on both single and dual supplies and only
requires 2.5 mA maximum supply current for each amplifier.
It is specified over the industrial temperature range of −40°C to
+85°C and is fully RoHS compliant.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
AD8273
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
Theory of Operation ...................................................................... 11
Configurations............................................................................ 11
Power Supplies............................................................................ 11
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 13
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Maximum Power Dissipation ..................................................... 4
ESD Caution.................................................................................. 4
REVISION HISTORY
1/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
AD8273
SPECIFICATIONS
VS = 15 V, VREF = 0 V, TA = 25°C, G = ½, RL = 2 kΩ, unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Bandwidth
Slew Rate
Settling Time to 0.1%
Settling Time to 0.01%
Channel Separation
NOISE/DISTORTION1
THD + Noise
20
MHz
V/μs
ns
ns
dB
20
10 V step on output, CL = 100 pF
10 V step on output, CL = 100 pF
f = 1 kHz
670
750
130
750
800
f = 1 kHz, VOUT = 10 V p-p, 600 Ω load
20 kHz BW
f = 20 Hz to 20 kHz
f = 1 kHz
0.004
−106
3.5
%
dBu
μV rms
nV/√Hz
Noise Floor, RTO2
Output Voltage Noise (Referred to Output)
26
GAIN
Gain Error
Gain Drift
Gain Nonlinearity
0.05
10
%
−40°C to +85°C
VOUT = 10 V p-p, 600 Ω load
VOUT = 5 V p-p, 600 Ω load
2
200
50
ppm/°C
ppm
ppm
INPUT CHARACTERISTICS
Offset3
Referred to output
−40°C to +85°C
VS = 2.5 V to 18 V
100
3
2
700
μV
vs. Temperature
vs. Power Supply
Common-Mode Rejection Ratio
Input Voltage Range4
Impedance5
μV/°C
μV/V
dB
10
VCM
=
40 V, RS = 0 Ω, referred to input
77
86
−3VS + 4.5
+3VS − 4.5
V
Differential
Common Mode6
VCM = 0 V
36
9
kΩ
kΩ
OUTPUT CHARACTERISTICS
Output Swing
−VS + 1.5
+VS − 1.5
V
Short-Circuit Current Limit
Sourcing
Sinking
G = ½
100
60
200
1200
mA
mA
pF
pF
Capacitive Load Drive
G = 2
POWER SUPPLY
Supply Current (per Amplifier)
TEMPERATURE RANGE
Specified Performance
2.5
mA
°C
−40
+85
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.
2 dBu = 20 log (V rms /0.7746).
3 Includes input bias and offset current errors.
4 May also be limited by absolute maximum input voltage or by the output swing. See the Absolute Maximum Ratings section and Figure 9 through Figure 12 for
details.
5 Internal resistors are trimmed to be ratio matched but have 20% absolute accuracy.
6 Common mode is calculated looking into both inputs. Common-mode impedance looking into only one input is 18 kΩ.
Rev. 0 | Page 3 of 16
AD8273
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Table 3.
The maximum safe power dissipation for the AD8273 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period can result in a loss of functionality.
Parameter
Rating
Supply Voltage
Output Short-Circuit Current
18 V
Observe
derating curve
40 V
40 V
3 mA
−65°C to +130°C
−40°C to +85°C
Voltage at Any Input Pin
Differential Input Voltage
Current into Any Input Pin
Storage Temperature Range
Specified Temperature Range
Thermal Resistance
The AD8273 has built-in, short-circuit protection that limits the
output current to approximately 100 mA (see Figure 2 for more
information). While the short-circuit condition itself does not
damage the part, the heat generated by the condition can cause
the part to exceed its maximum junction temperature, with
corresponding negative effects on reliability.
θJA
θJC
105°C/W
36°C/W
150°C
Package Glass Transition Temperature (TG)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
2.0
T
JA
MAX = 150°C
J
θ
= 105°C/W
1.6
1.2
0.8
0.4
0
–50
–25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. 0 | Page 4 of 16
AD8273
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
–12A
+12A
1
2
3
4
5
6
7
14 +6A
13 OUTA
12 –6A
AD8273
–V
TOP VIEW
11 +V
S
S
(Not to Scale)
+12B
–12B
NC
10 –6B
9
8
OUTB
+6B
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 7
2
3
NC
No Connect.
−12A
+12A
−VS
The 12 kΩ resistor connects to the negative terminal of Op Amp A.
The 12 kΩ resistor connects to the positive terminal of Op Amp A.
Negative Supply.
4
5
6
8
9
10
11
12
13
14
+12B
−12B
+6B
OUTB
−6B
+VS
−6A
OUTA
+6A
The 12 kΩ resistor connects to the positive terminal of Op Amp B.
The 12 kΩ resistor connects to the negative terminal of Op Amp B.
The 6 kΩ resistor connects to the positive terminal of Op Amp B.
Op Amp B Output.
The 6 kΩ resistor connects to the negative terminal of Op Amp B.
Positive Supply.
The 6 kΩ resistor connects to the negative terminal of Op Amp A.
Op Amp A Output.
The 6 kΩ resistor connects to the positive terminal of Op Amp A.
Rev. 0 | Page 5 of 16
AD8273
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 15 V, TA = 25°C, G = ½, difference amplifier configuration, unless otherwise noted.
500
N: 1641
MEAN: –9.5
SD: 228.4
100
80
60
40
20
0
400
300
200
100
0
–100
–200
–300
–400
–500
REPRESENTATIVE SAMPLES
–500
–250
0
250
500
–45 –30 –15
0
15 30 45 60 75 90 105 120
TEMPERATURE (°C)
V
±15V (µV/V)
OSO
Figure 4. Typical Distribution of System Offset Voltage,
G = ½, Referred to Output
Figure 7. System Offset vs. Temperature, Normalized at 25°C,
Referred to Output
150
100
50
N: 1649
MEAN: –0.59
SD: 37.3
120
100
80
60
40
20
0
0
–50
–100
–150
REPRESENTATIVE SAMPLES
–200
–150
–100
–50
0
50
100
150
–45 –30 –15
0
15 30 45 60 75 90 105 120
TEMPERATURE (°C)
CMRR ±15V (µV/V)
Figure 5. Typical Distribution of CMRR, G = ½, Referred to Input
Figure 8. Gain Error vs. Temperature, Normalized at 25°C
50
70
60
G = ½
0, +40
40
30
50
40
–13.5, +26.5
+13.5, +26.5
30
20
20
10
10
0
0
–10
–20
–30
–40
–50
–60
–10
–20
–30
–40
–50
–13.5, –26.5
+13.5, –26.5
–70
0, –40
0
REPRESENTATIVE SAMPLES
–80
–15
–10
–5
5
10
15
–45 –30 –15
0
15 30 45 60 75 90 105 120
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
Figure 6. CMRR vs. Temperature, Normalized at 25°C
Figure 9. Input Common-Mode Voltage vs. Output Voltage,
Gain = ½, 15 V Supplies
Rev. 0 | Page 6 of 16
AD8273
18
15
12
9
140
120
100
80
G = ½
POSITIVE PSRR
NEGATIVE PSRR
–3.5, +14
±5V SUPPLIES
+3.5, +7
6
–1, +4
3
+1, +2
±2.5V
SUPPLIES
0
60
–3
–6
–9
–12
–15
–18
–1, –2
+1, –4
40
–3.5,–7
20
+3.5, –14
3 4
0
–4
–3
–2
–1
0
1
2
1
10
100
1k
10k
100k
1M
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 13. Power Supply Rejection vs. Frequency, G = ½, Referred to Output
Figure 10. Input Common-Mode Voltage vs. Output Voltage,
Gain = ½, 5 V and 2.5 V Supplies
50
32
0, +40
G = 2
+13.5, +36.25
±15V SUPPLY
40
30
28
24
20
16
12
–13.5, +36.25
20
10
0
–10
–20
–30
–40
–50
±5V SUPPLY
8
+13.5, –36.25
10
–13.5, –36.25
–10
4
0, –40
0
0
100
–15
–5
5
15
1k
10k
100k
1M
10M
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 14. Maximum Output Voltage vs. Frequency
Figure 11. Input Common-Mode Voltage vs. Output Voltage,
Gain = 2, 15 V Supplies
8
10
5
G = 2
–3.5, +6.125
G = 2
6
4
±5V SUPPLIES
+3.5, +4.375
0
–1, +1.175
2
+1, +1.25
±2.5V
SUPPLIES
G = ½
–5
0
–1, –1.25
–2
–4
–6
–8
+1, –1.175
–10
–15
–20
–3.5, –4.375
+3.5, –6.125
100
1k
10k
100k
1M
10M
100M
–4
–3
–2
–1
0
1
2
3
4
FREQUENCY(Hz)
OUTPUT VOLTAGE (V)
Figure 15. Gain vs. Frequency
Figure 12. Input Common-Mode Voltage vs. Output Voltage,
Gain = 2, 5 V and 2.5 V Supplies
Rev. 0 | Page 7 of 16
AD8273
+V
120
S
–40°C
+25°C
+V – 3
GAIN = 2
GAIN = ½
S
100
80
+125°C
+V – 6
S
+85°C
–V + 6
S
+125°C
+85°C
60
+25°C
–V + 3
S
–40°C
–V
S
40
100
0
20
40
60
80
100
1k
10k
100k
1M
CURRENT (mA)
FREQUENCY (Hz)
Figure 19. Output Voltage vs. IOUT
Figure 16. Common-Mode Rejection vs. Frequency, Referred to Input
120
I
SHORT+
C
= 100pF
LOAD
100
80
60
40
20
0
–20
–40
–60
–80
–100
–120
NO LOAD
600Ω
2kΩ
I
SHORT–
–40
–20
0
20
40
60
80
100
120
1µs/DIV
TEMPERATURE (°C)
Figure 20. Small Signal Step Response, Gain = 2
Figure 17. Short-Circuit Current vs. Temperature
+V
S
+85°C
+125°C
C
= 100pF
LOAD
+V – 2
+25°C
–40°C
S
+V – 4
S
0
NO LOAD
–V + 2
S
+125°C
600Ω
2kΩ
–V + 4
S
–40°C
+25°C
+85°C
–V
S
200
1k
10k
1µs/DIV
R
(Ω)
LOAD
Figure 18. Output Voltage Swing vs. RLOAD, VS = 15 V
Figure 21. Small Signal Step Response, Gain = ½
Rev. 0 | Page 8 of 16
AD8273
100
90
80
70
60
50
40
30
20
10
0
2.5V
5V
15V
18V
0
20
40
60
80
100 120 140 160 180 200
1µs/DIV
CAPACITANCE (pF)
Figure 22. Small Signal Pulse Response with 500 pF Capacitor Load, Gain = 2
Figure 25. Small Signal Overshoot vs. Capacitive Load,
G = ½, 600 Ω in Parallel with Capacitive Load
100
90
80
70
60
50
40
30
20
10
0
2.5V
5V
15V
18V
0
200
400
600
800
1000
1200
1µs/DIV
CAPACITANCE (pF)
Figure 23. Small Signal Pulse Response for 100 pF Capacitive Load,
Gain = ½
Figure 26. Small Signal Overshoot vs. Capacitive Load,
G = 2, No Resistive Load
100
100
90
80
70
60
50
40
30
20
10
0
90
2.5V
80
5V
70
15V
2.5V
15V
5V
60
18V
50
40
30
20
10
0
18V
0
20
40
60
80
100 120 140 160 180 200
0
200
400
600
800
1000
1200
CAPACITANCE (pF)
CAPACITANCE (pF)
Figure 24. Small Signal Overshoot vs. Capacitive Load, G = ½,
No Resistive Load
Figure 27. Small Signal Overshoot vs. Capacitive Load,
G = 2, 600 Ω in Parallel with Capacitive Load
Rev. 0 | Page 9 of 16
AD8273
0.1
0.01
GAIN = ½
GAIN = 2
0.001
0.0001
20
200
FREQUENCY (Hz)
2k
20k
1µs/DIV
Figure 28. Large Signal Pulse Response Gain = ½
Figure 31. THD+N vs. Frequency, VOUT = 10 V p-p
10000
1000
100
GAIN = 2
GAIN = ½
10
1
10
100
1k
10k
100k
1µs/DIV
FREQUENCY (Hz)
Figure 29. Large Signal Pulse Response, Gain = 2
Figure 32. Voltage Noise Density vs. Frequency, Referred to Output
40
35
30
25
20
15
10
5
G = 2
+SR
–SR
G = ½
0
–40
–20
0
20
40
60
80
100
120
1s/DIV
TEMPERATURE (°C)
Figure 30.Slew Rate vs. Temperature
Figure 33. 0.1 Hz to 10 Hz Voltage Noise, RTO
Rev. 0 | Page 10 of 16
AD8273
THEORY OF OPERATION
The AD8273 has two channels, each consisting of a high
precision, low distortion op amp and four trimmed resistors.
Although such a circuit can be built discretely, placing the
resistors on the chip offers advantages to board designers that
include better dc specifications, better ac specification, and
lower production costs.
6kΩ
12kΩ
12
2
–IN1
OUT1
13
6kΩ
6kΩ
12kΩ
12kΩ
3
14
10
+IN1
–IN2
6
9
The resistors on the AD8273 are laser trimmed and tightly
matched. Specifications that depend on the resistor matching,
such as gain drift, common-mode rejection, and gain accuracy,
are better than can be achieved with standard discrete resistors.
OUT2
6kΩ
12kΩ
5
8
+IN2
The positive and negative input terminals of the AD8273
op amp are not pinned out intentionally. Keeping these nodes
internal means their capacitance is considerably lower than it
would be in discrete designs. Lower capacitance at these nodes
means better loop stability and improved common-mode
rejection vs. frequency.
V
= 2 (V
− V
)
OUT
IN+
IN−
Figure 35. Difference Amplifier, G = 2
12kΩ
6kΩ
2
12
13
IN1
OUT1
The internal resistors of the AD8273 lower production cost.
One part rather than several is placed on the board, which
improves both board build time and reliability.
6kΩ
14
3
12kΩ
CONFIGURATIONS
12kΩ
6kΩ
6
10
9
IN2
The AD8273 can be configured in several different ways; see
Figure 34 to Figure 41. Because these configurations rely on the
internal, matched resistors, these configurations have excellent
gain accuracy and gain drift.
OUT2
6kΩ
8
5
12kΩ
POWER SUPPLIES
V
= −½ V
IN
OUT
A stable dc voltage should be used to power the AD8273. Noise
on the supply pins can adversely affect performance. A bypass
capacitor of 0.1 μF should be placed between each supply pin
and ground, as close to each pin as possible. A tantalum
capacitor of 10 μF should also be used between each supply and
ground. It can be farther away from the AD8273 and typically
can be shared by other precision integrated circuits.
Figure 36. Inverting Amplifier, G = ½
6kΩ
12kΩ
12
2
IN1
OUT1
13
12kΩ
6kΩ
3
14
The AD8273 is specified at 15 V, but it can be used with
unbalanced supplies as well, for example, −VS = 0 V, +VS = 20 V.
The difference between the two supplies must be kept below 36 V.
6kΩ
12kΩ
10
6
9
IN2
OUT2
12kΩ
6kΩ
5
8
12kΩ
6kΩ
2
12
13
–IN1
OUT1
V
= −2 V
IN
OUT
12kΩ
12kΩ
6kΩ
6kΩ
3
6
14
Figure 37. Inverting Amplifier, G = 2
+IN1
–IN2
10
9
OUT2
12kΩ
6kΩ
5
8
+IN2
V
= ½ (V
IN+
− V )
IN−
OUT
Figure 34. Difference Amplifier, G = ½
Rev. 0 | Page 11 of 16
AD8273
12kΩ
6kΩ
12kΩ
6kΩ
2
12
13
2
12
13
OUT1
OUT1
6kΩ
14
3
IN1
12kΩ
12kΩ
6kΩ
6kΩ
3
6
12kΩ
14
IN1
12kΩ
6kΩ
10
9
6
10
9
OUT2
OUT2
6kΩ
8
5
IN2
V
12kΩ
6kΩ
12kΩ
5
8
IN2
V
= 1½ V
= ½ V
OUT
IN
OUT
IN
Figure 40. Noninverting Amplifier, G = 1.5
Figure 38. Noninverting Amplifier, G = ½
6kΩ
12kΩ
6kΩ
12kΩ
12
2
12
2
OUT1
OUT1
13
13
3
12kΩ
6kΩ
IN1
6kΩ
6kΩ
12kΩ
12kΩ
3
14
10
14
IN1
6kΩ
12kΩ
10
6
9
6
9
OUT2
OUT2
12kΩ
6kΩ
5
8
IN2
V
6kΩ
12kΩ
8
5
IN2
= 3 V
V
= 2 V
IN
OUT
IN
OUT
Figure 39. Noninverting Amplifier, G = 2
Figure 41. Noninverting Amplifier, G = 3
Rev. 0 | Page 12 of 16
AD8273
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
45°
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 42. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD8273ARZ1
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
14-Lead SOIC_N
14-Lead SOIC_N, 7" Tape and Reel
14-Lead SOIC_N, 13" Tape and Reel
R-14
R-14
R-14
AD8273ARZ-R71
AD8273ARZ-RL1
1 Z = RoHS Compliant Part.
Rev. 0 | Page 13 of 16
AD8273
NOTES
Rev. 0 | Page 14 of 16
AD8273
NOTES
Rev. 0 | Page 15 of 16
AD8273
NOTES
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