AD8278 [ADI]
Low Power, Wide Supply Range, Low Cost Difference Amplifier, G = ½, 2; 低功耗，宽电源电压范围，低成本差动放大器，G = ½ ， 2
| 型号： | AD8278 |
| 厂家： | 
ADI |
| 描述： | Low Power, Wide Supply Range, Low Cost Difference Amplifier, G = ½, 2 |
| 文件： | 总24页 (文件大小：601K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power, Wide Supply Range,
Low Cost Difference Amplifier, G = ½, 2
AD8278
FUNCTIONAL BLOCK DIAGRAM
FEATURES
+VS
Wide input range beyond supplies
Rugged input overvoltage protection
Low supply current: 200 μA maximum
Low power dissipation: 0.5 mW at VS = 2.5 V
Bandwidth: 1 MHz (G = ½)
CMRR: 80 dB minimum, dc to 20 kHz (G = ½)
Low offset voltage drift: 2 μV/°C maximum (B Grade)
Low gain drift: 1 ppm/°C maximum (B Grade)
Enhanced slew rate: 1.4 V/μs
7
AD8278
20kΩ
40kΩ
40kΩ
2
5
6
–IN
+IN
SENSE
OUT
20kΩ
3
1
REF
4
Wide power supply range:
–VS
Single supply: 2 V to 36 V
Dual supplies: 2 V to 18 V
Figure 1.
8-lead SOIC and MSOP packages
Table 1. Difference Amplifiers by Category
Low
Distortion
High
Voltage
Current
APPLICATIONS
Sensing1
Low Power
AD8276
AD8277
Voltage measurement and monitoring
Current measurement and monitoring
Instrumentation amplifier building block
Portable, battery-powered equipment
Test and measurement
AD8270
AD8271
AD8273
AD8274
AMP03
AD628
AD629
AD8202 (U)
AD8203 (U)
AD8205 (B)
AD8206 (B)
AD8216 (B)
1 U = unidirectional, B = bidirectional.
GENERAL DESCRIPTION
The AD8278 is a general-purpose difference amplifier intended
for precision signal conditioning in power critical applications
that require both high performance and low power. The AD8278
provides exceptional common-mode rejection ratio (80 dB) and
high bandwidth while amplifying signals well beyond the supply
rails. The on-chip resistors are laser-trimmed for excellent gain
accuracy and high CMRR. They also have extremely low gain
drift vs. temperature.
The AD8278 can be used as a difference amplifier with G = ½
or G = 2. It can also be connected in a high precision, single-
ended configuration for non-inverting and inverting gains of
−½, −2, +3, +2, +1½, +1, or +½. The AD8278 provides an
integrated precision solution that has a smaller size, lower cost,
and better performance than a discrete alternative.
The AD8278 operates on single supplies (2.0 V to 36 V) or dual
supplies ( 2 V to 18 V). The maximum quiescent supply current
is 200 μA, which makes it ideal for battery-operated and portable
systems.
The common-mode range of the amplifier extends to almost
triple the supply voltage (for G = ½), making it ideal for single-
supply applications that require a high common-mode voltage
range. The internal resistors and ESD circuitry at the inputs also
provide overvoltage protection to the op amp.
The AD8278 is available in the space-saving 8-lead MSOP
and SOIC packages. It is specified for performance over the
industrial temperature range of −40°C to +85°C and is fully
RoHS compliant.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2009 Analog Devices, Inc. All rights reserved.
AD8278
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................9
Theory of Operation ...................................................................... 16
Circuit Information.................................................................... 16
Driving the AD8278................................................................... 16
Input Voltage Range................................................................... 16
Power Supplies............................................................................ 17
Applications Information.............................................................. 18
Configurations............................................................................ 18
Instrumentation Amplifier........................................................ 19
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 21
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Maximum Power Dissipation ..................................................... 7
Short-Circuit Current .................................................................. 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
REVISION HISTORY
7/09—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
AD8278
SPECIFICATIONS
VS = ±± V ꢀo ±ꢁ± V, VREF = 0 V, TA = 2±°C, RL = ꢁ0 kΩ connecꢀed ꢀo ground, G = ½ difference amplifier configuraꢀion, unless
oꢀherwise noꢀed.
Table 2.
G = ½
Grade B
Typ
Grade A
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
System Offset1
50
100
100
50
2
250
250
μV
μV
vs. Temperature
Average Temperature
Coefficient
TA = −40°C to +85°C
TA = −40°C to +85°C
VS = 5 V to 18 V
0.3
1
2.5
5
5
μV/°C
μV/V
vs. Power Supply
Common-Mode Rejection VS = 15 V, VCM
= 27 V,
Ratio (RTI)
Input Voltage Range2
Impedance3
RS = 0 Ω
80
74
dB
V
−3(VS + 0.1)
+3(VS − 1.5) −3(VS + 0.1)
+3(VS − 1.5)
Differential
120
30
120
30
kΩ
kΩ
Common Mode
DYNAMIC PERFORMANCE
Bandwidth
1
1.4
1
1.4
MHz
V/μs
Slew Rate
1.1
1.1
Settling Time to 0.01%
10 V step on output,
CL = 100 pF
9
10
9
10
μs
μs
Settling Time to 0.001%
GAIN
Gain Error
Gain Drift
Gain Nonlinearity
OUTPUT CHARACTERISTICS
Output Voltage Swing4
0.005 0.02
0.01
0.05
5
10
%
TA = −40°C to +85°C
VOUT = 20 V p-p
1
5
ppm/°C
ppm
VS = 15 V, RL = 10 kΩ
TA = −40°C to +85°C
−VS + 0.2
+VS − 0.2
−VS + 0.2
+VS − 0.2
V
Short-Circuit Current Limit
Capacitive Load Drive
NOISE5
15
200
15
200
mA
pF
Output Voltage Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
1.4
47
1.4
47
ꢀV p-p
nV/√Hz
50
50
POWER SUPPLY
Supply Current6
vs. Temperature
Operating Voltage Range7
TEMPERATURE RANGE
Operating Range
200
250
18
200
250
18
ꢀA
ꢀA
V
TA = −40°C to +85°C
2
2
−40
+125
−40
+125
°C
1 Includes input bias and offset current errors, RTO (referred to output)
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of
Operation for details.
3 Internal resistors are trimmed to be ratio matched and have 20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figure 20 through Figure 23 for details.
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure 24 and Figure 26 for details.
7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference
voltage.
Rev. 0 | Page 3 of 24
AD8278
VS = 5 V to 15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = 2 difference amplifier configuration, unless
otherwise noted.
Table 3.
G = 2
Grade B
Typ
Grade A
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
System Offset1
100
0.6
200
200
100
2
500
500
μV
μV
vs. Temperature
Average Temperature
Coefficient
TA = −40°C to +85°C
TA = −40°C to +85°C
VS = 5 V to 18 V
2
5
5
10
μV/°C
μV/V
vs. Power Supply
Common-Mode
Rejection Ratio (RTI)
Input Voltage Range2
Impedance3
VS = 15 V, VCM
RS = 0 Ω
= 27 V,
86
80
dB
V
−1.5(VS + 0.1)
+1.5(VS − 1.5) −1.5(VS + 0.1)
+1.5(VS − 1.5)
Differential
120
30
120
30
kΩ
kΩ
Common Mode
DYNAMIC PERFORMANCE
Bandwidth
550
1.4
550
1.4
kHz
V/μs
Slew Rate
1.1
1.1
Settling Time to 0.01%
10 V step on output,
CL = 100 pF
10
11
10
11
μs
μs
Settling Time to 0.001%
GAIN
Gain Error
Gain Drift
0.005 0.02
1
0.01
0.05
5
%
ppm/°
C
TA = −40°C to +85°C
VOUT = 20 V p-p
Gain Nonlinearity
5
10
ppm
OUTPUT CHARACTERISTICS
Output Voltage Swing4
VS = 15 V, RL = 10 kΩ
TA = −40°C to +85°C
−VS + 0.2
+VS − 0.2
−VS + 0.2
+VS − 0.2
V
Short-Circuit Current
Limit
Capacitive Load Drive
NOISE5
15
350
15
350
mA
pF
Output Voltage Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
2.8
90
2.8
90
ꢀV p-p
nV/√Hz
95
95
POWER SUPPLY
Supply Current6
vs. Temperature
Operating Voltage
Range7
200
250
18
200
250
18
ꢀA
ꢀA
V
TA = −40°C to +85°C
2
2
TEMPERATURE RANGE
Operating Range
−40
+125
−40
+125
°C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of
Operation for details.
3 Internal resistors are trimmed to be ratio matched and have 20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figure 20 through Figure 23 for details.
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure 24 and Figure 26 for details.
7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference
voltage.
Rev. 0 | Page 4 of 24
AD8278
VS = +2.7 V to < 5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = ½ difference amplifier configuration, unless
otherwise noted.
Table 4.
G = ½
Grade B
Typ
Grade A
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
System Offset1
75
150
150
75
2
250
250
μV
μV
vs. Temperature
Average Temperature
Coefficient
TA = −40°C to +85°C
TA = −40°C to +85°C
VS = 5 V to 18 V
0.3
1
2.5
5
5
μV/°C
μV/V
vs. Power Supply
Common-Mode Rejection VS = 2.7 V, VCM = 0 V
Ratio (RTI)
to 2.4 V, RS = 0 Ω
80
74
74
dB
VS = 5 V, VCM = −10 V
to +7 V, RS = 0 Ω
80
dB
V
Input Voltage Range2
Impedance3
−3(VS + 0.1)
+3(VS − 1.5) −3(VS + 0.1)
+3(VS − 1.5)
Differential
120
30
120
30
kΩ
kΩ
Common Mode
DYNAMIC PERFORMANCE
Bandwidth
870
1.3
870
1.3
kHz
V/μs
Slew Rate
Settling Time to 0.01%
2 V step on output,
CL = 100 pF, VS = 2.7 V
7
7
μs
GAIN
Gain Error
Gain Drift
0.005 0.02
1
0.01
0.05
5
%
ppm/°C
TA = −40°C to +85°C
OUTPUT CHARACTERISTICS
Output Swing4
RL = 10 kΩ ,
TA = −40°C to +85°C
−VS + 0.1
+VS − 0.15
−VS + 0.1
+VS − 0.15
V
Short-Circuit Current Limit
Capacitive Load Drive
NOISE5
10
200
10
200
mA
pF
Output Voltage Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
1.4
47
1.4
47
ꢀV p-p
nV/√Hz
50
50
POWER SUPPLY
Supply Current6
TA = −40°C to +85°C
200
36
200
36
ꢀA
V
Operating Voltage Range
TEMPERATURE RANGE
Operating Range
2.0
2.0
−40
+125
−40
+125
°C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation
section for details.
3 Internal resistors are trimmed to be ratio matched and have 20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figure 20 through Figure 23 for details.
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure 25 and Figure 26 for details.
Rev. 0 | Page 5 of 24
AD8278
VS = +2.7 V to < 5 V, VREF = midsupply, TA = 25°C, RL = 10 kΩ connected to midsupply, G = 2 difference amplifier configuration, unless
otherwise noted.
Table 5.
G = 2
Grade B
Typ
Grade A
Typ Max
Parameter
Conditions
Min
Max
Min
Unit
INPUT CHARACTERISTICS
System Offset1
150
0.6
300
300
150 500
500
μV
μV
vs. Temperature
Average Temperature
Coefficient
TA = −40°C to +85°C
TA = −40°C to +85°C
VS = 5 V to 18 V
2
5
3
5
μV/°C
μV/V
vs. Power Supply
10
Common-Mode Rejection VS = 2.7 V, VCM = 0 V
Ratio (RTI)
to 2.4 V, RS = 0 Ω
86
80
80
dB
VS = 5 V, VCM = −10 V
to +7 V, RS = 0 Ω
86
dB
V
Input Voltage Range2
Impedance3
−1.5(VS + 0.1)
+1.5(VS − 1.5) −1.5(VS + 0.1)
+1.5(VS − 1.5)
Differential
120
30
120
30
kΩ
kΩ
Common Mode
DYNAMIC PERFORMANCE
Bandwidth
450
1.3
450
1.3
kHz
V/μs
Slew Rate
Settling Time to 0.01%
2 V step on output,
CL = 100 pF, VS = 2.7 V
9
9
μs
GAIN
Gain Error
Gain Drift
0.005
0.02
1
0.01 0.05
5
%
TA = −40°C to +85°C
ppm/°C
OUTPUT CHARACTERISTICS
Output Swing4
RL = 10 kΩ,
TA = −40°C to +85°C
−VS + 0.1
+VS − 0.15
−VS + 0.1
+VS − 0.15
V
Short-Circuit Current Limit
Capacitive Load Drive
NOISE5
10
200
10
200
mA
pF
Output Voltage Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
2.8
94
2.8
94
ꢀV p-p
nV/√Hz
100
100
POWER SUPPLY
Supply Current6
TA = −40°C to +85°C
200
36
220
36
ꢀA
V
Operating Voltage Range
TEMPERATURE RANGE
Operating Range
2.0
2.0
−40
+125
−40
+125
°C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section in the Theory of Operation
section for details.
3 Internal resistors are trimmed to be ratio matched and have 20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figure 20 through Figure 23 for details.
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure 25 and Figure 26 for details.
Rev. 0 | Page 6 of 24
AD8278
ABSOLUTE MAXIMUM RATINGS
Table 6.
2.0
1.6
1.2
0.8
0.4
0
T
MAX = 150°C
J
Parameter
Rating
Supply Voltage
18 V
Maximum Voltage at Any Input Pin
Minimum Voltage at Any Input Pin
Storage Temperature Range
Specified Temperature Range
Package Glass Transition Temperature (TG)
−VS + 40 V
+VS − 40 V
−65°C to +150°C
−40°C to +85°C
150°C
SOIC
θ
= 121°C/W
JA
MSOP
= 135°C/W
θ
JA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
–50
–25
0
25
50
75
100
125
AMBIENT TEMERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
SHORT-CIRCUIT CURRENT
THERMAL RESISTANCE
The AD8278 has built-in, short-circuit protection that limits the
output current (see Figure 27 for more information). While the
short-circuit condition itself does not damage the part, the heat
generated by the condition can cause the part to exceed its
maximum junction temperature, with corresponding negative
effects on reliability. Figure 2 and Figure 27, combined with
knowledge of the supply voltages and ambient temperature of the
part can be used to determine whether a short circuit will cause
the part to exceed its maximum junction temperature.
The θJA values in Table 7 assume a 4-layer JEDEC standard
board with zero airflow.
Table 7. Thermal Resistance
Package Type
8-Lead MSOP
8-Lead SOIC
θJA
Unit
°C/W
°C/W
135
121
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8278 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period may result in a loss of functionality.
ESD CAUTION
Rev. 0 | Page 7 of 24
AD8278
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
REF
–IN
1
2
3
4
8
7
6
5
NC
REF
–IN
1
2
3
4
8
7
6
5
NC
AD8278
TOP VIEW
(Not to Scale)
AD8278
+VS
+VS
TOP VIEW
+IN
OUT
SENSE
+IN
–VS
OUT
SENSE
(Not to Scale)
–VS
NC = NO CONNECT
NC = NO CONNECT
Figure 3. MSOP Pin Configuration
Figure 4. SOIC Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Mnemonic Description
1
2
3
4
5
6
7
8
REF
−IN
+IN
−VS
SENSE
OUT
+VS
NC
Reference Voltage Input.
Inverting Input.
Noninverting Input.
Negative Supply.
Sense Terminal.
Output.
Positive Supply.
No Connect.
Rev. 0 | Page 8 of 24
AD8278
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 15 V, TA = 25°C, RL = 10 kꢀ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted.
600
500
400
300
200
100
0
80
N = 3840
MEAN = –16.8
SD = 41.7673
60
40
20
0
–20
–40
–60
–80
–100
REPRESENTATIVE DATA
–150
–100
–50
0
50
100
150
–50
–35
–20
–5
10
25
40
55
70
85
SYSTEM OFFSET VOLTAGE (µV)
TEMPERATURE (°C)
Figure 5. Distribution of Typical System Offset Voltage, G = 2
Figure 8. System Offset vs. Temperature, Normalized at 25°, G = ½
800
20
15
N = 3837
MEAN = 7.78
SD = 13.569
700
600
500
400
300
200
100
0
10
5
0
–5
–10
–15
–20
–25
REPRESENTATIVE DATA
–30
–60
–40
–20
0
20
40
60
–50
–35
–20
–5
10
25
40
55
70
85
CMRR (µV/V)
TEMPERATURE (°C)
Figure 6. Distribution of Typical Common-Mode Rejection, G = 2
Figure 9. Gain Error vs. Temperature, Normalized at 25°C, G = ½
10
30
V
= ±15V
5
0
20
10
S
–5
0
V
= ±5V
S
–10
–15
–10
–20
–30
REPRESENTATIVE DATA
–20
–50
–35
–20
–5
10
25
40
55
70
85
–20
–15
–10
–5
0
5
10
15
20
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
Figure 7. CMRR vs. Temperature, Normalized at 25°C, G = ½
Figure 10. Input Common-Mode Voltage vs. Output Voltage,
15 V and 5 V Supplies, G = ½
Rev. 0 | Page 9 of 24
AD8278
10
8
5
4
V = MIDSUPPLY
REF
V
= MIDSUPPLY
V
= 5V
REF
S
V
= 5V
S
6
3
4
2
2
0
1
V
= 2.7V
S
–2
–4
–6
–8
V
= 2.7V
0
S
–1
–2
–3
–10
–0.5
0.5
1.5
2.5
3.5
4.5
5.5
–0.5
0.5
1.5
2.5
3.5
4.5
5.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 11. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = Midsupply, G = ½
Figure 14. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = Midsupply, G = 2
12
6
V
= 0V
V
= 0V
REF
REF
10
8
V
= 5V
S
5
4
V
= 5V
S
6
3
4
2
2
1
V
= 2.7V
S
0
V
= 2.7V
S
0
–2
–4
–6
–1
–2
–0.5
0.5
1.5
2.5
3.5
4.5
5.5
–0.5
0.5
1.5
2.5
3.5
4.5
5.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 12. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = 0 V, G = ½
Figure 15. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = 0 V, G = 2
30
18
V
= ±15V
12
S
20
10
GAIN = 2
6
0
GAIN = ½
–6
0
V
= ±5V
S
–12
–10
–20
–30
–18
–24
–30
–36
–20
–15
–10
–5
0
5
10
15
20
100
1k
10k
100k
1M
10M
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 13. Input Common-Mode Voltage vs. Output Voltage,
15 V and 5 V Supplies, G = 2
Figure 16. Gain vs. Frequency, 15 V Supplies
Rev. 0 | Page 10 of 24
AD8278
18
12
+V
S
–0.1
–0.2
–0.3
–0.4
GAIN = 2
GAIN = ½
6
0
–6
T
T
T
T
= –40°C
A
A
A
A
= +25°C
= +85°C
= +125°C
–12
–18
–24
–30
–36
+0.4
+0.3
+0.2
+0.1
–V
S
100
1k
10k
100k
1M
10M
2
4
6
8
10
12
14
16
18
FREQUENCY (Hz)
SUPPLY VOLTAGE (±V )
S
Figure 17. Gain vs. Frequency, +2.7 V Single Supply
Figure 20. Output Voltage Swing vs. Supply Voltage and Temperature,
RL = 10 kΩ
120
100
80
60
40
20
0
+V
S
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
GAIN = 2
GAIN = ½
T
T
T
T
= –40°C
= +25°C
= +85°C
= +125°C
A
A
A
A
+1.2
+1.0
+0.8
+0.6
+0.4
+0.2
–V
S
1
10
100
1k
10k
100k
1M
2
4
6
8
10
12
14
16
18
FREQUENCY (Hz)
SUPPLY VOLTAGE (±V )
S
Figure 21. Output Voltage Swing vs. Supply Voltage and Temperature,
RL = 2 kΩ
Figure 18. CMRR vs. Frequency
+V
S
120
100
80
60
40
20
0
–4
–8
–PSRR
T
T
T
T
= –40°C
= +25°C
= +85°C
= +125°C
A
A
A
A
+PSRR
+8
+4
–V
S
1k
10k
100k
1
10
100
1k
10k
100k
1M
LOAD RESISTANCE (Ω)
FREQUENCY (Hz)
Figure 19. PSRR vs. Frequency
Figure 22. Output Voltage Swing vs. RL and Temperature, VS = 15 V
Rev. 0 | Page 11 of 24
AD8278
+V
250
200
150
100
50
S
V
= MIDSUPPLY
REF
–0.5
–1.0
–1.5
–2.0
T
T
T
T
= –40°C
= +25°C
= +85°C
= +125°C
A
A
A
A
V
= ±15V
S
+2.0
+1.5
+1.0
+0.5
V
= +2.7V
S
–V
0
–50
S
0
1
2
3
4
5
6
7
8
9
10
–30
–10
10
30
50
70
90
110
130
130
130
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 23. Output Voltage Swing vs. IOUT and Temperature, VS = 15 V
Figure 26. Supply Current vs. Temperature
180
30
25
20
15
10
5
170
160
150
140
130
120
I
SHORT+
0
–5
–10
–15
–20
I
SHORT–
50
0
2
4
6
8
10
12
14
16
18
–50
–30
–10
10
30
70
90
110
SUPPLY VOLTAGE (±V)
TEMPERATURE (°C)
Figure 24. Supply Current vs. Dual-Supply Voltage, VIN = 0 V
Figure 27. Short-Circuit Current vs. Temperature
180
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–SLEW RATE
170
160
150
140
130
120
+SLEW RATE
0
5
10
15
20
25
30
35
40
–50
–30
–10
10
30
50
70
90
110
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Figure 25. Supply Current vs. Single-Supply Voltage, VIN = 0 V, VREF = 0 V
Figure 28. Slew Rate vs. Temperature, VIN = 20 V p-p, 1 kHz
Rev. 0 | Page 12 of 24
AD8278
8
6
4
1V/DIV
2
3.64µs TO 0.01%
4.12µs TO 0.001%
0
–2
–4
–6
–8
0.002%/DIV
4µs/DIV
TIME (µs)
–5
–4
–3
–2
–1
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
Figure 29. Gain Nonlinearity, VS = 15 V, RL ≥ 2 kΩ, G = ½
Figure 32. Large-Signal Pulse Response and Settling Time, 2 V Step,
VS = 2.7 V, G = ½
8
6
4
2
0
5V/DIV
7.6µs TO 0.01%
9.68µs TO 0.001%
–2
0.002%/DIV
–4
–6
–8
40µs/DIV
TIME (µs)
–10
–8
–6
–4
–2
0
2
4
6
8
10
OUTPUT VOLTAGE (V)
Figure 33. Large-Signal Pulse Response and Settling Time, 10 V Step,
VS = 15 V, G = 2
Figure 30. Gain Nonlinearity, VS = 15 V, RL ≥ 2 kΩ, G = 2
5V/DIV
1V/DIV
6.24µs TO 0.01%
7.92µs TO 0.001%
4.34µs TO 0.01%
5.12µs TO 0.001%
0.002%/DIV
0.002%/DIV
40µs/DIV
4µs/DIV
TIME (µs)
TIME (µs)
Figure 31. Large-Signal Pulse Response and Settling Time, 10 V Step,
VS = 15 V, G = ½
Figure 34. Large-Signal Pulse Response and Settling Time, 2 V Step,
VS = 2.7 V
Rev. 0 | Page 13 of 24
AD8278
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
= ±5V
S
= ±2.5V
S
10µs/DIV
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 35. Large-Signal Step Response, G = ½
Figure 38. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V
NO LOAD
R
= 200pF
L
R
= 147pF
L
R
= 247pF
L
10µs/DIV
40µs/DIV
Figure 36. Large-Signal Step Response, G = 2
Figure 39. Small-Signal Step Response for Various Capacitive Loads, G = ½
30
V
= ±15V
S
25
20
15
10
5
V
= ±5V
S
R
= 100pF
L
R
= 200pF
L
R
= 247pF
L
R
= 347pF
L
0
100
40µs/DIV
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 37. Maximum Output Voltage vs. Frequency, VS = 15 V, 5 V
Figure 40. Small-Signal Step Response for Various Capacitive Loads, G = 2
Rev. 0 | Page 14 of 24
AD8278
50
45
40
35
30
25
20
15
10
5
1k
100
10
±2V
±5V
GAIN = 2
GAIN = ½
±15V
±18V
0
0
50
100
150
200
250
0.1
1
10
100
1k
10k
100k
CAPACITIVE LOAD (pF)
FREQUENCY (Hz)
Figure 41. Small-Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½
Figure 43. Voltage Noise Density vs. Frequency
35
GAIN = 2
30
25
±2V
20
15
±5V
GAIN = ½
±15V
10
±18V
5
0
1s/DIV
0
50
100
150
200
250
300
350
CAPACITIVE LOAD (pF)
Figure 42. Small-Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = 2
Figure 44. 0.1 Hz to 10 Hz Voltage Noise
Rev. 0 | Page 15 of 24
AD8278
THEORY OF OPERATION
AC Performance
CIRCUIT INFORMATION
Component sizes and trace lengths are much smaller in an IC
than on a PCB, so the corresponding parasitic elements are also
smaller. This results in better ac performance of the AD8278.
For example, the positive and negative input terminals of the
AD8278 op amp are intentionally not pinned out. By not
connecting these nodes to the traces on the PCB, their capacitance
remains low and balanced, resulting in improved loop stability
and excellent common-mode rejection over frequency.
The AD8278 consists of a low power, low noise op amp and
four laser-trimmed on-chip resistors. These resistors can be
externally connected to make a variety of amplifier confi-
gurations, including difference, noninverting, and inverting
configurations. Taking advantage of the integrated resistors
of the AD8278 provides the designer with several benefits
over a discrete design, including smaller size, lower cost, and
better ac and dc performance.
+VS
DRIVING THE AD8278
7
AD8278
20kΩ
Care should be taken to drive the AD8278 with a low impedance
source: for example, another amplifier. Source resistance of even
a few kilohms (kꢀ) can unbalance the resistor ratios and,
therefore, significantly degrade the gain accuracy and common-
mode rejection of the AD8278. Because all configurations present
several kilohms (kꢀ) of input resistance, the AD8278 does not
require a high current drive from the source and so is easy to
drive.
40kΩ
2
5
6
–IN
+IN
SENSE
OUT
40kΩ
20kΩ
3
1
REF
4
–VS
INPUT VOLTAGE RANGE
Figure 45. Functional Block Diagram
The AD8278 is able to measure input voltages beyond the supply
rails. The internal resistors divide down the voltage before it
reaches the internal op amp, and provide protection to the op
amp inputs. Figure 46 shows an example of how the voltage
division works in a difference amplifier configuration. For the
AD8278 to measure correctly, the input voltages at the input
nodes of the internal op amp must stay below 1.5 V of the
positive supply rail and can exceed the negative supply rail by
0.1 V. Refer to the Power Supplies section for more details.
R2
DC Performance
Much of the dc performance of op amp circuits depends on the
accuracy of the surrounding resistors. Using superposition to
analyze a typical difference amplifier circuit, as is shown in
Figure 46, the output voltage is found to be
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
R2
R1 + R2
R4
R3
R4
R3
⎛
⎜
⎝
⎞
⎟
⎠
⎛
⎜
⎝
⎞
⎟
⎠
VOUT = VIN +
1 +
− V
IN −
(V
)
IN+
This equation demonstrates that the gain accuracy and common-
mode rejection ratio of the AD8278 is determined primarily by
the matching of resistor ratios. Even a 0.1% mismatch in one
resistor degrades the CMRR to 69 dB for a G = 2 difference
amplifier.
R1 + R2
R4
R3
R1
V
V
IN–
IN+
R2
The difference amplifier output voltage equation can be reduced to
R2
R1 + R2
(V
)
IN+
R4
VOUT
=
(
VIN + − VIN −
)
Figure 46. Voltage Division in the Difference Amplifier Configuration
R3
The AD8278 has integrated ESD diodes at the inputs that provide
overvoltage protection. This feature simplifies system design by
eliminating the need for additional external protection circuitry,
and enables a more robust system.
as long as the following ratio of the resistors is tightly matched:
R2 R4
=
R1 R3
The resistors on the AD8278 are laser trimmed to match accurately.
As a result, the AD8278 provides superior performance over a
discrete solution, enabling better CMRR, gain accuracy, and
gain drift, even over a wide temperature range.
The voltages at any of the inputs of the parts can safely range
from +VS − 40 V up to −VS + 40 V. For example, on 10 V
supplies, input voltages can go as high as 30 V. Care should be
taken to not exceed the +VS − 40 V to −VS + 40 V input limits
to avoid risking damage to the parts.
Rev. 0 | Page 16 of 24
AD8278
The AD8278 is typically specified at single- and dual-supplies,
but it can be used with unbalanced supplies as well; for example,
−VS = −5 V, +VS = 20 V. The difference between the two supplies
must be kept below 36 V. The positive supply rail must be at
least 2 V above the negative supply and reference voltage.
R1
POWER SUPPLIES
The AD8278 operates extremely well over a very wide range of
supply voltages. It can operate on a single supply as low as 2 V
and as high as 36 V, under appropriate setup conditions.
For best performance, the user must exercise care that the setup
conditions ensure that the internal op amp is biased correctly.
The internal input terminals of the op amp must have sufficient
voltage headroom to operate properly. Proper operation of the
part requires at least 1.5 V between the positive supply rail and
the op amp input terminals. This relationship is expressed in
the following equation:
(V
)
REF
R1 + R2
R4
R3
R1
R2
V
REF
R1
R1 + R2
(V
)
REF
R1
R1 + R2
VREF < +VS −1.5 V
Figure 47. Ensure Sufficient Voltage Headroom on the Internal Op Amp
Inputs
For example, when operating on a +VS= 2 V single supply and
Use a stable dc voltage to power the AD8278. Noise on the
supply pins can adversely affect performance. Place a bypass
capacitor of 0.1 ꢁF between each supply pin and ground, as
close as possible to each supply pin. Use a tantalum capacitor
of 10 ꢁF between each supply and ground. It can be farther
away from the supply pins and, typically, it can be shared by
other precision integrated circuits.
VREF = 0 V, it can be seen from Figure 47 that the op amps input
terminals are biased at 0 V, allowing more than the required 1.5 V
headroom. However, if VREF = 1 V under the same conditions, the
input terminals of the op amp are biased at 0.66 V (G = ½). Now
the op amp does not have the required 1.5 V headroom and can
not function. Therefore, the user needs to increase the supply
voltage or decrease VREF to restore proper operation.
Rev. 0 | Page 17 of 24
AD8278
APPLICATIONS INFORMATION
CONFIGURATIONS
20kΩ
20kΩ
40kΩ
40kΩ
5
1
2
6
–IN
+IN
The AD8278 can be configured in several ways, as a difference
amplifier or a single-ended amplifier (see Figure 48 to Figure 54).
All of these configurations have excellent gain accuracy and
gain drift because they rely on the internal matched resistors.
Note that Figure 50 shows the AD8278 as a difference amplifier
with a midsupply reference voltage at the noninverting input.
This allows the AD8278 to be used as a level shifter, which is
appropriate in single-supply applications that are referenced
to midsupply. Table 9 lists several single-ended amplifier
configurations that are not illustrated.
OUT
3
V
= MIDSUPPLY
REF
V
= 2(V
IN+
− V ) + V
IN− REF
OUT
Figure 51. Difference Amplifier, Gain = 2, Referenced to Midsupply
40kΩ
20kΩ
2
5
6
IN
OUT
20kΩ
40kΩ
1
40kΩ
20kΩ
2
5
3
–IN
OUT
6
V
= –½V
IN
OUT
Figure 52. Inverting Amplifier, Gain = −½
40kΩ
20kΩ
3
1
+IN
40kΩ
20kΩ
2
5
6
V
= ½(V
IN+
− V )
IN−
OUT
OUT
Figure 48. Difference Amplifier, Gain = ½
20kΩ
40kΩ
1
3
IN
20kΩ
20kΩ
40kΩ
5
1
2
6
–IN
OUT
V
= 1.5V
IN
OUT
Figure 53. Noninverting Amplifier, Gain = 1.5
40kΩ
3
+IN
20kΩ
40kΩ
5
2
6
OUT
V
= 2(V
IN+
− V )
IN−
OUT
Figure 49. Difference Amplifier, Gain = 2
20kΩ
40kΩ
3
1
IN
40kΩ
40kΩ
20kΩ
2
3
5
6
–IN
+IN
OUT
V
= 2V
OUT
IN
Figure 54. Noninverting Amplifier, Gain = 2
20kΩ
1
V
= MIDSUPPLY
REF
V
= ½(V
IN+
− V ) + V
IN− REF
OUT
Figure 50. Difference Amplifier, Gain = ½, Referenced to Midsupply
Table 9. Difference and Single-Ended Amplifier Configurations
Amplifier Configuration
Signal Gain
Pin 1 (REF)
GND
IN+
GND
GND
IN
IN
GND
IN
Pin 2 (VIN−)
Pin 3 (VIN+)
IN+
GND
GND
GND
IN
IN
IN
GND
IN
GND
Pin 5 (SENSE)
Difference Amplifier
Difference Amplifier
+½
+2
−½
−2
+3⁄2
+3
+½
+1
IN−
OUT
IN
OUT
GND
OUT
GND
GND
OUT
OUT
OUT
IN−
OUT
IN
OUT
GND
OUT
OUT
GND
GND
Single-Ended Inverting Amplifier
Single-Ended Inverting Amplifier
Single-Ended Non Inverting Amplifier
Single-Ended Non Inverting Amplifier
Single-Ended Non Inverting Amplifier
Single-Ended Non Inverting Amplifier
Single-Ended Non Inverting Amplifier
Single-Ended Non Inverting Amplifier
+1
+2
GND
IN
Rev. 0 | Page 18 of 24
AD8278
–IN
As with the other inputs, the reference must be driven with a
low impedance source to maintain the internal resistor ratio. An
example using the low power, low noise OP1177 as a reference
is shown in Figure 55.
A1
40kΩ
R
R
F
20kΩ
20kΩ
R
G
V
OUT
INCORRECT
CORRECT
40kΩ
AD8278
F
REF
= (1 + 2R /R ) (V – V ) × 2
IN+ IN–
A2
+IN
V
OUT
F
G
AD8278
AD8278
Figure 56. Low Power Precision Instrumentation Amplifier
REF
REF
V
V
Table 10. Low Power Op Amps
Op Amp (A1, A2) Features
+
OP1177
–
AD8506
AD8607
AD8617
AD8667
Dual micropower op amp
Precision dual micropower op amp
Low cost CMOS micropower op amp
Dual precision CMOS micropower op amp
Figure 55. Driving the Reference Pin
INSTRUMENTATION AMPLIFIER
It is preferable to use dual op amps for the high impedance inputs,
because they have better matched performance and track each
other over temperature. The AD8278 difference amplifier can-
cels out common-mode errors from the input op amps, if they
track each other. The differential gain accuracy of the in-amp
is proportional to how well the input feedback resistors (RF)
match each other. The CMRR of the in-amp increases as the
differential gain is increased (1 + 2RF/RG), but a higher gain
also reduces the common-mode voltage range. Note that dual
supplies must be used for proper operation of this configuration.
The AD8278 can be used as a building block for a low power,
low cost instrumentation amplifier. An instrumentation amplifier
provides high impedance inputs and delivers high common-
mode rejection. Combining the AD8278 with an Analog Devices,
Inc., low power amplifier (see Table 10) creates a precise, power
efficient voltage measurement solution suitable for power
critical systems.
Refer to A Designer’s Guide to Instrumentation Amplifiers for
more design ideas and considerations.
Rev. 0 | Page 19 of 24
AD8278
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 57. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 58. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. 0 | Page 20 of 24
AD8278
ORDERING GUIDE
Model
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
Branding
AD8278ARZ1
8-Lead SOIC_N
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
AD8278ARZ-R71
AD8278ARZ-RL1
AD8278BRZ1
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N, 13" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 7" Tape and Reel
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 7" Tape and Reel
8-Lead MSOP, 13" Tape and Reel
AD8278BRZ-R71
AD8278BRZ-RL1
AD8278ARMZ1
AD8278ARMZ-R71
AD8278ARMZ-RL1
AD8278BRMZ1
AD8278BRMZ-R71
AD8278BRMZ-RL1
Y21
Y21
Y21
Y22
Y22
Y22
1 Z = RoHS Compliant Part.
Rev. 0 | Page 21 of 24
AD8278
NOTES
Rev. 0 | Page 22 of 24
AD8278
NOTES
Rev. 0 | Page 23 of 24
AD8278
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08308-0-7/09(0)
Rev. 0 | Page 24 of 24
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