AD845JCHIPS [ADI]
Precision, 16 MHz CBFET Op Amp; 精密， 16 MHz的CBFET运算放大器
| 型号： | AD845JCHIPS |
| 厂家： | 
ADI |
| 描述： | Precision, 16 MHz CBFET Op Amp |
| 文件： | 总8页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision, 16 MHz
CBFET Op Amp
a
AD845
FEATURES
CO NNECTIO N D IAGRAMS
Replaces Hybrid Am plifiers in Many Applications
16-P in SO IC
(R-16) P ackage
P lastic Mini-D IP (N) P ackage
and Cerdip (Q) P ackage
AC PERFORMANCE:
Settles to 0.01% in 350 ns
100 V/ s Slew Rate
12.8 MHz m in Unity-Gain Bandw idth
1.75 MHz Full-Pow er Bandw idth at 20 V p-p
DC PERFORMANCE:
0.25 m V m ax Input Offset Voltage
5 V/ ؇C m ax Offset Voltage Drift
0.5 nA Input Bias Current
250 V/ m V m in Open-Loop Gain
4 V p-p m ax Voltage Noise, 0.1 Hz to 10 Hz
94 dB m in CMRR
Available in Plastic Mini-DIP, Herm etic Cerdip and
SOIC Packages. Also Available in Tape and Reel in
Accordance w ith EIA-481A Standard
T he AD845 conforms to the standard op amp pinout except
that offset nulling is to V+. T he AD845J and AD845K grade
devices are available specified to operate over the commercial
0°C to +70°C temperature range. AD845A and AD845B
devices are specified for operation over the –40°C to +85°C
industrial temperature range. T he AD845S is specified to oper-
ate over the full military temperature range of –55°C to
+125°C. Both the industrial and military versions are available
in 8-pin cerdip packages. T he commercial version is available in
an 8-pin plastic mini-DIP and 16-pin SOIC; “J” and “S” grade
chips are also available.
P RO D UCT D ESCRIP TIO N
T he AD845 is a fast, precise, N channel JFET input, monolithic
operational amplifier. It is fabricated using Analog Devices’
complementary bipolar (CB) process. Advanced laser-wafer
trimming technology enables the very low input offset voltage
and offset voltage drift performance to be realized. T his preci-
sion, when coupled with a slew rate of 100 V/µs, a stable
unity-gain bandwidth of 16 MHz, and a settling time of 350 ns
0.01%—while driving a parallel load of 100 pF and 500 Ω—
represents a combination of features unmatched by any FET
input IC amplifier. T he AD845 can easily be used to upgrade
many existing designs which use BiFET or FET input hybrid
amplifiers and, in some cases, those which use bipolar input op
amps.
P RO D UCT H IGH LIGH TS
1. T he high slew rate, fast settling time, and dc precision of the
AD845 make it ideal for high speed applications requiring
12-bit accuracy.
2. T he performance of circuits using the LF400, HA2520/2/5,
HA2620/2/5, 3550, OPA605, and LH0062 can be upgraded
in most cases.
T he AD845 is ideal for use in applications such as active filters,
high speed integrators, photo diode preamps, sample-and-hold
amplifiers, log amplifiers, and in buffering A/D and D/A con-
verters. T he 250 µV max input offset voltage makes offset null-
ing unnecessary in many applications. T he common-mode
rejection ratio of 110 dB over a ±10 V input voltage range
represents exceptional performance for a JFET input high
speed op amp. T his, together with a minimum open-loop
gain of 250 V/mV ensures that 12-bit performance is achieved,
even in unity-gain buffer circuits.
3. T he AD845 is unity-gain stable and internally compensated.
4. T he AD845 is specified while driving 100 pF/500 Ω loads.
REV. D
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
(@ +25؇C and ؎15 V dc, unless otherwise noted)
AD845–SPECIFICATIONS
Model
AD 845J/A
Typ
AD 845K/B
Typ
AD 845S
Typ
Conditions
Min
Max Min
Max
Min
Max
Units
INPUT OFFSET VOLT AGE1
Initial Offset
0.7
1.5
2.5
20
0.1
1.5
0.25
0.4
5.0
0.25
1.0
2.0
10
mV
mV
µV/°C
T MIN –T MAX
Offset Drift
INPUT BIAS CURRENT 2
Initial
VCM = 0 V
T MIN –T MAX
0.75
25
2
0.5
15
1
0.75
25
2
500
nA
nA
45/75
18/38
INPUT OFFSET CURRENT
Initial
VCM = 0 V
T MIN –T MAX
300
3/6.5
100
1.2/2.6
300
20
pA
nA
INPUT CHARACT ERIST ICS
Input Resistance
Input Capacitance
1011
4.0
1011
4.0
1011
4.0
kΩ
pF
INPUT VOLT AGE RANGE
Differential
±20
±20
±20
V
Common Mode
Common-Mode Rejection
؎10
86
+10.5/–13
110
؎10
94
+10.5/–13
113
؎10
86
+10.5/–13
110
V
dB
VCM = ±10 V
INPUT VOLT AGE NOISE
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
4
4
4
µV p-p
80
60
25
18
12
80
60
25
18
12
80
60
25
18
12
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
INPUT CURRENT NOISE
OPEN-LOOP GAIN
f = 1 kHz
0.1
0.1
0.1
pA/√Hz
VO = ±10 V
RLOAD ≥ 2 kΩ
RLOAD ≥ 500 Ω
T MIN –T MAX
200
100
70
500
250
250
125
75
500
250
200
100
50
500
250
V/mV
V/mV
V/mV
OUT PUT CHARACT ERIST ICS
Voltage
Current
RLOAD ≥ 500 Ω
Short Circuit
Open Loop
؎12.5
؎12.5
؎12.5
V
mA
Ω
50
5
50
5
50
5
Output Resistance
FREQUENCY RESPONSE
Small Signal
Unity Gain
VO = ±10 V
RLOAD = 500 Ω
12.8
16
13.6
16
13.6
16
MHz
Full Power Bandwidth3
1.75
20
20
1.75
20
20
1.75
20
20
MHz
ns
%
Rise T ime
Overshoot
Slew Rate
80
100
94
100
94
100
V/µs
Settling T ime
10 V Step
CLOAD = 100 pF
RLOAD = 500 Ω
to 0.01%
350
250
350
250
500
350
250
500
ns
ns
to 0.1%
DIFFERENT IAL GAIN
DIFFERENT IAL PHASE
f = 4.4 MHz
f = 4.4 MHz
0.04
0.02
0.04
0.02
0.04
0.02
%
Degree
POWER SUPPLY
Rated Performance
Operating Range
Rejection Ratio
±15
±15
±15
V
V
dB
mA
؎4.75
VS = ±5 to ±15 V 88
؎18 ؎4.75
؎18
؎4.75
88
؎18
110
10
95
113
10
110
10
Quiescent Current
T MIN to T MAX
12
12
12
NOT ES
1Input offset voltage specifications are guaranteed after 5 minutes of operation at T A = +25°C.
2Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at T = +25°C.
A
3FPBW = slew rate/2 π V peak.
4“S” grade T MIN–T MAX are tested with automatic test equipment at T A = –55°C and T A = +125°C.
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from these tests are
used to calculate outgoing quality levels.
Specifications subject to change without notice.
–2–
REV. D
AD845
ABSO LUTE MAXIMUM RATINGS 1
METALIZATIO N P H O TO GRAP H
D imensions shown in inches and (mm).
Contact factory for latest dimensions.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation2
Plastic Mini-DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts
Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Watts
16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Watts
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + VS
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and –VS
Storage T emperature Range
Q
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C
N, R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +125°C
Lead T emperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOT ES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only, and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability .
2Mini-DIP package: θJA = 100°C/watt; cerdip package: θJA = 110°C/watt. SOIC
package: θJA = 100°C/W.
SUBSTRATE CONNECTED TO +VS
O RD ERING GUID E
Tem perature
Range
P ackage
D escription
P ackage
O ption*
Model
AD845JN
AD845KN
AD845JR-16
AD845AQ
AD845BQ
AD845SQ
AD845SQ/883B
5962-8964501PA
AD845JCHIPS
AD845SCHIPS
AD845JR-16-REEL
AD845JR-16-REEL7
0°C to +70°C
0°C to +70°C
0°C to +70°C
8-Pin Plastic Mini-DIP
8-Pin Plastic Mini-DIP
16-Pin SOIC
8-Pin Cerdip
8-Pin Cerdip
8-Pin Cerdip
8-Pin Cerdip
8-Pin Cerdip
Die
N-8
N-8
R-16
Q-8
Q-8
Q-8
Q-8
Q-8
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
–55°C to +125°C
0°C to +70°C
0°C to +70°C
Die
T ape & Reel
T ape & Reel
REV. D
–3–
AD845–Typical Characteristics
*N = Plastic DIP: Q = Cerdip; R = Small Outline
IC (SOIC).
Com m on-Mode Voltage
Lim it vs. Tem perature
Figure 3. Output Voltage Swing
vs. Resistive Load
Figure 2. Output Voltage Swing
vs. Supply Voltage
Figure 1. Input Voltage Swing
vs. Supply Voltage
Figure 6. Magnitude of Output
Im pedance vs. Frequency
Figure 5. Input Bias Current vs.
Tem perature
Figure 4. Quiescent Current vs.
Supply Voltage
Figure 8. Short-Circuit Current
Figure 9. Unity-Gain Bandwidth
Figure 7. Input Bias Current vs.
–4–
REV. D
AD845
vs. Frequency
vs. Tem perature
Spectral Density
Figure 10. Open-Loop Gain and
Phase Margin vs. Frequency
Figure 11. Open-Loop Gain vs.
Supply Voltage
Figure 12. Power Supply
Rejection vs. Frequency
Figure 14. Large Signal Frequency
Response
Figure 15. Output Swing and
Error vs. Settling Tim e
Figure 13. Com m on-Mode
Rejection vs. Frequency
Figure 16. Harm onic Distortion
Figure 17. Input Noise Voltage
Figure 18. Slew Rate vs. Tem perature
REV. D
–5–
AD845
Figure 19. Recom m ended Power
Supply Bypassing
Figure 20. AD845 Sim plified
Schem atic
Figure 21. Offset Null Configuration
Figure 22a. Unity-Gain Follower
Figure 22c. Unity-Gain Follower
Sm all Signal Pulse Response
Figure 22b. Unity-Gain Follower
Large Signal Pulse Response
Figure 23c. Unity-Gain Inverter
Sm all Signal Pulse Response
Figure 23b. Unity-Gain Inverter
Large Signal Pulse Response
Figure 23a. Unity-Gain Inverter
–6–
REV. D
AD845
MEASURING AD 845 SETTLING TIME
and stable, accurately defined gain. Low input bias currents and
fast settling are achieved with the FET input AD845.
T he Figure 24 shows the AD845 settling time performance.
T his measurement was accomplished by driving the amplifier
in the unity-gain inverting mode with a fast pulse generator.
T he input summing junction was measured using false nulling
techniques.
Most monolithic instrumentation amplifiers do not have the
high frequency performance of the circuit in Figure 26. T he cir-
cuit bandwidth is 10.9 MHz at a gain of 1 and 8.8 MHz at a
gain of 10; settling time for the entire circuit is 900 ns to 0.01%
for a 10 V step (Gain = 10).
Settling time is defined as:
T he interval of time from the application of an ideal
step function input until the closed-loop amplifier output
has entered and remains within a specified error band.
T he capacitors employed in this circuit greatly improve the
amplifier’s settling time and phase margin.
Components of settling time include:
1. Propagation time through the amplifier
2. Slewing time to approach the final output value
3. Recovery time from overload associated with the slewing
4. Linear settling to within a specified error band.
T hese individual components can easily be seen in Figure 24.
Settling time is extremely important in high speed applications
where the current output of a DAC must be converted to a
voltage. When driving a 500 Ω load in parallel with a 100 pF
capacitor, the AD845 settles to 0.1% in 250 ns and to 0.01% in
310 ns.
Figure 26. High Perform ance, High Speed Instrum enta-
tion Am plifier
Table I. P erform ance Sum m ary for the Three O p Am p
Instrum entation Am plifier Circuit
3 O p-Am p In-Am p
Sm all Signal
Bandwidth
Settling Tim e
to 0.01%
Gain
RG
Figure 24. Settling Characteristics 0 V to 10 V Step
Upper Trace: Output of AD845 Under Test (5 V/Div)
Lower Trace: Error Voltage (1 m V/Div)
1
2
10
100
Open
2k
226 Ω
20 Ω
10.9 MHz
8.8 MHz
2.6 MHz
290 kHz
500 ns
500 ns
900 ns
7.5 µs
Note: Resistors around the amplifiers’ input pins need to be small enough in
value so that the RC time constant they form, with stray circuit capacitance,
does not reduce circuit bandwidth.
Figure 25. Settling Tim e Test Circuit
A H IGH SP EED INSTRUMENTATIO N AMP
Figure 27. The Pulse Response of the Three Op Am p
Instrum entation Am plifier. Gain = 1, Horizontal Scale:
0.5 m s/Div; Vertical Scale: 5 V/Div
T he three op amp instrumentation amplifier circuit shown in
Figure 26 can provide a range of gains from unity up to 1000
and higher. T he instrumentation amplifier configuration fea-
tures high common-mode rejection, balanced differential inputs
REV. D
–7–
AD845
Figure 28b. Settling Tim e of the Three Op Am p Instru-
m entation Am plifier. Horizontal Scale: 200 ns/Div; Vertical
Scale, Negative Pulse Input: 5 V/ Div; Output Settling:
1 m V/Div
Figure 28a. Settling Tim e of the Three Op Am p Instru-
m entation Am plifier. Horizontal Scale: 200 ns/Div; Vertical
Scale, Positive Pulse Input: 5 V/Div; Output Settling:
1 m V/Div
AD845 is ideally suited to drive high resolution A/D converters
with 5 µs on longer conversion times since it offers both wide
bandwidth and high open-loop gain.
D RIVING TH E ANALO G INP UT O F AN A/D CO NVERTER
An op amp driving the analog input of an A/D converter, such
as that shown in Figure 29, must be capable of maintaining a
constant output voltage under dynamically changing load condi-
tions. In successive approximation converters, the input current
is compared to a series of switched trial currents. T he compari-
son point is diode clamped but may deviate several hundred
millivolts resulting in high frequency modulation of A/D input
current. T he output impedance of a feedback amplifier is made
artificially low by the loop gain. At high frequencies, where the
loop gain is low, the amplifier output impedance can approach
its open-loop value. Most IC amplifiers exhibit a minimum
open-loop output impedance of 25 Ω due to current limiting re-
sistors. A few hundred microamps reflected from the change in
converter loading can introduce errors in instantaneous input
voltage. If the A/D conversion speed is not excessive and the
bandwidth of the amplifier is sufficient, the amplifier’s output
will return to the nominal value before the converter makes its
comparison. However, many amplifiers have relatively narrow
bandwidth yielding slow recovery from output transients. T he
Figure 29. AD845 As ADC Unity Gain Buffer
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
Mini-D IP (N) P ackage
Cerdip (Q) P ackage
–8–
REV. D
相关型号：
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ADI
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