AD8500AKSZ-R2 [ADI]
Micropower Precision CMOS Operational Amplifier; 微功耗精密CMOS运算放大器型号: | AD8500AKSZ-R2 |
厂家: | ADI |
描述: | Micropower Precision CMOS Operational Amplifier |
文件: | 总12页 (文件大小:632K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Micropower Precision CMOS
Operational Amplifier
AD8500
FEATURES
PIN CONFIGURATION
Supply current: 1 μA maximum
Offset voltage: 1 mV maximum
Single-supply or dual-supply operation
Rail-to-rail input and output
No phase reversal
OUT A
V–
1
2
3
5
V+
AD8500
TOP VIEW
(Not to Scale)
+IN
4
–IN
Figure 1. 5-Lead SC70
Unity gain stable
APPLICATIONS
Portable equipment
Remote sensors
Low power filters
Threshold detectors
Current sensing
GENERAL DESCRIPTION
The AD8500 is a low power, precision CMOS op amp featuring
a maximum supply current of 1 μA. The AD8500 has a maximum
offset voltage of 1 mV and a typical input bias current of 1 pA; it
operates rail-to-rail on both the input and output. The AD8500
can operate from a single-supply voltage of +1.8 V to +5.5 V or
a dual-supply voltage of ±0.ꢀ V to ±±.ꢁ5 V.
The ability to swing rail-to-rail at both the input and output helps
maximize dynamic range and signal-to-noise ratio in systems
that operate at very low voltages. The low offset voltage allows
the AD8500 to be used in systems with high gain without having
excessively large output offset errors, and it provides high accuracy
without the need for system calibration.
With its low power consumption, low input bias current, and
rail-to-rail input and output, the AD8500 is ideally suited for
a variety of battery-powered portable applications. Potential
applications include ECGs, pulse monitors, glucose meters,
smoke and fire detectors, vibration monitors, and backup
battery sensors.
The AD8500 is fully specified over the industrial temperature
range (−40°C to +85°C) and is operational over the extended
industrial temperature range (−40°C to +1±5°C). It is available
in a 5-lead, SCꢁ0 surface-mount package.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD8500
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
REVISION HISTORY
8/06—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Figure 17, Figure 18, and Figure 19 ........................... 8
4/06—Revision 0: Initial Version
Rev. A | Page 2 of 12
AD8500
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = 5 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Voltage Range
Input Bias Current
VOS
∆VOS/∆T
0 V < VCM < 5 V
−40°C < TA < +85°C
0.235
3
1
10
mV
μV/°C
V
−0.3
+5.3
10
100
600
5
IB
1
pA
pA
pA
pA
pA
pA
dB
dB
dB
dB
pF
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
0.5
−40°C < TA < +85°C
−40°C < TA < +125°C
0 V < VCM < 5 V
−40°C < TA < +85°C
0.1 V < VOUT < 4.9 V
50
100
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
CMRR
AVO
75
70
98
80
90
90
120
0.1 V < VOUT < 4.9 V; −40°C < TA < +85°C
CDIFF
CCM
2
4.5
pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
ISC
RLOAD = 100 kΩ to GND
RLOAD = 10 kΩ to GND
RLOAD = 100 kΩ to VS
RLOAD = 10 kΩ to VS
VOUT = GND
4.970
4.900
4.995
4.960
0.85
6.5
V
V
mV
mV
mA
Output Voltage Low
5
15
Short-Circuit Current
POWER SUPPLY
5
Power Supply Rejection Ratio
PSRR
ISY
1.8 V < VS < 5 V
−40°C < TA < +85°C
VO = VS/2
−40°C < TA < +85°C
−40°C < TA < +125°C
90
80
110
dB
dB
μA
μA
μA
Supply Current/Amplifier
0.75
1
1.5
2
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ØO
0.004
7
60
V/μs
kHz
Degrees
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Current Noise Density
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
6
190
0.1
μV p-p
nV/√Hz
pA/√Hz
en
in
Rev. A | Page 3 of 12
AD8500
@ VS = 1.8 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max Unit
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Voltage Range
Input Bias Current
VOS
∆VOS/∆T
0 V < VCM < 1.8 V
−40°C < TA < +85°C
0.235
3.5
1
12
mV
μV/°C
V
−0.3
+2.1
10
100
600
5
IB
1
pA
pA
pA
pA
pA
pA
dB
dB
dB
dB
pF
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
0.5
−40°C < TA < +85°C
−40°C < TA < +125°C
0 V < VCM < 1.8 V
−40°C < TA < +85°C
0.1 V < VOUT < 1.7 V
50
100
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
CMRR
AVO
65
60
88
70
85
83
115
0.1 V < VOUT < 1.7 V; −40°C < TA < +85°C
CDIFF
CCM
2
4.5
pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RLOAD = 100 kΩ to GND
RLOAD = 10 kΩ to GND
1.790 1.798
1.760 1.783
V
V
Output Voltage Low
VOL
ISC
RLOAD = 100 kΩ to VS
RLOAD = 10 kΩ to VS
0.70
5
2
5
15
mV
mV
mA
Short-Circuit Current
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
1.8 V < VS < 5 V
−40°C < TA < +85°C
VO = VS/2
−40°C < TA < +85°C
−40°C < TA < +125°C
90
80
110
dB
dB
μA
μA
μA
Supply Current/Amplifier
0.65
1
1.5
2
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ØO
0.004
7
60
V/μs
kHz
Degrees
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Current Noise Density
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
6
190
0.1
μV p-p
nV/√Hz
pA/√Hz
en
in
Rev. A | Page 4 of 12
AD8500
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range
6 V
VSS − 0.4 V to VDD + 0.4 V
6 V
−65°C to +150°C
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
−40°C to +125°C
−65°C to +150°C
300°C
Absolute maximum ratings apply at 25°C, unless other-
wise noted.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Characteristics
Package Type
θJA
θJC
Unit
5-Lead SC70 (KS-5)
376
126
°C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 12
AD8500
TYPICAL PERFORMANCE CHARACTERISTICS
1000
100
10
1200
1000
800
600
400
200
0
1
0.1
0.01
0.001
–40
–20
0
20
40
60
80
100
120
–1000 –750
–500
–250
0
250
500
750
1000
TEMPERATURE (°C)
V
(µV)
OS
Figure 5. Input Bias Current vs. Temperature
(VS = 1.8 V and 5.0 V)
Figure 2. Input Offset Voltage Distribution
(0 V < VCM < 5.0 V)
1000
100
10
12
10
8
I
(+125°C)
B
I
(+85°C)
B
6
1
I
(+25°C)
(–40°C)
B
0.1
0.01
4
2
0
I
B
0.001
0
0.5
1.0
1.5
2.0
2.5
(V)
3.0
3.5
4.0
4.5
5.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
TCV (µV/°C)
OS
CM
Figure 6. Input Bias Current vs. Common-Mode Voltage
Figure 3. Input Offset Voltage Drift Distribution
(−40°C < TA < +85°C)
1000
800
70
60
50
40
600
400
200
0
30
–200
–400
–600
–800
–1000
20
10
0
0.5
0.6
0.7
0.8
0.9
1.0
0
1
2
3
4
5
V
(V)
SUPPLY CURRENT (µA)
CM
Figure 7. Supply Current Distribution
Figure 4. Input Offset Voltage vs. Common-Mode Voltage
Rev. A | Page 6 of 12
AD8500
1000
100
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
SOURCE
10
SINK
1
0.1
0.01
0.001
0
1
2
3
4
5
6
0.01
0.1
1
V
(V)
LOAD CURRENT (mA)
S
Figure 11. Output Saturation Voltage vs. Load Current
Figure 8. Supply Current vs. Supply Voltage
100
10
1
1.2
1.0
0.8
0.6
0.4
0.2
0
V
@ 10kΩ LOAD
@ 10kΩ LOAD
OH
I
AT 5.0V
AT 1.8V
SY
V
OL
V
@ 100kΩ LOAD
OH
I
SY
V
@ 100kΩ LOAD
OL
0.1
–40
–15
10
35
60
85
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 12. Output Saturation Voltage vs. Temperature
Figure 9. Supply Current vs. Temperature
135
90
80
60
900
850
800
750
700
650
600
40
45
20
0
0
–45
–90
–135
–180
–20
–40
–60
–80
10
100
1k
10k
100k
0
0.5
1.0
1.5
2.0
2.5
(V)
3.0
3.5
4.0
4.5
5.0
FREQUENCY (Hz)
V
CM
Figure 13. Open-Loop Gain and Phase vs. Frequency
Figure 10. Supply Current vs. Input Common-Mode Voltage
Rev. A | Page 7 of 12
AD8500
120
110
100
90
0.20
0.15
0.10
0.05
0
80
70
60
50
–0.05
–0.10
–0.15
–0.20
40
30
20
10
0
0.01
0.1
1
10
100
–0.0005
0
0.0005
0.0010
0.0015
FREQUENCY (kHz)
TIME (Seconds)
Figure 14. CMRR vs. Frequency
Figure 17. Small Signal Transient Response
(No Load)
100
90
80
70
60
50
40
30
20
10
0.20
0.15
0.10
0.05
0
–0.05
–0.10
–0.15
–0.20
0
0.01
0.1
1
10
100
–0.0005
0
0.0005
0.0010
0.0015
FREQUENCY (kHz)
TIME (Seconds)
Figure 15. PSRR vs. Frequency
Figure 18. Small Signal Transient Response
(100 pF Load Capacitance)
35
30
25
20
15
10
5
6
5
4
3
2
1
OS+
OS–
0
10
0
100
LOAD CAPACITANCE (pF)
1000
–0.002 –0.001
0
0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008
TIME (Seconds)
Figure 19. Large Signal Transient Response
(No Load)
Figure 16. Small Signal Overshoot vs. Load Capacitance
Rev. A | Page 8 of 12
AD8500
1000
100
10
V
S
V
OUT
GAIN = +1
= V
V
IN
S/2
1
10
100
1k
10k
TIME (µs)
FREQUENCY (Hz)
Figure 23. Voltage Noise Density
(VS = 1.8 V and 5.0 V)
Figure 20. Turn-On Transient Response
500
400
300
200
100
4
3
V
V
OUT
IN
2
1
0
–1
–2
–3
–4
0
–1000 –750 –500 -250
0
250
500
750 1000
–0.005 –0.003 –0.001 0.001
0.003 0.005 0.007 0.009
V
(µV)
TIME (µs)
OS
Figure 21. No Phase Reversal
Figure 24. Input Offset Voltage Distribution
(0 V < VCM < 1.8 V)
12
10
8
4
3
2
1
6
0
–1
–2
–3
–4
4
2
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5
–5
–4
–3
–2
–1
0
1
2
3
4
5
TCV (µV/°C)
OS
TIME (Seconds)
Figure 22. 0.1 Hz to 10 Hz Input Voltage Noise
(VS = 5 V and 1.8 V)
Figure 25. Input Offset Voltage Drift Distribution
(−40°C < TA < +85°C)
Rev. A | Page 9 of 12
AD8500
1000
800
600
400
200
0
700
650
600
–200
–400
–600
–800
550
500
–1000
0
0.3
0.6
0.9
(V)
1.2
1.5
1.8
0
0.3
0.6
0.9
(V)
1.2
1.5
1.8
V
V
CM
CM
Figure 26. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 29. Supply Current vs. Input Common-Mode Voltage
1000
1000
I
(+125°C)
B
100
10
100
10
1
SOURCE
SINK
I
(+85°C)
B
1
I
(+25°C)
B
0.1
0.1
0.01
0.001
I
(–40°C)
1.5
B
0.01
0.001
0
0.3
0.6
0.9
(V)
1.2
1.8
0.01
0.1
1
V
LOAD CURRENT (mA)
CM
Figure 30. Output Saturation Voltage vs. Load Current
Figure 27. Input Bias Current vs. Input Common-Mode Voltage
100
70
60
50
40
30
20
10
0
V
@ 10kΩ LOAD
OH
10
V
@ 10kΩ LOAD
@ 100kΩ LOAD
OL
V
OH
1
V
@ 100kΩ LOAD
OL
0.1
–40
–15
10
35
60
85
0.4
0.5
0.6
0.7
0.8
0.9
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
Figure 31. Output Saturation Voltage vs. Temperature
Figure 28. Supply Current Distribution
Rev. A | Page 10 of 12
AD8500
0.20
0.15
0.10
0.05
0
80
60
135
90
40
45
20
0
0
–45
–90
–135
–180
–0.05
–0.10
–0.15
–0.20
–20
–40
–60
–80
–0.0005
0
0.0005
0.0010
0.0015
10
100
1k
10k
100k
TIME (Seconds)
FREQUENCY (Hz)
Figure 35. Small Signal Transient Response
(No Load)
Figure 32. Open-Loop Gain and Phase vs. Frequency
100
90
80
70
60
50
40
30
20
10
0
0.20
0.15
0.10
0.05
0
–0.05
–0.10
–0.15
–0.20
0.01
0.1
1
10
100
–0.0005
0
0.0005
0.0010
0.0015
FREQUENCY (kHz)
TIME (Seconds)
Figure 36. Small Signal Transient Response
(100 pF Load Capacitance)
Figure 33. CMRR vs. Frequency
35
30
25
20
15
10
5
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
OS–
OS+
0
10
100
LOAD CAPACITANCE (pF)
1000
–0.002 –0.001
0
0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008
TIME (Seconds)
Figure 34. Small Signal Overshoot vs. Load Capacitance
Figure 37. Large Signal Transient Response
(No Load)
Rev. A | Page 11 of 12
AD8500
OUTLINE DIMENSIONS
2.20
2.00
1.80
1.35
1.25
1.15
2.40
2.10
1.80
5
1
4
3
2
PIN 1
1.00
0.90
0.70
0.65 BSC
0.40
0.10
1.10
0.80
0.46
0.36
0.26
0.30
0.15
0.22
0.08
0.10 M
AX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 38. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD8500AKSZ-R21
AD8500AKSZ-REEL1
AD8500AKSZ-REEL71
Temperature Range
Package Description
5-Lead SC70
5-Lead SC70
Package Option
Branding
A0F
A0F
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
KS-5
KS-5
KS-5
5-Lead SC70
A0F
1 Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06005-0-8/06(A)
Rev. A | Page 12 of 12
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