AD8626 [ADI]
Precision Low Power Single-Supply JFET Amplifier; 精密低功耗单电源JFET放大器
| 型号： | AD8626 |
| 厂家： | 
ADI |
| 描述： | Precision Low Power Single-Supply JFET Amplifier |
| 文件： | 总20页 (文件大小：540K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision Low Power
Single-Supply JFET Amplifier
AD8627/AD8626/AD8625
FEATURES
PIN CONFIGURATIONS
SC70 package
Very low IB: 1 pA max
8-Lead SOIC
(R-8 Suffix)
5-Lead SC70
(KS Suffix)
OUT A
V–
1
2
3
5
4
V+
Single-supply operation: 5 V to 26 V
Dual-supply operation: 2.5 V to 13 V
Rail-to-rail output
Low supply current: 630 µA/amp typ
Low offset voltage: 500 µV max
Unity gain stable
NC
–IN
+IN
V–
1
2
3
4
8
7
6
5
NC
V+
AD8627
AD8627
+IN
–IN
OUT
NC
NC = NO CONNECT
No phase reversal
8-Lead SOIC
(R-8 Suffix)
8-Lead MSOP
(RM-Suffix)
APPLICATIONS
Photodiode amplifiers
ATE
OUT A
–IN A
+IN A
V–
1
8
V+
OUT A
–IN A
+IN A
V–
1
8
V+
OUT B
–IN B
+IN B
AD8626
2
3
4
7
6
5
OUT B
–IN B
+IN B
AD8626
4
5
Line-powered/battery-powered instrumentation
Industrial controls
Automotive sensors
Precision filters
Audio
14-Lead SOIC
(R-Suffix)
14-Lead TSSOP
(RU-Suffix)
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
14
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
GENERAL DESCRIPTION
AD8625
The AD862x is a precision JFET input amplifier. It features
true single-supply operation, low power consumption, and
rail-to-rail output. The outputs remain stable with capacitive
loads of over 500 pF; the supply current is less than 630 µA/amp.
Applications for the AD862x include photodiode transimpedance
amplification, ATE reference level drivers, battery management,
both line powered and portable instrumentation, and remote
sensor signal conditioning including automotive sensors.
AD8625
+IN B
–IN B
OUT B
10 +IN C
7
8
9
8
–IN C
OUT C
Figure 1.
The AD862x’s ability to swing nearly rail-to-rail at the input
and rail-to-rail at the output enables it to be used to buffer
CMOS DACs, ASICs, and other wide output swing devices in
single-supply systems.
The 5 MHz bandwidth and low offset are ideal for precision
filters.
The AD862x is fully specified over the industrial temperature
range. (–40° to +85°) The AD8627 is available in both 5-lead
SC70 and 8-lead SOIC surface-mount packages. The SC70
packaged parts are available in tape and reel only. The AD8626
is available in an MSOP package.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD8627/AD8626/AD8625
TABLE OF CONTENTS
AD8627/AD8626/AD8625–Specifications ................................... 3
Electrical Characteristics............................................................. 3
Electrical Characteristics............................................................. 4
Absolute Maximum Ratings............................................................ 5
Minimizing Input Current ........................................................ 15
Photodiode Preamplifier Application...................................... 15
Output Amplifier for Digital-to-Analog Converters............. 15
Eight-Pole Sallen Key Low-Pass Filter..................................... 16
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 19
Typical Performance Characteristics–
AD8627/AD8626/AD8625.............................................................. 6
Applications..................................................................................... 13
REVISION HISTORY
1/04—Data sheet changed from Rev. A to Rev. B
Change to General Description ......................................................... 1
Change to Figure 10 ............................................................................ 7
Change to Figure13 ............................................................................. 7
Change to Figure 37 ..........................................................................11
Changes to Figure 38.........................................................................12
Change to Output Amplifier for DACs section.............................15
Updated Outline Dimensions..........................................................19
10/03—Data sheet changed from Rev. 0 to Rev. A
Addition of two new parts……………………………………. Universal
Change to General Description………………………………………. ...1
Changes to Pin Configurations………………….......................................1
Change to Specifications table…………………………………………. .3
Changes to Figure 31…………………………….......................................10
Changes to Figure 32……………………………....................................... 11
Changes to Figure 38…………………………….......................................12
Changes to Figure 46…………………………….......................................16
Changes to Figure 47……………………………....................................... 16
Changes to Figure 49……………………………....................................... 17
Updated Outline Dimensions…………………………………………..18
Changes to Ordering Guide…………………........................................ .. 19
Rev. B | Page 2 of 20
AD8627/AD8626/AD8625
AD8627/AD8626/AD8625–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Table 1. @VS = 5 V, VCM = 1.5 V, TA = 25°C, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
0.05
0.25
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
0.5
1.2
1
60
0.5
25
3
mV
mV
pA
pA
pA
−40°C < TA < +85°C
–40°C < TA < +85°C
–40°C < TA < +85°C
Input Bias Current
Input Offset Current
IOS
pA
V
Input Voltage Range
0
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
CMRR
AVO
∆VOS/∆T
VCM = 0 V to 2.5 V
RL = 10 kΩ, VO = 0.5 V to 4.5 V
–40°C < TA < +85°C
66
100
87
230
2.5
dB
V/mV
µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
4.92
4.90
V
V
V
V
IL = 2 mA, –40°C < TA < +85°C
IL = 2 mA, –40°C < TA < +85°C
Output Voltage Low
0.075
0.08
Output Current
10
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 26 V
80
104
630
dB
µA
µA
785
800
–40°C < TA < +85°C
DYNAMIC PERFORMANCE
Slew Rate
SR
5
V/µs
Gain Bandwidth Product
Phase Margin
GBP
ØM
5
60
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Channel Separation
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.9
17.5
0.4
µV p-p
nV/√Hz
fA/√Hz
dB
Cs
f = 1 kHz
104
Rev. B | Page 3 of 20
AD8627/AD8626/AD8625
ELECTRICAL CHARACTERISTICS
Table 2. @VS = 13 V; VCM = 0 V; TA = 25°C, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
0.35
0.25
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
0.75
1.35
1
60
0.5
25
mV
mV
pA
pA
pA
–40°C < TA < +85°C
–40°C < TA < +85°C
–40°C < TA < +85°C
Input Bias Current
Input Offset Current
IOS
pA
Input Voltage Range
–13
76
150
+11
V
dB
V/mV
µV/°C
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
CMRR
AVO
∆VOS/∆T
VCM = –13 V to +10 V
RL = 10 kΩ, VO = –11 V to +11 V
–40°C < TA < +85°C
105
310
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOH
VOL
VOL
IOUT
+12.92
+12.91
V
V
V
V
IL = 2 mA, –40°C < TA < +85°C
IL = 2 mA, –40°C < TA < +85°C
Output Voltage Low
–12.92
–12.91
Output Current
15
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 2.5 V to 13 V
–40°C < TA < +85°C
80
104
710
dB
µA
µA
850
900
DYNAMIC PERFORMANCE
Slew Rate
SR
5
V/µs
Gain Bandwidth Product
Phase Margin
GBP
ØM
5
60
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Channel Separation
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
2.5
16
0.5
105
µV p-p
nV/√Hz
fA/√Hz
dB
Cs
f = 1 kHz
Rev. B | Page 4 of 20
AD8627/AD8626/AD8625
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect device reliability. Absolute maximum ratings apply at
25°C, unless otherwise noted.
Table 3. Stress Ratings
Parameter
Rating
Supply Voltage
27 V
Input Voltage
VS– to VS+
Differential Input Voltage
Output Short Circuit Duration
Storage Temperature Range, R Package
Operating Temperature Range
Junction Temperature Range, R Package
Supply Voltage
Indefinite
–65°C to + 125°C
–40°C to + 85°C
–65°C to 150°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Table 4.
1
Package Type
θJA
θJC
126
45
43
36
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
5-Lead SC70 (KS)
8-Lead MSOP (RM)
8-Lead SOIC (R)
14-Lead SOIC (R)
14-Lead TSSOP (RU)
376
210
158
120
180
35
1 θJA is specified for worst case conditions when devices are soldered in circuit
boards for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 5 of 20
AD8627/AD8626/AD8625
TYPICAL PERFORMANCE CHARACTERISTICS–AD8627/AD8626/AD8625
16
14
12
10
8
25
20
15
10
5
V
T
=
±12V
V
= +3.5V/–1.5V
SY
= 25
SY
°
C
A
6
4
2
0
0
–600
–400
–200
VOLTAGE (
0
1
2
3
4
5
6
7
8
9
10
0
200
400
600
OFFSET VOLTAGE (
µ
V/
°
C)
µV)
Figure 5. Offset Voltage Drift
Figure 2. Input Offset Voltage
50
40
12
10
8
V
= ±13V
SY
= 25°C
V
= ±13V
SY
T
A
30
20
10
0
6
–10
–20
–30
–40
–50
4
2
0
0
1
2
3
4
5
6
7
8
9
10
–15.0–12.5–10.0 –7.5 –5.0 –2.5
0
2.5 5.0 7.5 10.0 12.5 15.0
(V)
V
OFFSET VOLTAGE (µV/°C)
CM
Figure 6. Input Bias Current vs. VCM
Figure 3. Offset Voltage Drift
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
18
16
14
12
10
8
V
= +3.5V/–1.5V
SY
V
T
= ±13V
SY
= 25
°
C
A
6
4
2
0
–400
–300
–200
–100
VOLTAGE (
0
100
200
300
–15.0–12.5–10.0 –7.5 –5.0 –2.5
0
2.5 5.0 7.5 10.0 12.5 15.0
µV)
V
(V)
CM
Figure 4. Input Offset Voltage
Figure 7. Input Bias Current vs. VCM
Rev. B | Page 6 of 20
AD8627/AD8626/AD8625
100
10
1
500
400
V
= 5V
V
V
=
= 0V
±
13V
SY
SY
CM
300
200
100
0
–100
–200
–300
–400
–500
0.1
–50
–25
0
25
50
75
C)
100
125
150
–1
0
1
2
3
4
TEMPERATURE (
°
V
(V)
CM
Figure 8. Input Bias Current vs. Temperature
Figure 11. Input Offset Voltage vs. VCM
10M
1M
2.0
1.5
V
= +5V OR ±5V
SY
1.0
0.5
V
= ±13V
SY
0
V
= +5V
SY
–0.5
–1.0
–1.5
–2.0
100k
10k
0.1
1
10
100
–5
–4
–3
–2
–1
0
1
2
3
5
5
LOAD RESISTANCE (k
Ω
)
V
(V)
CM
Figure 9. Input Bias Current vs. VCM
Figure 12. Open-Loop Gain vs. Load Resistance
1000
900
800
700
600
500
400
300
200
100
0
1000
100
10
V
= ±13V
SY
a
d
b
c
e
a. V
b. V
=
=
±
13V, V
=
=
±11V, R = 10kΩ
L
SY
O
±
13V, V
±11V, R = 2kΩ
L
SY
O
c. V = +5V, V = +0.5V/+4.5V, R = 2k
d. V = +5V, V = +0.5V/+4.5V, R = 10k
e. V = +5V, V = +0.5V/+4.5V, R = 600
Ω
Ω
Ω
SY
O
L
SY
O
L
SY
O
L
–100
1
–40
–15 –12
–9
–6
–3
0
3
6
9
12
15
25
95
125
V
(V)
TEMPERATURE (°C)
CM
Figure 10. Input Offset Voltage vs. VCM
Figure 13. Open-Loop Gain vs. Temperature
Rev. B | Page 7 of 20
AD8627/AD8626/AD8625
600
10k
1k
100
10
1
V
= ±13V
SY
V
= ±13V
SY
500
400
300
200
100
0
R
= 10kΩ
L
R
= 100kΩ
L
V
R
= 600Ω
OL
L
–100
–200
–300
–400
V
OH
–15
–10
–5
0
5
10
15
0.001
0.01
0.1
1
10
100
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
Figure 14. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 17. Output Saturation Voltage vs. Load Current
250
10k
1k
100
10
1
V
= ±5V
R
= 1kΩ
SY
L
V
= 5V
SY
200
150
100
50
POS RAIL
= 10k
R
Ω
R = 100kΩ
L
L
0
R
= 10k
Ω
L
–50
–100
–150
–200
–250
R
= 1kΩ
L
V
OL
NEG RAIL
V
OH
0
50
100
150
200
250
300
0.001
0.01
0.1
1
10
100
OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
LOAD CURRENT (mA)
Figure 15. Input Error Voltage vs. Output Voltage within 300 mV of
Supply Rails
Figure 18. Output Saturation Voltage vs. Load Current
800
700
70
60
315
270
225
180
135
90
V
R
C
=
= 2k
= 40pF
±
13V
Ω
SY
L
L
+125°C
50
600
500
400
300
200
100
0
–55
°
C
40
+25°C
GAIN
30
20
PHASE
10
45
0
–0
–10
–20
–30
–45
–90
–135
0
4
8
12
16
20
24
28
10k
100k
1M
FREQUENCY (Hz)
10M
50M
TOTAL SUPPLY VOLTAGE (V)
Figure 16. Quiescent Current vs. Supply Voltage at Different Temperatures
Figure 19. Open-Loop Gain and Phase Margin vs. Frequency
Rev. B | Page 8 of 20
AD8627/AD8626/AD8625
70
60
140
120
100
80
315
270
225
180
135
90
V
R
C
= 5V
V
= ±13V
SY
SY
= 2kΩ
L
L
= 40pF
50
40
GAIN
30
60
20
40
PHASE
10
20
45
0
0
–0
–10
–20
–30
–20
–40
–60
–45
–90
–135
10k
100k
1M
FREQUENCY (Hz)
10M
50M
1k
10k
100k
1M
10M
10M
10M
FREQUENCY (Hz)
Figure 20. Open Loop Gain and Phase Margin vs. Frequency
Figure 23. CMRR vs. Frequency
70
140
120
100
80
V
R
C
=
= 2k
= 40pF
±
13V
V
= 5V
SY
SY
60
50
40
30
20
10
0
Ω
L
L
G = 100
G = 10
G = 1
60
40
20
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
50M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Closed-Loop Gain vs. Frequency
Figure 24. CMRR vs. Frequency
70
60
140
120
100
80
V
= ±13V
V
R
C
= 5V
SY
SY
= 2k
= 40pF
Ω
L
L
50
40
G = 100
G = 10
G = 1
+PSRR
30
60
20
40
–PSRR
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
50M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22. Closed-Loop Gain vs. Frequency
Figure 25. PSRR vs. Frequency
Rev. B | Page 9 of 20
AD8627/AD8626/AD8625
140
V
= ±13V
INPUT
SY
V
= 5V
SY
120
100
80
60
40
OUTPUT
+PSRR
20
–PSRR
0
–20
–40
–60
TIME (400µs/DIV)
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 26. PSRR vs. Frequency
Figure 29. No Phase Reversal
300
270
240
210
180
150
120
90
15
10
5
V
= ±13V
SY
TS + (1%)
TS + (0.1%)
0
TS – (0.1%)
TS – (1%)
–5
–10
–15
G = 10
G = 1
60
G = 100
30
0
1k
10k
100k
1M
10M
100M
0
0.5
1.0
1.5
2.0
2.5
FREQUENCY (Hz)
SETTLING TIME (
µ
s)
Figure 27. Output Impedance vs. Frequency
Figure 30. Output Swing and Error vs. Settling Time
300
270
240
210
180
150
120
90
70
60
50
40
30
20
10
0
V
R
V
A
=
±
13V
Ω
V
= 5V
S
SY
= 10k
L
= 100mV p-p
= +1
IN
V
OS–
OS+
G = 10
G = 1
60
G = 100
10k
30
0
1k
100k
1M
10M
100M
10
100
CAPACITANCE (pF)
1k
FREQUENCY (Hz)
Figure 28. Output Impedance vs. Frequency
Figure 31. Small Signal Overshoot vs. Load Capacitance
Rev. B | Page 10 of 20
AD8627/AD8626/AD8625
70
60
50
40
30
20
10
0
56
49
42
35
28
21
14
7
V
R
=
±
2.5V
Ω
V
= ±13V
S
SY
= 10k
= 100mV p-p
= +1
L
V
IN
A
V
19.7nV/ Hz
OS+
OS–
0
0
1
2
3
4
5
6
7
8
9
10
10
100
CAPACITANCE (pF)
1k
FREQUENCY (kHz)
Figure 35. Voltage Noise Density
Figure 32. Small Signal Overshoot vs. Load Capacitance
56
49
42
35
28
21
14
7
V
=
±
3V
SY
A
V
= 5V
SY
= 100,000V/V
VO
16.7nV/ Hz
0
0
TIME (1s/DIV)
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (kHz)
Figure 33. 0.1 Hz to 10 Hz Noise
Figure 36. Voltage Noise Density
–40
–50
V
SY
=
±
2.5V
A
= 100,000V/V
VO
–60
–70
V
=
±
5V, V = 9V p-p
SY
IN
0
–80
V
=
±
13V, V = 18V p-p
SY
IN
–90
V
=
±
2.5V, V = 4.5V p-p
SY
IN
–100
–110
10
100
1k
10k
100k
TIME (1s/DIV)
FREQUENCY (Hz)
Figure 37. Total Harmonic Distortion + Noise vs. Frequency
Figure 34. 0.1 Hz to 10 Hz Noise
Rev. B | Page 11 of 20
AD8627/AD8626/AD8625
20k
Ω
2kΩ
2k
Ω
2kΩ
V
IN
–80
–90
–100
–110
–120
–130
–140
–150
–160
V
V
V
= 9V p-p
IN
IN
IN
= 4.5V p-p
= 18V p-p
10
100
1k
FREQUENCY (Hz)
10k
100k
Figure 38. Channel Separation
Rev. B | Page 12 of 20
AD8627/AD8626/AD8625
APPLICATIONS
The AD862x is one of the smallest and most economical
JFETs offered. It has true single-supply capability and has
an input voltage range that extends below the negative rail,
allowing the part to accommodate input signals below ground.
The rail-to-rail output of the AD862x provides the maximum
dynamic range in many applications. To provide a low offset,
low noise, high impedance input stage, the AD862x uses
n-channel JFETs The input common-mode voltage extends
from 0.2 V below –VS to 2 V below +VS. Driving the input of the
amplifier, configured in unity gain buffer, closer than 2 V to the
positive rail causes an increase in common-mode voltage error,
as illustrated in Figure 15, and a loss of amplifier bandwidth.
This loss of bandwidth causes the rounding of the output
waveforms shown in Figure 39 and Figure 40, which have inputs
that are 1 V and 0 V from +VS, respectively.
V
= 5V
SY
INPUT
OUTPUT
TIME (2µs/DIV)
Figure 39. Unity Gain Follower Response to 0 V to 4 V Step
The AD862x will not experience phase reversal with input
signals close to the positive rail, as shown in Figure 29. For input
voltages greater than +VSY, a resistor in series with the AD862x’s
noninverting input prevents phase reversal at the expense of
greater input voltage noise. This current limiting resistor should
also be used if there is a possibility of the input voltage
V
= 5V
SY
INPUT
exceeding the positive supply by more than 300 mV, or if an
input voltage is applied to the AD862x when VSY = 0. Either of
these conditions will damage the amplifier if the condition
exists for more than 10 seconds. A 100 kΩ resistor allows the
amplifier to withstand up to 10 V of continuous overvoltage,
while increasing the input voltage noise by a negligible amount.
OUTPUT
TIME (2µs/DIV)
Figure 40. Unity Gain Follower Response to 0 V to 5 V Step
Rev. B | Page 13 of 20
AD8627/AD8626/AD8625
The AD862x can safely withstand input voltages 15 V below
20kΩ
VSY if the total voltage between the positive supply and the input
terminal is less than 26 V. Figure 41 through Figure 43 show the
AD862x in different configurations accommodating signals
close to the negative rail. The amplifier input stage typically
maintains picoamp-level input currents across that input
voltage range.
+5V
10k
0V
Ω
–10mV
–30mV
V
= 5V
SY
20k
Ω
+5V
10kΩ
0V
–2.5V
V
= 5V, 0V
SY
TIME (2µs/DIV)
Figure 43. Gain of Two Inverter Response to 20 mV Step,
Centered 20 mV below Ground
The AD862x is designed for 16 nV/√Hz wideband input voltage
noise and maintains low noise performance to low frequencies,
as shown in Figure 35. This noise performance, along with the
AD862x’s low input current and current noise, means that the
AD862x contributes negligible noise for applications with large
source resistances.
TIME (2µs/DIV)
Figure 41. Gain of Two Inverter Response to 2.5 V Step,
Centered –1.25 V below Ground
The AD862x has a unique bipolar rail-to-rail output stage that
swings within 5 mV of the rail when up to 2 mA of current is
drawn. At larger loads, the drop-out voltage increases as shown
in Figure 17 and Figure 18. The AD862x’s wide bandwidth and
fast slew rate allows it to be used with faster signals than previous
single-supply JFETs. Figure 44 shows the response of AD862x,
configured in unity gain, to a VIN of 20 V p-p at 50 kHz. The
FPBW of the part is close to 100 kHz.
60mV
5V
20mV
0V
600
Ω
V
R
=
±
13V
Ω
SY
= 600
L
V
R
= 5V
SY
= 600
Ω
L
TIME (2µs/DIV)
TIME (5µs/DIV)
Figure 42. Unity Gain Follower Response to 40 mV Step,
Centered 40 mV above Ground
Figure 44. Unity Gain Follower Response to 20 V, 50 kHz Input Signal
Rev. B | Page 14 of 20
AD8627/AD8626/AD8625
MINIMIZING INPUT CURRENT
The resulting output voltage error, VE, is equal to
The AD862x is guaranteed to 1 pA max input current with a
13 V supply voltage at room temperature. Careful attention to
how the amplifier is used will maintain or possibly better this
performance. The amplifier’s operating temperature should be
kept as low as possible. Like other JFET input amplifiers, the
AD862x’s input current doubles for every 10°C rise in junction
temperature, as illustrated in Figure 8. On-chip power dissipation
raises the device operating temperature, causing an increase in
input current. Reducing supply voltage to cut power dissipation
reduces the AD862x’s input current. Heavy output loads can
also increase chip temperature; maintaining a minimum load
resistance of 1 kΩ is recommended.
Rf
⎛
⎜
⎝
⎞
⎜
⎟
VOS + Rf(IB )
VE = 1+
⎟
RD
⎠
A shunt resistance on the order of 100 MΩ is typical for a small
photodiode. Resistance RD is a junction resistance that typically
drops by a factor of two for every 10°C rise in temperature. In
the AD862x, both the offset voltage and drift are low, which
helps minimize these errors. With IB values of 1 pA and VOS of
50 mV, VE for Figure 45 is very negligible. Also, the circuit in
Figure 45 results in an SNR value of 95 dB for a signal bandwidth
of 30 kHz.
C
5pF
F
The AD862x is designed for mounting on PC boards.
Maintaining picoampere resolution in those environments
requires a lot of care. Both the board and the amplifier’s
package have finite resistance. Voltage differences between the
input pins and other pins as well as PC board metal traces may
cause parasitic currents larger than the AD862x’s input current,
unless special precautions are taken. For proper board layout
to ensure the best result, refer to the ADI website for proper
layout seminar material. Two common methods of minimizing
parasitic leakages that should be used are guarding of the input
lines and maintaining adequate insulation resistance.
R
PHOTODIODE
1.5MFΩ
V
OS
OUTPUT
C4
15pF
R
I
I
B
D
B
AD8627
100MΩ
Figure 45. A Photodiode Model Showing DC Error
OUTPUT AMPLIFIER FOR DIGITAL-TO-ANALOG
CONVERTERS
Contaminants such as solder flux on the board’s surface and the
amplifier’s package can greatly reduce the insulation resistance
between the input pin and traces with supply or signal voltages.
Both the package and the board must be kept clean and dry.
Many system designers use amplifiers as buffers on the output
of amplifiers to increase the DAC’s output driving capability.
The high resolution current output DACs need high precision
amplifiers on their output as current to voltage converters (I/V).
Additionally, many DACs operate with a single supply of 5 V. In
a single-supply application, selection of a suitable op amp may
be more difficult because the output swing of the amplifier does
not usually include the negative rail, in this case AGND. This
can result in some degradation of the DAC’s specified perform-
ance unless the application does not use codes near zero. The
selected op amp needs to have very low offset voltage—for a
14-bit DAC, the DAC LSB is 300 µV with a 5 V reference—to
eliminate the need for output offset trims. Input bias current
should also be very low because the bias current multiplied by
the DAC output impedance (about 10 kΩ in some cases) adds
to the zero code error. Rail-to-rail input and output performance
is desired. For fast settling, the slew rate of the op amp should
not impede the settling time of the DAC. Output impedance of
the DAC is constant and code independent, but in order to
minimize gain errors, the input impedance of the output
amplifier should be as high as possible. The AD862x, with very
high input impedance, IB of 1 pA, and fast slew rate, is an ideal
amplifier for these types of applications. A typical configuration
with a popular DAC is shown in Figure 46. In these situations,
the amplifier adds another time constant to the system, increasing
the settling time of the output. The AD862x, with 5 MHz of BW,
helps in achieving a faster effective settling time of the combined
DAC and amplifier.
PHOTODIODE PREAMPLIFIER APPLICATION
The low input current and offset voltage levels of the AD862x,
together with its low voltage noise, make this amplifier an
excellent choice for preamplifiers used in sensitive photodiode
applications. In a typical photovoltaic preamp circuit, shown in
Figure 45, the output of the amplifier is equal to
VOUT = −ID(Rf) = −Rp(P)Rf
where:
ID = photodiode signal current (A)
Rp = photodiode sensitivity (A/W)
Rf = value of the feedback resistor, in Ω
P = light power incident to photodiode surface, in W
The amplifier’s input current, IB, contributes an output voltage
error proportional to the value of the feedback resistor. The
offset voltage error, VOS, causes a small current error due to the
photodiode’s finite shunt resistance, RD.
Rev. B | Page 15 of 20
AD8627/AD8626/AD8625
2.5V
5V
10µF
EIGHT-POLE SALLEN KEY LOW-PASS FILTER
0.1µF
0.1µF
The AD862x’s high input impedance and dc precision make it a
great selection for active filters. Due to the very low bias current
of the AD862x, high value resistors can be used to construct low
frequency filters. The AD862x’s picoamp-level input currents
contribute minimal dc errors. Figure 49 shows an example, a
10 Hz, 8-pole Sallen Key filter constructed using the AD862x.
Different numbers of the AD862x can be used depending on
the desired response, which is shown in Figure 48. The high
value used for R1 minimizes interaction with signal source
resistance. Pole placement in this version of the filter minimizes
the Q associated with the lower pole section of the filter. This
eliminates any peaking of the noise contribution of resistors in
the preceding sections, minimizing the inherent output voltage
noise of the filter.
5V
SERIAL
INTERFACE
V
V
*
V
*
REFS
DD
REFF
CS
AD8627
DIN
UNIPOLAR
OUTPUT
OUT
AD5551/AD5552
SCLK
LDAC*
DGND
AGND
*AD5552 ONLY
Figure 46. Unipolar Output
In applications with full 4-quadrant multiplying capability or a
bipolar output swing, the circuit in Figure 47 can be used. In
this circuit, the first and second amplifiers provide a total gain
of 2, which increases the output voltage span to 20 V. Biasing the
external amplifier with a 10 V offset from the reference voltage
results in a full 4-quadrant multiplying circuit.
1.2
V4
V2
10k
Ω
V3
0.8
10k
Ω
+13V
V1
10V
VREF
ADR01
1/2
V
OUT
AD8626
5kΩ
0.4
–10V < V
< +10V
OUT
–13V
V
V
X
R X
FB
DD
REF
0
0.1
1
10
100
1k
ONE CHANNEL
AD5544
FREQUENCY (Hz)
1/2
AD8626
Figure 48. Frequency Response Output at Different Stages
of the Low-Pass Filter
V
A
F
A X
GND
SS
GND
DIGITAL INTERFACE CONNECTIONS
OMITTED FOR CLARITY
Figure 47. 4-Quadrant Multiplying Application Circuit
Rev. B | Page 16 of 20
AD8627/AD8626/AD8625
C1
100
µ
F
R1
162.3k
Ω
V
V3
DD
U1
R2
162.3k
Ω
V
C3
100
IN
4
R10
191.4k
3
2
µ
F
Ω
V1
1
D
1/4
R5
191.4kΩ
C2
R11
286.5kΩ
AD8625
11
U2
C5
100
96.19µ
F
µ
F
V
V2
EE
D
1/4
AD8625
R3
25k
C4
69.14µF
R7
286.5k
Ω
C7
100µF
Ω
R12
815.8k
U3
Ω
D
V3
R4
R9
25k
Ω
815.8kΩ
U4
1/4
AD8625
C6
30.86
µF
V4
D
1/4
AD8625
C8
3.805µF
R6
25k
Ω
D
R8
25kΩ
Figure 49. 10 Hz, 8-Pole Sallen Key Low-Pass Filter
Rev. B | Page 17 of 20
AD8627/AD8626/AD8625
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
2.00 BSC
14
1
8
7
5
1
4
3
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
1.25 BSC
2.10 BSC
2
PIN 1
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
0.65 BSC
1.10 MAX
1.75 (0.0689)
1.35 (0.0531)
× 45°
1.00
0.90
0.70
0.25 (0.0098)
0.10 (0.0039)
0.22
0.08
8°
0°
0.46
0.36
0.26
0.51 (0.0201)
0.31 (0.0122)
SEATING
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
8°
4°
0°
PLANE
0.30
0.15
0.10 M
AX
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AA
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 50. 5-Lead Plastic Surface-Mount Package [SC70]
(KS-5)
Figure 53. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
5.10
5.00
4.90
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
14
8
7
4.50
4.40
4.30
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
6.40
BSC
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
1
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
PIN 1
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
0.65
BSC
1.05
1.00
0.80
0.20
0.09
1.20
MAX
COMPLIANT TO JEDEC STANDARDS MS-012AA
0.75
0.60
0.45
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8°
0°
0.15
0.05
0.30
0.19
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 51. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
3.00
BSC
8
5
4
4.90
BSC
3.00
BSC
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.80
0.60
0.40
8°
0°
0.38
0.22
0.23
0.08
COPLANARITY
0.10
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 52. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. B | Page 18 of 20
AD8627/AD8626/AD8625
ORDERING GUIDE
Model
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
Package Option
Branding
B9A
B9A
AD8627AKS-REEL
AD8627AKS-REEL7
AD8627AKS-R2
AD8627AR
AD8627AR-REEL
AD8627AR-REEL7
AD8626ARM-REEL
AD8626ARM-R2
AD8626AR
AD8626AR-REEL
AD8626AR-REEL7
AD8625ARU
AD8625ARU-REEL
AD8625AR
5-Lead SC70
5-Lead SC70
5-Lead SC70
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
KS-5
KS-5
KS-5
R-8
R-8
R-8
RM-8
RM-8
R-8
R-8
R-8
RU-14
RU-14
R-14
R-14
R-14
B9A
BJA
BJA
AD8625AR-REEL
AD8625AR-REEL7
Rev. B | Page 19 of 20
AD8627/AD8626/AD8625
NOTES
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C03023-0-1/04(B)
Rev. B | Page 20 of 20
相关型号：
©2020 ICPDF网 联系我们和版权申明