AD8631ARTZ-REEL7 [ADI]
IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier;
| 型号： | AD8631ARTZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier 放大器 光电二极管 |
| 文件： | 总12页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1.8 V, 5 MHz Rail-to-Rail
Low Power Operational Amplifiers
a
AD8631/AD8632
PIN CONFIGURATIONS
5-Lead SOT-23
FEATURES
Single Supply Operation: 1.8 V to 6 V
Space-Saving SOT-23, SOIC Packaging
Wide Bandwidth: 5 MHz @ 5 V, 4 MHz @ 1.8 V
Low Offset Voltage: 4 mV Max, 0.8 mV typ
Rail-to-Rail Input and Output Swing
2 V/s Slew Rate @ 1.8 V
(RT Suffix)
AD8631
OUT A
V–
1
2
5
4
V+
+IN A
3
–IN A
Only 225 A Supply Current @ 1.8 V
APPLICATIONS
Portable Communications
Portable Phones
Sensor Interface
8-Lead SOIC
(R Suffix)
Active Filters
PCMCIA Cards
1
8
7
6
5
OUT A
V+
–IN A
2
3
4
OUT B
–IN B
+IN B
ASIC Input Drivers
Wearable Computers
Battery-Powered Devices
New Generation Phones
Personal Digital Assistants
AD8632
+IN A
V–
8-Lead SOIC
(RM Suffix)
GENERAL DESCRIPTION
The AD8631 brings precision and bandwidth to the SOT-23-5
package at single supply voltages as low as 1.8 V and low supply
current. The small package makes it possible to place the AD8631
next to sensors, reducing external noise pickup.
8
1
OUT A
–IN A
+IN A
V–
V+
OUT B
–IN B
+IN B
AD8632
5
4
The AD8631 and AD8632 are rail-to-rail input and output bipolar
amplifiers with a gain bandwidth of 4 MHz and typical voltage
offset of 0.8 mV from a 1.8 V supply. The low supply current and
the low supply voltage makes these parts ideal for battery-powered
applications. The 3 V/µs slew rate makes the AD8631/AD8632 a
good match for driving ASIC inputs, such as voice codecs.
The AD8631/AD8632 is specified over the extended industrial
(–40؇C to +125؇C) temperature range. The AD8631 single is
available in 5-lead SOT-23 surface-mount packages. The dual
AD8632 is available in 8-lead SOIC and µSOIC packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2000
AD8631/AD8632–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (VS = 5 V, V– = 0 V, VCM = 2.5 V, TA = 25؇C unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
0.8
4.0
6
250
500
150
550
5
mV
mV
nA
nA
nA
nA
V
–40؇C ≤ TA ≤ +125؇C
–40؇C ≤ TA ≤ +125؇C
–40؇C ≤ TA ≤ +125؇C
Input Bias Current
Input Offset Current
IOS
Input Voltage Range
VCM
0
Common-Mode Rejection Ratio
CMRR
0 V ≤ VCM ≤ 5 V,
63
56
70
dB
dB
V/mV
V/mV
V/mV
µV/؇C
pA/؇C
–40؇C ≤ TA ≤ +125؇C
Large Signal Voltage Gain
AVO
RL = 10 kΩ, 0.5 V < VOUT < 4.5 V
RL = 100 kΩ, 0.5 V < VOUT < 4.5 V
RL = 100 kΩ, –40؇C ≤ TA ≤ +125؇C
25
400
100
100
Offset Voltage Drift
Bias Current Drift
∆VOS/∆T
∆IB/∆T
3.5
400
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
VOL
ISC
IL = 100 µA
–40؇C ≤ TA ≤ +125؇C
IL = 1 mA
4.965
4.7
V
V
Output Voltage Swing Low
Short Circuit Current
IL = 100 µA
–40؇C ≤ TA ≤ +125؇C
IL = 1 mA
35
200
mV
mV
mA
Short to Ground, Instantaneous
10
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = 2.2 V to 6 V,
–40؇C ≤ TA ≤ +125؇C
VOUT = 2.5 V
75
72
90
dB
dB
µA
µA
Supply Current/Amplifier
300
450
650
–40؇C ≤ TA ≤ +125؇C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
SR
GBP
TS
1 V < VOUT < 4 V, RL = 10 kΩ
3
5
860
V/µs
MHz
ns
0.1%
Phase Margin
φm
53
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
0.8
23
1.7
µV p-p
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–2–
REV. 0
AD8631/AD8632
(V = 2.2 V, V– = 0 V, VCM = 1.1 V, TA = 25؇C unless otherwise noted)
ELECTRICAL CHARACTERISTICS
S
Parameter
Symbol
Conditions
Min
Typ Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
0.8
4.0
6
250
mV
mV
nA
–40؇C ≤ TA ≤ +125؇C
Input Bias Current
IB
Input Offset Current
IOS
150
nA
Input Voltage Range
Common-Mode Rejection Ratio
VCM
CMRR
0
54
47
2.2
V
dB
dB
V/mV
0 V ≤ VCM ≤ 2.2 V,
70
–40؇C ≤ TA ≤ +125؇C
RL = 10 kΩ, 0.5 V < VOUT < 1.7 V
RL = 100 kΩ
Large Signal Voltage Gain
AVO
25
200
50
V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
VOL
IL = 100 µA
IL = 750 µA
IL = 100 µA
IL = 750 µA
2.165
1.9
V
V
mV
mV
Output Voltage Swing Low
35
200
POWER SUPPLY
Supply Current/Amplifier
ISY
VOUT = 1.1 V
–40؇C ≤ TA ≤ +125؇C
250
350
500
µA
µA
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
φm
RL = 10 kΩ
2.5
4.3
50
V/µs
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
en
in
f = 1 kHz
f = 1 kHz
23
1.7
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
REV. 0
–3–
AD8631/AD8632–SPECIFICATIONS
(V = 1.8 V, V– = 0 V, VCM = 0.9 V, TA = 25؇C unless otherwise noted)
ELECTRICAL CHARACTERISTICS
S
Parameter
Symbol
Conditions
Min
Typ Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
0.8
4.0
6
250
150
1.8
mV
mV
nA
nA
V
0؇C ≤ TA ≤ 125؇C
Input Bias Current
Input Offset Current
Input Voltage Range
IB
IOS
VCM
0
Common-Mode Rejection Ratio
CMRR
0 V ≤ VCM ≤ 1.8 V,
0؇C ≤ TA ≤ 125؇C
49
40
65
20
200
dB
V/mV
V/mV
Large Signal Voltage Gain
AVO
RL = 10 kΩ, 0.5 V < VOUT < 1.3 V
RL = 100 kΩ, 0.5 V < VOUT < 1.3 V
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
VOL
IL = 100 µA
IL = 750 µA
IL = 100 µA
IL = 750 µA
1.765
1.5
V
V
mV
mV
Output Voltage Swing Low
35
200
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = 1.7 V to 2.2 V,
0؇C ≤ TA ≤ 125؇C
VOUT = 0.9 V
68
65
86
dB
dB
µA
µA
Supply Current/Amplifier
225
325
450
0؇C ≤ TA ≤ 125؇C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
SR
GBP
RL = 10 kΩ
2
4
V/µs
MHz
Phase Margin
φm
49
Degrees
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
en
in
f = 1 kHz
f = 1 kHz
23
1.7
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–4–
REV. 0
AD8631/AD8632
ABSOLUTE MAXIMUM RATINGS1
1
Package Type
JA
JC
Unit
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 0.6 V
Internal Power Dissipation
5-Lead SOT-23 (RT)
8-Lead SOIC (R)
8-Lead µSOIC (RM)
230
158
210
146
43
45
؇C/W
؇C/W
؇C/W
SOT-23 (RT) . . . . . . . . . . . . See Thermal Resistance Chart
SOIC (R) . . . . . . . . . . . . . . . See Thermal Resistance Chart
µSOIC (RM) . . . . . . . . . . . . See Thermal Resistance Chart
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
NOTE
1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for SOT-23 and SOIC packages.
R, RM, and RT Packages . . . . . . . . . . . . . –65؇C to +150؇C
Operating Temperature Range
AD8631, AD8632 . . . . . . . . . . . . . . . . . . –40؇C to +125؇C
Junction Temperature Range
R, RM, and RT Packages . . . . . . . . . . . . . –65؇C to +150؇C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300؇C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
2For supply voltages less than 6 V the input voltage is limited to the supply voltage.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
Brand
AD8631ART1 –40؇C to +125؇C
5-Lead SOT-23 RT-5
AEA
AD8632AR
–40؇C to +125؇C
8-Lead SOIC
8-Lead µSOIC
SO-8
RM-8
AD8632ARM2 –40؇C to +125؇C
AGA
NOTES
1Available in 3,000-piece reels only.
2Available in 2,500-piece reels only.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8631/AD8632 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
120
90
60
30
0
350
325
V
= 5V
= 2.5V
= 25؇C
S
V
T
= 25؇C
CM
A
A
T
COUNT = 1,133 OP AMPS
300
275
250
225
200
–4
–3
–2
–1
0
1
2
3
4
2
3
4
5
6
1
INPUT OFFSET VOLTAGE – mV
SUPPLY VOLTAGE – V
Figure 1. Input Offset Voltage Distribution
Figure 2. Supply Current per Amplifier vs. Supply Voltage
REV. 0
–5–
– Typical Characteristics
AD8631/AD8632
40
30
500
V
T
= 5V
= 25؇C
V
= 5V
S
A
S
GAIN
450
20
90
400
350
300
250
200
10
PHASE
45
0
0
؊45
؊90
؊10
؊20
؊30
؊40
0
25
50
75
100
125
100k
1M
10M
100M
؊25
؊50
FREQUENCY – Hz
TEMPERATURE – ؇C
Figure 3. Supply Current per Amplifier vs. Temperature
Figure 6. Open-Loop Gain vs. Frequency
150
50
40
V
T
= ؎2.5V
= 25؇C
S
V
T
=
2.5V
S
A
A
= 25؇C
100
50
30
20
10
0
0
؊50
؊100
؊150
؊10
؊20
؊30
؊40
؊3
؊2
؊1
0
1
2
3
10
100
1k
10k
100k
1M
10M
100M
COMMON-MODE VOLTAGE – V
FREQUENCY – Hz
Figure 4. Input Bias Current vs. Common-Mode Voltage
Figure 7. Closed-Loop Gain vs. Frequency
140
0
T
= 25؇C
V
T
= ؎2.5V
= 25؇C
A
S
A
120
100
80
60
40
20
0
20
40
60
SOURCE
80
100
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
FREQUENCY – Hz
LOAD CURRENT – A
Figure 5. Output Voltage to Supply Rail vs. Load Current
Figure 8. CMRR vs. Frequency
–6–
REV. 0
AD8631/AD8632
60
50
40
30
20
10
0
0
V
T
= ؎2.5V
= 25؇C
V
T
= 5V
= 25؇C
S
S
A
A
20
؊PSRR
40
60
؉PSRR
A
= +10
V
80
A
= +1
V
100
120
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 9. PSRR vs. Frequency
Figure 12. Output Impedance vs. Frequency
60
50
50
V
V
R
= 5V
S
V
T
=5V
= 25؇C
S
A
= 2.5V
= 10k⍀
= 25؇C
= ؎50mV
= +1
CM
L
40
30
20
10
0
T
A
؊OS
V
IN
A
40
30
20
V
+OS
10
0
100
10
10
100
FREQUENCY – Hz
1k
10k
CAPACITANCE – pF
Figure 10. Overshoot vs. Capacitance Load
Figure 13. Voltage Noise Density vs. Frequency
6
5
V
A
R
= 5V
= +1
= 10k⍀
= 25؇C
= 15pF
S
DISTORTION 3%
V
T
= 5V
= 25؇C
S
A
V
L
5
4
3
2
4
T
A
C
L
3
2
1
0
1
0
1M
10k
100k
FREQUENCY – Hz
10
100
FREQUENCY – Hz
1k
10k
Figure 11. Output Swing vs. Frequency
Figure 14. Current Noise Density vs. Frequency
REV. 0
–7–
AD8631/AD8632
0
0
0
0
0
0
0
0
0
0
V
= ؎2.5V
= 25؇C
V
A
= ؎2.5V
= +1
= 25؇C
= 33pF
= 10k⍀
S
S
T
A
V
T
A
C
R
L
L
0
0
0
0
0
0
0
TIME – 1s/DIV
TIME – 250ns/DIV
Figure 15. 0.1 Hz to 10 Hz Noise
Figure 17. Small Signal Transient Response
0
0
V
= ؎2.5V
= 1
= SINE WAVE
= 25؇C
V
A
= ؎2.5V
= +1
= 25؇C
= 100pF
= 10k⍀
S
S
A
V
V
V
T
IN
A
A
C
R
T
L
L
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIME – 200s/DIV
TIME – 500ns/DIV
Figure 16. No Phase Reversal
Figure 18. Large Signal Transient Response
THEORY OF OPERATION
configuration. The output swing when sinking or sourcing 100 µA
The AD863x is a rail-to-rail operational amplifier that can operate
at supply voltages as low as 1.8 V. This family is fabricated using
Analog Devices’ high-speed complementary bipolar process, also
called XFCB. The process trench isolates each transistor to mini-
mize parasitic capacitance, thereby allowing high-speed perfor-
mance. Figure 19 shows a simplified schematic of the AD863x
family.
is 35 mV maximum from each rail.
The input bias current characteristics depend on the common-
mode voltage (see Figure 4). As the input voltage reaches about
1 V below VCC, the PNP pair (Q3 and Q4) turns off.
The 1 kΩ input resistor R1 and R2, together with the diodes D7
and D8, protect the input pairs against avalanche damage.
The AD863x family exhibits no phase reversal as the input signal
exceeds the supply by more than 0.6 V. Excessive current can flow
through the input pins via the ESD diodes D1-D2 or D3-D4, in the
event their ~0.6 V thresholds are exceeded. Such fault currents must
be limited to 5 mA or less by the use of external series resistance(s).
The input stage consists of two parallel complementary differen-
tial pair: one NPN pair (Q1 and Q2) and one PNP pair (Q3 and
Q4). The voltage drops across R7, R8, R9, and R10 are kept low
for rail-to-rail operation. The major gain stage of the op amp is a
double-folded cascode consisting of transistors Q5, Q6, Q8, and
Q9. The output stage, which also operates rail-to-rail, is driven by
Q14. The transistors Q13 and Q10 act as level-shifters to give
more headroom during 1.8 V operation.
LOW VOLTAGE OPERATION
Battery Voltage Discharge
The AD8631 operates at supply voltages as low as 1.8 V. This
amplifier is ideal for battery-powered applications since it can
operate at the end of discharge voltage of most popular batteries.
Table I lists the Nominal and End-of-Discharge Voltages of
several typical batteries.
As the voltage at the base of Q13 increases, Q18 starts to sink
current. When the voltage at the base of Q13 decreases I8 flows
through D16 and Q15 increasing the VBE of Q17, then Q20
sources current.
The output stage also furnishes gain, which depends on the load
resistance, since the output transistors are in common emitter
–8–
REV. 0
AD8631/AD8632
V
V
CC
CC
R7
R8
R14
Q19
Q20
Q6
I1
D1
ESD
R1
Q7
Q5
I7
I8
D3
ESD
C4
D9
R3
Q3
R4
Q4
I3
Q1
Q2
؊IN
؉IN
Q14
R2
D7
D8
Q11
V
OUT
R5
R6
Q10
C3
Q13
C1
Q8
D4
ESD
Q9
C2
Q18
D2
ESD
I2
Q17
R11
D16
R13
D6
Q15
R12
I4
I5
I6
R9
R10
V
EE
V
EE
Figure 19. Simplified Schematic
Table I. Typical Battery Life Voltage Range
The rail-to-rail feature of the AD8631 can be observed over the
supply voltage range, 1.8 V to 5 V. Traces are shown offset for
clarity.
Nominal
End-of-Voltage
Discharge (V)
Battery
Voltage (V)
INPUT BIAS CONSIDERATION
Lead-Acid
Lithium
NiMH
NiCd
Carbon-Zinc
2
1.8
1.7–2.4
1
1
The input bias current (IB) is a non-ideal, real-life parameter that
affects all op amps. IB can generate a somewhat significant offset
voltage. This offset voltage is created by IB when flowing through
the negative feedback resistor RF. If IB is 250 nA (worst case), and
RF is 100 kΩ, the corresponding generated offset voltage is 25 mV
(VOS = IB ꢀ RF).
2.6–3.6
1.2
1.2
1.5
1.1
RAIL-TO-RAIL INPUT AND OUTPUT
Obviously the lower the RF the lower the generated voltage offset.
Using a compensation resistor, RB, as shown in Figure 21, can
minimize this effect. With the input bias current minimized we
still need to be aware of the input offset current (IOS) which will
generate a slight offset error. Figure 21 shows three different
configurations to minimize IB-induced offset errors.
The AD8631 features an extraordinary rail-to-rail input and
output with supply voltages as low as 1.8 V. With the amplifier’s
supply set to 1.8 V, the input can be set to 1.8 V p-p, allowing the
output to swing to both rails without clipping. Figure 20 shows a
scope picture of both input and output taken at unity gain, with a
frequency of 1 kHz, at VS = 1.8 V and VIN = 1.8 V p-p.
R
F
V
V
= 1.8V
= 1.8V p-p
S
IN
R
I
V
I
V
OUT
AD8631
V
IN
INVERTING CONFIGURATION
R
F
R
= R R
I F
B
ԽԽ
R
I
V
OUT
V
OUT
AD8631
NONINVERTING CONFIGURATION
V
I
R
= R
R
F
B
IԽԽ
R
= R
S
F
TIME – 200s/Div
V
OUT
AD8631
Figure 20. Rail-to-Rail Input Output
V
UNITY GAIN BUFFER
I
R
S
Figure 21. Input Bias Cancellation Circuits
REV. 0
–9–
AD8631/AD8632
DRIVING CAPACITIVE LOADS
Capacitive Load vs. Gain
90kHz INPUT SIGNAL
= 1
A
V
Most amplifiers have difficulty driving capacitance due to degra-
dation of phase margin caused by additional phase lag from the
capacitive load. Higher capacitance at the output can increase the
amount of overshoot and ringing in the amplifier’s step response
and could even affect the stability of the device. The value of
capacitive load that an amplifier can drive before oscillation varies
with gain, supply voltage, input signal, temperature, among oth-
ers. Unity gain is the most challenging configuration for driving
capacitive load. However, the AD8631 offers reasonably good
capacitive driving ability. Figure 22 shows the AD8631’s ability to
drive capacitive loads at different gains before instability occurs.
This graph is good for all VSY.
C = 600pF
TIME – 2s/DIV
1M
Figure 24. Driving Capacitive Loads without Compensation
UNSTABLE
100k
By connecting a series R–C from the output of the device to
ground, known as the “snubber” network, this ringing and over-
shoot can be significantly reduced. Figure 25 shows the network
setup, and Figure 26 shows the improvement of the output
response with the “snubber” network added.
10k
1k
5V
STABLE
100
V
AD8631
OUT
V
C
10
IN
R
L
X
1
2
3
4
5
6
7
8
9
10
GAIN – V/V
C
X
Figure 22. Capacitive Load vs. Gain
Figure 25. Snubber Network Compensation for Capacitive
Loads
In-the-Loop Compensation Technique for Driving
Capacitive Loads
When driving capacitance in low gain configuration, the in-the-loop
compensation technique is recommended to avoid oscillation as is
illustrated in Figure 23.
90kHz INPUT SIGNAL
V
C = 600pF
A
= 1
R
R
G
F
V
IN
C
F
R
X
V
AD8631
OUT
C
L
R
R
F
O
G
R
=
WHERE R = OPEN-LOOP OUTPUT RESISTANCE
O
X
R
R
+ R
G
1
F
C
=
1 +
C R
L O
TIME – 2s/DIV
F
[
[
R
A
F
CL
Figure 26. Photo of a Square Wave with the Snubber
Network Compensation
Figure 23. In-the-Loop Compensation Technique for
Driving Capacitive Loads
The network operates in parallel with the load capacitor, CL,
and provides compensation for the added phase lag. The actual
values of the network resistor and capacitor have to be empirically
determined. Table II shows some values of snubber network for
large capacitance load.
Snubber Network Compensation for Driving Capacitive Loads
As load capacitance increases, the overshoot and settling time
will increase and the unity gain bandwidth of the device will
decrease. Figure 24 shows an example of the AD8631 in a non-
inverting configuration driving a 10 kΩ resistor and a 600 pF
capacitor placed in parallel, with a square wave input set to a
frequency of 90 kHz and unity gain.
–10–
REV. 0
AD8631/AD8632
Table II. Snubber Network Values for Large Capacitive Loads
A MICROPOWER REFERENCE VOLTAGE GENERATOR
Many single-supply circuits are configured with the circuit biased
to one-half of the supply voltage. In these cases, a false-ground
reference can be created by using a voltage divider buffered by an
amplifier. Figure 28 shows the schematic for such a circuit.
CLOAD
Rx
Cx
600 pF
1 nF
10 nF
300 Ω
300 Ω
90 Ω
1 nF
1 nF
8 nF
The two 1 MΩ resistors generate the reference voltages while
drawing only 0.9 µA of current from a 1.8 V supply. A capacitor
connected from the inverting terminal to the output of the op
amp provides compensation to allow a bypass capacitor to be
connected at the reference output. This bypass capacitor helps
establish an ac ground for the reference output.
TOTAL HARMONIC DISTORTION + NOISE
The AD863x family offers a low total harmonic distortion, which
makes this amplifier ideal for audio applications. Figure 27 shows
a graph of THD + N, which is ~0.02% @ 1 kHz, for a 1.8 V supply.
At unity gain in an inverting configuration the value of the Total
Harmonic Distortion + Noise stays consistently low over all volt-
ages supply ranges.
1.8V TO 5V
10k⍀
0.022F
10
INVERTING
A
= 1
V
100⍀
1
V
REF
0.9V TO 2.5V
1M⍀
1M⍀
AD8631
1F
1F
0.1
V
= 1.8V
S
Figure 29. A Micropower Reference Voltage Generator
0.01
V
= 5V
S
MICROPHONE PREAMPLIFIER
The AD8631 is ideal to use as a microphone preamplifier.
Figure 30 shows this implementation.
0.001
10
100
1k
10k 20k
FREQUENCY – Hz
R3
220k⍀
Figure 27. THD + N vs. Frequency Graph
AD8632 Turn-On Time
1.8V
1.8V
R1
C1
The low voltage, low power AD8632 features an extraordinary turn
on time. This is about 500 ns for VSY = 5 V, which is impressive
considering the low supply current (300 µA typical per amplifier).
Figure 28 shows a scope picture of the AD8632 with both channels
configured as followers. Channel A has an input signal of 2.5 V and
channel B has the input signal at ground. The top waveform shows
the supply voltage and the bottom waveform reflects the response
of the amplifier at the output of Channel A.
R2
2.2k⍀
0.1F
22k⍀
V
IN
V
OUT
AD8631
ELECTRET
MIC
R3
R2
A
=
V
V
= 0.9V
REF
Figure 30. A Microphone Preamplifier
0
R1 is used to bias an electret microphone and C1 blocks dc voltage
from the amplifier. The magnitude of the gain of the amplifier is
approximately R3/R2 when R2 ≥ 10 ꢀ R1. VREF should be equal to
1/2 ꢀ 1.8 V for maximum voltage swing.
V
A
= 5V
= 1
= 2.5V STEP
S
0
V
V
IN
Direct Access Arrangement for Telephone Line Interface
Figure 31 illustrates a 1.8 V transmit/receive telephone line interface
for 600 Ω transmission systems. It allows full duplex transmission of
signals on a transformer-coupled 600 Ω line in a differential manner.
Amplifier A1 provides gain that can be adjusted to meet the modem
output drive requirements. Both A1 and A2 are configured to apply
the largest possible signal on a single supply to the transformer.
Amplifier A3 is configured as a difference amplifier for two reasons:
(1) It prevents the transmit signal from interfering with the receive
signal and (2) it extracts the receive signal from the transmission line
for amplification by A4. A4’s gain can be adjusted in the same
manner as A1’s to meet the modem’s input signal requirements.
Standard resistor values permit the use of SIP (Single In-line
Package) format resistor arrays. Couple this with the AD8631/
0
0V
0
0
0V
0
0
TIME – 200ns/DIV
Figure 28. AD8632 Turn-On Time
REV. 0
–11–
AD8631/AD8632
AD8632’s 5-lead SOT-23, 8-lead µSOIC, and 8-lead SOIC
SPICE Model
footprint and this circuit offers a compact solution.
The SPICE model for the AD8631 amplifier is available and
can be downloaded from the Analog Devices’ web site at
http://www.analog.com. The macro-model accurately simulates
a number of AD8631 parameters, including offset voltage, input
common-mode range, and rail-to-rail output swing. The output
voltage versus output current characteristics of the macro-model
is identical to the actual AD8631 performance, which is a critical
feature with a rail-to-rail amplifier model. The model also accurately
simulates many ac effects, such as gain-bandwidth product, phase
margin, input voltage noise, CMRR and PSRR versus frequency,
and transient response. Its high degree of model accuracy makes the
AD8631 macro-model one of the most reliable and true-to-life
models available for any amplifier.
P1
Tx GAIN
ADJUST
R2
9.09k⍀
C1
0.1F
TRANSMIT
TxA
R1
10k⍀
TO TELEPHONE
LINE
2k⍀
R3
360⍀
2
3
1
1:1
A1
R5
10k⍀
6.2V
6.2V
Z
O
600⍀
+1.8V DC
T1
MIDCOM
671-8005
R6
10k⍀
6
5
R7
10k⍀
7
A2
R8
10k⍀
10F
R9
10k⍀
R10
10k⍀
P2
Rx GAIN
ADJUST
R13
10k⍀ 14.3k⍀
R14
RECEIVE
RxA
2
3
R11
10k⍀
1
A3
2k⍀
6
C2
0.1F
R12
10k⍀
7
A4
5
A1, A2 = 1/2 AD8632
A3, A4 = 1/2 AD8632
Figure 31. A Single-Supply Direct Access Arrangement
for Modems
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Narrow Body SOIC
(SO-8)
8-Lead SOIC
(RM-8)
0.1968 (5.00)
0.1890 (4.80)
0.122 (3.10)
0.114 (2.90)
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
8
5
4
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
1
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
؋
45؇ 0.0098 (0.25)
0.0040 (0.10)
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.120 (3.05)
0.112 (2.84)
8؇
0؇
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
33؇
0.018 (0.46)
0.008 (0.20)
27؇
0.028 (0.71)
0.016 (0.41)
0.011 (0.28)
0.003 (0.08)
SEATING
PLANE
5-Lead SOT-23
(RT-5)
0.1181 (3.00)
0.1102 (2.80)
5
1
4
3
0.1181 (3.00)
0.1024 (2.60)
0.0669 (1.70)
0.0590 (1.50)
2
PIN 1
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0079 (0.20)
0.0031 (0.08)
0.0512 (1.30)
0.0354 (0.90)
0.0571 (1.45)
0.0374 (0.95)
10؇
0؇
SEATING
PLANE
0.0197 (0.50)
0.0138 (0.35)
0.0059 (0.15)
0.0019 (0.05)
0.0217 (0.55)
0.0138 (0.35)
–12–
REV. 0
相关型号：
AD8632ARM-R2
IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO8, MICRO, SOIC-8, Operational Amplifier
ADI
AD8632ARM-REEL7
IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO8, MICRO, SOIC-8, Operational Amplifier
ADI
AD8632ARMZ-R2
IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO8, MICRO, SOIC-8, Operational Amplifier
ADI
AD8632ARZ-REEL
IC OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDSO8, SOIC-8, Operational Amplifier
ADI
©2020 ICPDF网 联系我们和版权申明