AD8682ARZ-REEL [ADI]

Dual/Quad Low Power, High Speed JFET Operational Amplifiers; 双/四通道,低功耗,高速JFET运算放大器
AD8682ARZ-REEL
型号: AD8682ARZ-REEL
厂家: ADI    ADI
描述:

Dual/Quad Low Power, High Speed JFET Operational Amplifiers
双/四通道,低功耗,高速JFET运算放大器

运算放大器
文件: 总16页 (文件大小:273K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Dual/Quad Low Power, High Speed  
JFET Operational Amplifiers  
AD8682/AD8684  
PIN CONFIGURATIONS  
FEATURES  
Low supply current: 250 μA/amp maximum  
High slew rate: 9 V/μs  
Bandwidth: 3.5 MHz typical  
Low offset voltage: 1 mV maximum @ 25°C  
Low input bias current: 20 pA maximum @ 25°C  
CMRR: 90 dB typical  
OUT A  
–IN A  
+IN A  
V–  
1
2
3
4
8
7
6
5
V+  
AD8682  
OUT B  
–IN B  
+IN B  
TOP VIEW  
(Not to Scale)  
Figure 1. 8-Lead SOIC_N and 8-Lead MSOP  
Fast settling time  
14  
OUT D  
OUT A  
–IN A  
+IN A  
V+  
1
2
3
4
5
6
7
Unity gain stable  
13 –IN D  
12 +IN D  
APPLICATIONS  
11  
V–  
AD8684  
Portable telecommunication  
Low power industrial and instrumentation  
Loop filters  
10 +IN C  
+IN B  
–IN B  
OUT B  
9
8
–IN C  
OUT C  
Active and precision filters  
Integrators  
TOP VIEW  
(Not to Scale)  
Strain gauge amplifiers  
Portable medical instrumentation  
Supply current monitoring  
Figure 2. 14-Lead SOIC_N and 14-Lead TSSOP  
GENERAL DESCRIPTION  
The devices are ideal for portable, low power applications,  
especially with high source impedance. The devices are unity gain  
stable and can drive higher capacity loads (G = 1, noninverting),  
as an example of their excellent dynamic response over a wide  
range of conditions, delivering dc precision performance at low  
quiescent currents.  
The AD8682 and AD8684 are dual and quad low power, precision  
(1 mV) JFET amplifiers featuring excellent speed at low supply  
currents. The slew rate is typically 9 V/μs with a supply current  
under 250 μA per amplifier. These unity-gain stable amplifiers  
have a typical gain bandwidth of 3.5 MHz. The JFET input stage  
ensures bias current is typically a few picoamps and below 125 pA  
maximum over the full temperature operating range.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 
AD8682/AD8684  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
ESD Caution...................................................................................4  
Typical Performance Characteristic................................................5  
Applications Information.............................................................. 10  
High-Side Signal Conditioning ................................................ 10  
Phase Inversion........................................................................... 10  
Active Filters ............................................................................... 10  
Programmable State Variable Filter ......................................... 11  
Outline Dimensions....................................................................... 12  
Ordering Guide .......................................................................... 13  
Applications....................................................................................... 1  
Pin Configurations ........................................................................... 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics............................................................. 3  
Absolute Maximum Ratings............................................................ 4  
Thermal Resistance ...................................................................... 4  
REVISION HISTORY  
10/06—Revision 0: Initial Version  
Rev. 0 | Page 2 of 16  
AD8682/AD8684  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS  
VS = 15.0 V, TA = 25°C, VCM = 0 V, unless otherwise noted.  
Table 1.  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
0.35  
1
mV  
mV  
mV  
mV  
mV  
pA  
pA  
pA  
pA  
V
AD8682: +25°C ≤ TA ≤ +85°C  
AD8684: +25°C ≤ TA ≤ +85°C  
AD8682: −40°C ≤ TA ≤ +25°C  
AD8684: −40°C ≤ TA ≤ +25°C  
2.5  
3.5  
3
4
Input Bias Current  
IB  
6
20  
125  
20  
100  
+15  
−40°C ≤ TA ≤ +85°C  
−40°C ≤ TA ≤ +85°C  
Input Offset Current  
IOS  
Input Voltage Range  
Common-Mode Rejection Ratio  
Large Signal Voltage Gain  
−11  
70  
20  
CMRR  
AVO  
−11 V ≤ VCM ≤ +15 V, −40°C ≤ TA ≤ +85°C  
RL = 10 kΩ  
RL = 10 kΩ, −40°C ≤ TA ≤ +85°C  
90  
dB  
V/mV  
V/mV  
μV/°C  
pA/°C  
15  
Offset Voltage Drift  
Bias Current Drift  
ΔVOS/ΔT  
ΔIB/ΔT  
10  
8
OUTPUT CHARACTERISTICS  
Output Voltage High  
Output Voltage Low  
Short-Circuit Limit  
VOH  
VOL  
ISC  
RL = 10 kΩ  
RL = 10 kΩ  
Source  
Sink  
f = 1 MHz  
+13.5  
3
+13.9  
−13.9  
10  
−12  
200  
V
V
mA  
mA  
Ω
−13.5  
−8  
Open-Loop Output Impedance  
POWER SUPPLY  
ZOUT  
Power Supply Rejection Ratio  
Supply Current/Amplifier  
Supply Voltage Range  
DYNAMIC PERFORMANCE  
Slew Rate  
Full-Power Bandwidth  
Settling Time  
Gain Bandwidth Product  
Phase Margin  
PSRR  
ISY  
VS  
VS = 4.5 V to 18 V, −40°C ≤ TA ≤ +85°C  
VO = 0 V, −40°C ≤ TA ≤ +85°C  
92  
4.5  
7
114  
210  
dB  
μA  
V
250  
18  
SR  
BWP  
tS  
GBP  
ØO  
RL = 10 kΩ  
1% distortion  
To 0.01%  
9
V/μs  
kHz  
μs  
MHz  
Degrees  
125  
1.6  
3.5  
55  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
en p-p  
en  
in  
0.1 Hz to 10 Hz  
f = 1 kHz  
1.3  
36  
0.01  
μV p-p  
nV/√Hz  
pA/√Hz  
Rev. 0 | Page 3 of 16  
 
AD8682/AD8684  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
Parameter  
THERMAL RESISTANCE  
Rating  
Supply Voltage  
18 V  
Table 3.  
Input Voltage  
18 V  
36 V  
Package Type  
θJA  
θJC  
45  
43  
35  
36  
Unit  
°C/W  
°C/W  
°C/W  
°C/W  
Differential Input Voltage1  
Output Short-Circuit Duration  
Storage Temperature Range  
Operating Temperature Range  
Junction Temperature Range  
Lead Temperature (Soldering, 60 sec)  
8-Lead MSOP [RM-8]  
8-Lead SOIC_N [R-8]  
14-Lead TSSOP [RU-14]  
14-Lead SOIC [R-14]  
210  
158  
180  
120  
Indefinite  
−65°C to +150°C  
−40°C to +85°C  
−65°C to +150°C  
300°C  
ESD CAUTION  
1 For supply voltages less than 18 V, the absolute maximum input voltage is  
equal to the supply voltage.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rev. 0 | Page 4 of 16  
 
AD8682/AD8684  
TYPICAL PERFORMANCE CHARACTERISTIC  
80  
180  
135  
90  
70  
60  
V
= ±15V  
= 25°C  
V
T
= ±15V  
= 25°C  
S
S
T
A
A
60  
50  
A
A
= 100  
= 10  
VCL  
40  
40  
30  
VCL  
20  
45  
20  
10  
A
= 1  
0
0
VCL  
0
–10  
–20  
–30  
–20  
–40  
–45  
–90  
1k  
10k  
100k  
1M  
10M  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 3. AD8682 Open-Loop Gain and Phase vs. Frequency  
Figure 6. AD8682 Closed-Loop Gain vs. Frequency  
30  
25  
20  
15  
10  
5
45  
40  
35  
30  
25  
20  
15  
10  
5
V
= ±15V  
= 10k  
= 50pF  
S
V
R
= ±15V  
= 10k  
S
L
R
L
C
L
–SR  
+SR  
0
–75  
0
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
–50  
–25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 7. Slew Rate vs. Temperature  
Figure 4. AD8682 Open-Loop Gain vs. Temperature  
1000  
100  
10  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
V
= ±15V  
V
R
= ±15V  
= 2k  
= 100mV p-p  
S
S
= 0V  
CM  
L
V
IN  
A
= 1  
VCL  
= 25°C  
T
A
+OS  
–OS  
1
0.1  
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
0
100  
200  
300  
400  
500  
TEMPERATURE (°C)  
LOAD CAPACITANCE (pF)  
Figure 8. AD8682 Input Bias Current vs. Temperature  
Figure 5. Small Signal Overshoot vs. Load Capacitance  
Rev. 0 | Page 5 of 16  
 
AD8682/AD8684  
1000  
20  
15  
T
R
= 25°C  
= 10kΩ  
V
T
= ±15V  
= 25°C  
A
S
L
A
V
OH  
10  
100  
10  
5
0
–5  
–10  
–15  
–20  
V
OL  
1
10  
0
±5  
±10  
SUPPLY VOLTAGE (V)  
±15  
±20  
100  
FREQUENCY (Hz)  
1k  
10k  
Figure 9. Voltage Noise Density vs. Frequency  
Figure 12. Output Voltage Swing vs. Supply Voltage  
1000  
100  
10  
1000  
100  
10  
V
T
= ±15V  
= 25°C  
V
T
= ±15V  
= 25°C  
S
S
A
A
A
= 100  
VCL  
VCL  
A
= 10  
= 1  
1
1
A
VCL  
0.1  
0.1  
100  
–15  
–10  
–5  
0
5
10  
15  
1k  
10k  
100k  
1M  
COMMON-MODE VOLTAGE (V)  
FREQUENCY (Hz)  
Figure 10. Input Bias Current vs. Common-Mode Voltage  
Figure 13. Closed-Loop Output Impedance vs. Frequency  
480  
475  
470  
465  
460  
455  
450  
480  
T
= 25°C  
A
475  
470  
465  
460  
455  
450  
0
±5  
±10  
±15  
±20  
–50  
–25  
0
25  
50  
75  
100  
125  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 11. AD8682 Supply Current vs. Supply Voltage  
Figure 14. AD8682 Supply Current vs. Temperature  
Rev. 0 | Page 6 of 16  
AD8682/AD8684  
30  
25  
20  
15  
10  
5
16  
14  
12  
10  
8
V
T
= ±15V  
= 25°C  
V
T
R
A
= ±15V  
= 25°C  
= 10k  
= 1  
S
S
A
A
L
V
OL  
V
VCL  
OH  
6
4
2
0
100  
0
100  
1k  
10k  
100k  
1M  
1k  
LOAD RESISTANCE ()  
10k  
FREQUENCY (Hz)  
Figure 15. Absolute Output Voltage vs. Load Resistance  
Figure 18. Maximum Output Swing vs. Frequency  
140  
120  
100  
80  
140  
120  
100  
80  
V
T
= ±15V  
= 25°C  
S
V
T
= ±15V  
= 25°C  
S
A
A
+PSRR  
60  
60  
40  
40  
20  
–PSRR  
20  
0
0
–20  
–40  
–60  
–20  
–40  
–60  
100  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 19. AD8682 CMRR vs. Frequency  
Figure 16. AD8682 PSRR vs. Frequency  
20  
18  
14  
12  
10  
8
V
T
= ±15V  
= 25°C  
S
V
= ±15V  
= 25°C  
S
A
T
A
100 ×AD8682  
(200 OP AMPS)  
16  
14  
12  
SINK  
10  
8
SOURCE  
6
6
4
4
2
2
0
0
–50  
–25  
0
25  
50  
75  
100  
125  
–1.0 –0.8 –0.6 –0.4 –0.2  
0
0.2  
0.4  
0.6  
0.8  
1.0  
V
(µV)  
TEMPERATURE (°C)  
OS  
Figure 20. AD8682 VOS Distribution  
Figure 17. AD8682 Short-Circuit Current vs. Temperature  
Rev. 0 | Page 7 of 16  
AD8682/AD8684  
400  
360  
320  
280  
240  
200  
160  
120  
80  
1000  
100  
10  
V
= ±15V  
S
300 × OP282  
(600 OP AMPS)  
1
40  
0
0.1  
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
0
4
8
12  
16  
20  
24  
28  
32  
36  
TEMPERATURE (°C)  
TCV (µV/°C)  
OS  
Figure 21. AD8682 TCVOS Distribution SOIC_N Package  
Figure 24. AD8684 Input Bias Current vs. Temperature  
50  
45  
950  
945  
40  
35  
30  
940  
935  
930  
25  
20  
15  
925  
920  
915  
910  
10  
5
0
–50  
–25  
0
25  
50  
75  
100  
125  
0
10  
20  
30  
40  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
Figure 22. AD8684 Open-Loop Gain vs. Temperature  
Figure 25. AD8684 Relative Supply Current vs. Supply Voltage  
950  
945  
60  
50  
V
T
= ±15V  
= 25°C  
S
A
A
= 100  
= 10  
= 1  
VCL  
940  
935  
40  
30  
A
VCL  
930  
925  
20  
10  
A
VCL  
920  
915  
910  
0
–10  
–20  
–50  
–25  
0
25  
50  
75  
100  
125  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
Figure 23. AD8684 Closed-Loop Gain vs. Frequency  
Figure 26. AD8684 Supply Current vs. Temperature  
Rev. 0 | Page 8 of 16  
AD8682/AD8684  
140  
120  
100  
80  
40  
35  
30  
V
= ±15V  
= 25°C  
S
V
= ±15V  
S
T
A
100 × AD8684  
(400 OP AMPS)  
PSRR+  
25  
20  
15  
PSRR–  
60  
40  
10  
5
20  
0
0
1k  
10k  
100k  
FREQUENCY (Hz)  
1M  
10M  
–1.0 –0.8 –0.6 –0.4 –0.2  
0
0.2  
0.4  
0.6  
0.8 1.0  
V
(µV)  
OS  
Figure 27. AD8684 PSRR vs. Frequency  
Figure 30. AD8684 VOS Distribution Package  
14  
12  
800  
700  
600  
V
= ±15V  
S
300 × OP282  
(1200 OP AMPS)  
SINK  
10  
SOURCE  
500  
400  
300  
8
6
4
200  
100  
0
2
0
–50  
–25  
0
25  
50  
75  
100  
125  
0
4
8
12 16 20 24 28 32 36 40 44 48 52 56 60  
TEMPERATURE (°C)  
TCV (µV/°C)  
OS  
Figure 28. AD8684 Short-Circuit Current vs. Temperature  
Figure 31. AD8684 TCVOS Distribution Package  
140  
120  
100  
80  
V
= ±15V  
S
60  
40  
20  
0
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
Figure 29. AD8684 CMRR vs. Frequency  
Rev. 0 | Page 9 of 16  
AD8682/AD8684  
APPLICATIONS INFORMATION  
The AD8682 and AD8684 are dual and quad JFET op amps that  
are optimized for high speed at low power. This combination  
makes these amplifiers excellent choices for battery-powered or  
low power applications that require above average performance.  
Applications benefiting from this performance combination  
include telecommunications, geophysical exploration, portable  
medical equipment, and navigational instrumentation.  
PHASE INVERSION  
Most JFET input amplifiers invert the phase of the input signal  
if either input exceeds the input common-mode range. For the  
AD8682/AD8684, negative signals in excess of approximately  
14 V cause phase inversion. This is caused by saturation of the  
input stage leading to the forward-biasing of a drain-gate diode.  
A simple fix for this in noninverting applications is to place  
a resistor in series with the noninverting input. This limits the  
amount of current through the forward-biased diode and prevents  
shutting down of the output stage. For the AD8682/AD8684,  
a value of 200 kΩ has been found to work; however, it adds  
a significant amount of noise.  
HIGH-SIDE SIGNAL CONDITIONING  
There are many applications requiring the sensing of signals near  
the positive rail. The AD8682 and the AD8684 were tested and  
are guaranteed over a common-mode range (−11 V ≤ VCM  
+15 V) that includes the positive supply.  
15  
The AD8682/AD8684 are commonly used in the sensing of  
power supply currents and in current sensing applications, such  
as the partial circuit shown in Figure 32. In this circuit, the  
voltage drop across a low value resistor, such as the 0.1 Ω shown  
here, is amplified and compared to 7.5 V. The output can then  
be used for current limiting.  
10  
5
0
0.1  
15V  
500kΩ  
–5  
–10  
–15  
R
L
100kΩ  
100kΩ  
1/2  
AD8682  
–15  
–10  
–5  
0
5
10  
15  
500kΩ  
V
IN  
Figure 33. AD8682 Phase Reversal  
Figure 32. High-Side Signal Conditioning  
ACTIVE FILTERS  
The wide bandwidth and high slew rates of the AD8682/AD8684  
make either one an excellent choice for many filter applications.  
There are many active filter configurations, but the four most  
popular configurations are: Butterworth, elliptical, Bessel, and  
Chebyshev. Each type has a response that is optimized for a  
given characteristic, as shown in Table 4.  
Table 4.  
Type  
Selectivity  
Moderate  
Good  
Best  
Poor  
Overshoot  
Good  
Moderate  
Poor  
Phase  
Amplitude (Pass Band)  
Maximum flat  
Equal ripple  
Amplitude (Stop Band)  
Butterworth  
Chebyshev  
Elliptical  
Nonlinear  
Linear  
Equal ripple  
Equal ripple  
Bessel (Thompson)  
Best  
Rev. 0 | Page 10 of 16  
 
AD8682/AD8684  
PROGRAMMABLE STATE VARIABLE FILTER  
This cutoff frequency can be expressed as  
The circuit shown in Figure 34 can be used to accurately program  
the Q; the cutoff frequency, fC; and the gain of a 2-pole state  
variable filter. The AD8684 has been used in this design because  
of its high bandwidth, low power, and low noise. This circuit takes  
only three packages to build because of the quad configuration  
of the op amps and DACs.  
1
D1  
fc =  
R1C1 256  
where D1 is the digital code for the DAC.  
The gain of this circuit is set by adjusting D3. The gain equation is  
R4 D3  
The DACs shown are used in voltage mode; therefore, many  
values are dependent on the accuracy of the DAC only and not  
on the absolute values of the DAC resistive ladders. As a result, this  
makes the circuit unusually accurate for a programmable filter.  
Gain =  
R5 256  
DAC 2 is used to set the Q of the circuit. Adjusting this DAC  
controls the amount of feedback from the band-pass node to  
the input summing node. Note that the digital value of the  
DAC is in the numerator; therefore, zero code is not a valid  
operating point.  
Adjusting DAC 1 changes the signal amplitude across R1; therefore,  
the DAC attenuation × R1 determines the amount of signal current  
that charges the integrating capacitor, C1.  
R2 256  
Q =  
R3 D2  
R7  
2k  
R4  
2kΩ  
V
IN  
R5  
2kΩ  
C1  
1000pF  
1/4  
AD8684  
1/4  
1/4  
AD8684  
DAC8408  
R1  
2kΩ  
C1  
1/4  
AD8684  
1000pF  
1/4  
DAC8408  
1/4  
AD8684  
R1  
2kΩ  
1/4  
AD8684  
1/4  
DAC8408  
HIGH PASS  
1/4  
AD8684  
LOW  
PASS  
R6  
2kΩ  
BAND PASS  
R3  
2kΩ  
R2  
2kΩ  
1/4  
AD8684  
1/4  
DAC8408  
1/4  
AD8684  
Figure 34. Programmable State Variable Filter  
Rev. 0 | Page 11 of 16  
 
 
AD8682/AD8684  
OUTLINE DIMENSIONS  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2440)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 35. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-8)  
Dimensions shown in millimeters and (inches)  
3.20  
3.00  
2.80  
8
1
5
4
5.15  
4.90  
4.65  
3.20  
3.00  
2.80  
PIN 1  
0.65 BSC  
0.95  
0.85  
0.75  
1.10 MAX  
0.80  
0.60  
0.40  
8°  
0°  
0.15  
0.00  
0.38  
0.22  
0.23  
0.08  
SEATING  
PLANE  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-187-AA  
Figure 36. 8-Lead Mini Small Outline Package [MSOP]  
(RM-8)  
Dimensions shown in millimeters  
Rev. 0 | Page 12 of 16  
 
AD8682/AD8684  
8.75 (0.3445)  
8.55 (0.3366)  
8
7
14  
1
6.20 (0.2441)  
5.80 (0.2283)  
4.00 (0.1575)  
3.80 (0.1496)  
1.27 (0.0500)  
BSC  
0.50 (0.0197)  
0.25 (0.0098)  
45°  
1.75 (0.0689)  
1.35 (0.0531)  
0.25 (0.0098)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
1.27 (0.0500)  
0.40 (0.0157)  
0.51 (0.0201)  
0.31 (0.0122)  
0.25 (0.0098)  
0.17 (0.0067)  
COMPLIANT TO JEDEC STANDARDS MS-012-AB  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 37. 14-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-14)  
Dimensions shown in millimeters and (inches)  
5.10  
5.00  
4.90  
14  
8
7
4.50  
4.40  
4.30  
6.40  
BSC  
1
PIN 1  
0.65  
BSC  
1.05  
1.00  
0.80  
0.20  
0.09  
1.20  
MAX  
0.75  
0.60  
0.45  
8°  
0°  
0.15  
0.05  
0.30  
0.19  
SEATING  
PLANE  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1  
Figure 38. 14-Lead Thin Shrink Small Outline Package [TSSOP]  
(RU-14)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model  
Temperature Range  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
Package Description  
8-Lead SOIC_N  
8-Lead SOIC_N  
8-Lead SOIC_N  
8-Lead MSOP  
Package Option  
R-8  
R-8  
Branding  
AD8682ARZ1  
AD8682ARZ-REEL1  
AD8682ARZ-REEL71  
AD8682ARMZ-R21  
AD8682ARMZ-REEL1  
AD8684ARZ1  
R-8  
RM-8  
RM-8  
R-14  
R-14  
R-14  
A1K  
A1K  
8-Lead MSOP  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead TSSOP  
14-Lead TSSOP  
AD8684ARZ-REEL1  
AD8684ARZ-REEL71  
AD8684ARUZ1  
RU-14  
RU-14  
AD8684ARUZ_REEL1  
1 Z= Pb-free part.  
Rev. 0 | Page 13 of 16  
 
AD8682/AD8684  
NOTES  
Rev. 0 | Page 14 of 16  
AD8682/AD8684  
NOTES  
Rev. 0 | Page 15 of 16  
AD8682/AD8684  
NOTES  
©2006 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D06278-0-10/06(0)  
Rev. 0 | Page 16 of 16  

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