AD9203WARUZRL7 [ADI]
10-Bit, 40 MSPS, 3 V, 74 mW Analog-to-Digital Converter; 10位， 40 MSPS ， 3 V ， 74 mW的模拟数字转换器
| 型号： | AD9203WARUZRL7 |
| 厂家： | 
ADI |
| 描述： | 10-Bit, 40 MSPS, 3 V, 74 mW Analog-to-Digital Converter |
| 文件： | 总8页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
10-Bit, 40 MSPS, 3 V, 74 mW
Analog-to-Digital Converter
Automotive Product
AD9203W
FEATURES
FUNCTIONAL BLOCK DIAGRAM
CLK
AVDD
DRVDD
CMOS 10-bit, 40 MSPS sampling analog-to-digital converter
Power dissipation: 74 mW (3 V supply, 40 MSPS)
17 mW (3 V supply, 5 MSPS)
Operation between 2.7 V and 3.6 V supply
Differential nonlinearity: −0.25 LSB
Power-down (standby) mode: 0.65 mW
ENOB: 9.55 at fIN = 20 MHz
CLAMP
AD9203W
STBY
CLAMPIN
AINP
AINN
A/D
SHA
GAIN
SHA
GAIN
3-STATE
A/D
D/A
A/D
D/A
REFTF
REFBF
CORRECTION LOGIC
OUTPUT BUFFERS
Out-of-range indicator
BANDGAP
REFERENCE
OTR
Adjustable on-chip voltage reference
IF undersampling up to fIN = 130 MHz
Input range: 1 V to 2 V p-p differential or single-ended
Adjustable power consumption
VREF
D9 (MSB)
10
+
REFSENSE
–
D0 (LSB)
0.5V
AVSS
PWRCON
DFS
DRVSS
Internal clamp circuit
Qualified for automotive applications
Figure 1.
APPLICATIONS
Automotive
GENERAL DESCRIPTION
The AD9203W is a monolithic low power, single supply, 10-bit,
40 MSPS analog-to-digital converter, with an on-chip voltage
reference. The AD9203W uses a multistage differential pipeline
architecture and guarantees no missing codes over the full
operating temperature range. Its input range may be adjusted
between 1 V and 2 V p-p.
can be used with the most significant bit to determine over- or
underrange.
The AD9203W can operate with a supply range from 2.7 V to
3.6 V, an attractive option for low power operation in high
speed portable applications.
The AD9203W is specified over industrial (−40°C to +85°C)
temperature ranges and is available in a 28-lead TSSOP package.
The AD9203W has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy
and temperature drift requirements of an application.
PRODUCT HIGHLIGHTS
1. Low Power. The AD9203W consumes 74 mW on a 3 V
supply operating at 40 MSPS. In standby mode, power is
reduced to 0.65 mW.
2. High Performance. Maintains better than 9.55 ENOB at
40 MSPS input signal from dc to Nyquist.
3. Very Small Package. The AD9203W is available in a
28-lead TSSOP.
4. Programmable Power. The AD9203W power can be
further reduced by using an external resistor at lower
sample rates.
5. Built-In Clamp Function. Allows dc restoration of video
signals.
An external resistor can be used to reduce power consumption
when operating at lower sampling rates. This yields power
savings for users who do not require the maximum sample
rate. This feature is especially useful at sample rates far below
40 MSPS. Excellent performance is still achieved at reduced
power. For example, 9.7 ENOB performance may be realized
with only 17 mW of power, using a 5 MHz clock.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary or
twos complementary output format by using the DFS pin. An
out-of-range signal (OTR) indicates an overflow condition that
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2011 Analog Devices, Inc. All rights reserved.
AD9203W
Automotive Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Characteristics...............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Outline Dimensions..........................................................................7
Ordering Guide .............................................................................7
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
10/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Automotive Product
SPECIFICATIONS
AD9203W
AVDD = 3 V, DRVDD = 3 V, FS = 40 MSPS, input span from 0.5 V to 2.5 V, internal 1 V reference, PWRCON = AVDD, 50% clock duty
cycle, TMIN to TMAX unless otherwise noted.
Table 1.
Parameter
Symbol Min
Typ
Max
Unit
Bits
Conditions
RESOLUTION
10
MAX CONVERSION RATE
FS
40
MSPS
Clock
Cycles
PIPELINE DELAY
5.5
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
Offset Error
DNL
INL
EZS
0.25
0.ꢁ5
0.ꢁ
0.ꢀ
1.4
2.8
4.0
LSB
LSB
% FSR
% FSR
Gain Error
EFS
0.ꢀ
ANALOG INPUT
Input Voltage Range
Input Capacitance
AIN
CIN
1
2
V p-p
pF
1.4
Aperture Delay
TAP
TAJ
BW
2.0
1.2
390
0.3
ns
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Input Referred Noise
INTERNAL REFERENCE
Output Voltage (0.5 V Mode)
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Load Regulation
ps rms
MHz
mV
Switched, single-ended
VREF
VREF
0.5
1
5
V
V
mV
mV
REFSENSE = VREF
REFSENSE = GND
30
1.2
0.ꢁ5
1.0 mA load
POWER SUPPLY
Operating Voltage
AVDD
2.ꢀ
3.0
3.ꢁ
V
DRVDD 2.ꢀ
IAVDD
IDRVDD
3.0
20.1
4.4
9.5
ꢀ4
3.ꢁ
22.0
ꢁ.0
14.0
84.0
V
Analog Supply Current
Digital Supply Current
mA
mA
mA
mW
fIN = 4.8 MHz, output bus load = 10 pF
fIN = 20 MHz, output bus load = 20 pF
fIN = 4.8 MHz, output bus load = 10pF
fIN = 20 MHz, output bus load = 20 pF
Power Consumption
88.8
0.ꢁ5
0.04
108.0 mW
1.2 mW
0.25 % FSR
Power-Down
PD
Power Supply Rejection Ratio
DYNAMIC PERFORMANCE (AIN = 0.5 dBFS)
Signal-to-Noise and Distortion1
f = 4.8 MHz
PSRR
SINAD
59.ꢀ
59.3
dB
dB
f = 20 MHz
5ꢀ.2
Effective Bits
ENOB
SNR
f = 4.8 MHz1
9.ꢁ
9.55
Bits
Bits
f = 20 MHz
Signal-to-Noise Ratio
f = 4.8 MHz1
9.2
ꢁ0.0
59.5
dB
dB
f = 20 MHz
5ꢀ.5
Total Harmonic Distortion
f = 4.8MHz
f = 20 MHz
THD
−ꢀꢁ.0
−ꢀ4.0
dB
−ꢁ5.0 dB
Spurious-Free Dynamic Range
f = 4.8 MHz1
f = 20 MHz
SFDR
80
ꢀ8
dB
dB
ꢁꢀ.8
Rev. 0 | Page 3 of 8
AD9203W
Automotive Product
Parameter
Symbol Min
Typ
ꢁ8
0.2
0.3
Max
Unit
dB
Degree
%
Conditions
Two-Tone Intermodulation Distortion
Differential Phase
Differential Gain
IMD
DP
DG
f = 44.49 MHz and 45.52 MHz
NTSC 40 IRE ramp
DIGITAL INPUTS
High Input Voltage
Low Input Voltage
VIH
VIL
2.0
V
V
0.4
Clock Pulse Width High
Clock Pulse Width Low
Clock Period2
11.25
11.25
ns
ns
ns
25
DIGITAL OUTPUTS
High-Z Leakage
Data Valid Delay
Data Enable Delay
Data High-Z Delay
IOZ
5.0
μA
ns
ns
ns
Output = 0 to DRVDD
CL = 20 pF
CL = 20 pF
tOD
tDEN
tDHZ
5
ꢁ
ꢁ
CL = 20 pF
LOGIC OUTPUT (with DRVDD = 3 V)
High Level Output Voltage (IOH = 50 μA)
High Level Output Voltage (IOH = 0.5 mA)
Low Level Output Voltage (IOL= 1.ꢁ mA)
Low Level Output Voltage (IOL= 50 μA)
VOH
VOH
VOL
VOL
2.95
2.80
V
V
V
V
0.3
0.05
1 Differential Input (2 V p-p).
2 The AD9203W converts at clock rates as low as 20 kHz.
N+1
N
N+2
N–1
N+3
ANALOG
INPUT
N+6
N+4
N+5
CLOCK
DATA
OUT
N–7
N–6
N–5
N–4
N–3
N–2
N–1
N
N+1
T
= 3ns MIN
7ns MAX
OD
(C
= 20pF)
LOAD
Figure 2. Timing Diagram
Rev. 0 | Page 4 of 8
Automotive Product
AD9203W
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
With
Parameter
AVDD
Respect to Rating
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
AVSS
–0.3 to +3.9
DRVDD
AVSS
AVDD
REFCOM
CLK
DRVSS
DRVSS
DRVDD
AVSS
–0.3 to +3.9
–0.3 to +0.3
–3.9 to +3.9
–0.3 to +0.3
THERMAL CHARACTERISTICS
AVSS
–0.3 to AVDD + 0.3
–0.3 to DRVDD + 0.3
AVSS – 0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
–0.3 to AVDD + 0.3
150
28-Lead TSSOP
JA = 97.9°C/W
JC = 14.0°C/W
Digital Outputs DRVSS
AINP
VREF
AINN
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
REFSENSE
REFTF, REFBF
STBY
CLAMP
CLAMPIN
PWRCON
DFS
ESD CAUTION
3-STATE
V
°C
Junction
Temperature
Storage
Temperature
Lead
+150
300
°C
°C
Temperature
(10 s)
Rev. 0 | Page 5 of 8
AD9203W
Automotive Product
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DRVSS
DRVDD
(LSB) D0
D1
1
28 AVDD
2
AVSS
AINN
AINP
27
26
25
3
4
D2
5
24 REFBF
6
D3
VREF
23
22
21
20
19
AD9203W
TOP VIEW
(Not to Scale)
D4
7
REFTF
8
D5
PWRCON
CLAMPIN
CLAMP
9
D6
10
D7
D8 11
18 REFSENSE
12
13
14
STBY
(MSB) D9
OTR
17
16
15
3-STATE
CLK
DFS
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin
Name
DRVSS
DRVDD
D0
Description
1
2
3
Digital Ground.
Digital Supply.
Bit 0, Least Significant Bit.
4
D1
Bit 1.
5
D2
Bit 2.
ꢁ
D3
Bit 3.
ꢀ
D4
Bit 4.
8
D5
Bit 5.
9
Dꢁ
Bit ꢁ.
10
11
12
13
14
15
1ꢁ
1ꢀ
18
19
20
21
22
23
24
25
2ꢁ
2ꢀ
28
Dꢀ
D8
D9
OTR
DFS
CLK
3-STATE
STBY
REFSENSE
CLAMP
CLAMPIN
PWRCON
REFTF
VREF
REFBF
AINP
AINN
AVSS
AVDD
Bit ꢀ.
Bit 8.
Bit 9, Most Significant Bit.
Out-of-Range Indicator.
Data Format Select HI: Twos Complement; LO: Straight Binary.
Clock Input.
HI: High Impedance State Output; LO: Active Digital Output Drives.
HI: Power-Down Mode; LO: Normal Operation.
Reference Select.
HI: Enable Clamp; LO: Open Clamp.
Clamp Signal Input.
Power Control Input.
Top Reference Decoupling.
Reference In/Out.
Bottom Reference Decoupling.
Noninverting Analog Input.
Inverting Analog Input.
Analog Ground.
Analog Supply.
Rev. 0 | Page ꢁ of 8
Automotive Product
OUTLINE DIMENSIONS
AD9203W
9.80
9.70
9.60
28
15
4.50
4.40
4.30
6.40 BSC
1
14
PIN 1
0.65
BSC
1.20 MAX
0.15
0.05
8°
0°
0.75
0.60
0.45
0.30
0.19
0.20
0.09
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AE
Figure 4. 28-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-28)
Dimensions shown in millimeters
ORDERING GUIDE
Model1, 2
Temperature Range
Package Description
Package Option
AD9203WARUZ
AD9203WARUZRLꢀ
−40°C to +85°C
−40°C to +85°C
28-Lead Thin Shrink Small Outline [TSSOP]
28-Lead Thin Shrink Small Outline [TSSOP]
RU-28
RU-28
1Z = RoHS Compliant Part.
2W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The AD9203W models are available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for these models.
Rev. 0 | Page ꢀ of 8
AD9203W
NOTES
Automotive Product
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10258-0-10/11(0)
Rev. 0 | Page 8 of 8
相关型号：
AD9204BCPZ-201,2
10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
ADI
©2020 ICPDF网 联系我们和版权申明