ADA4420-6ARQZ-R71 [ADI]
Low Cost 6-Channel HD/SD Video Filter; 低成本6声道HD / SD视频滤波器
| 型号： | ADA4420-6ARQZ-R71 |
| 厂家： | 
ADI |
| 描述： | Low Cost 6-Channel HD/SD Video Filter |
| 文件： | 总12页 (文件大小：280K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost 6-Channel HD/SD Video Filter
ADA4420-6
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Sixth-order filters
INSD1
INSD2
INSD3
OUTSD1
OUTSD2
OUTSD3
×1
×1
×1
×1
×1
×1
×2
×2
×2
×2
×2
×2
SD
SD
SD
HD
HD
HD
Transparent input sync tip clamp
−1 dB bandwidth of 26 MHz typical for HD
HD rejection @ 75 MHz: 48 dB typical
NTSC differential gain: 0.19%
NTSC differential phase: 0.76°
Rail-to-rail outputs
Low quiescent current: 32 mA typical
Disable feature
Output dc offset
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
DIS
INHD1
OUTHD1
OUTHD2
OUTHD3
APPLICATIONS
Set-top boxes
DVD players and recorders
HDTVs
Projectors
Personal video recorders
INHD2
INHD3
ADA4420-6
GENERAL DESCRIPTION
Figure 1.
The ADA4420-6 is a low cost video reconstruction filter specifically
designed for consumer applications. It consists of six independent
sixth-order Butterworth filters/buffers, three for standard
definition (Y/C or CVBS) and three for high definition
component signals (YPbPr or RGB).
Each channel features a transparent sync tip clamp, allowing ac
coupling of the inputs without requiring dc restoration.
The output drivers on the ADA4420-6 have rail-to-rail output
capabilities with 6 dB gain. A built-in offset of 250 mV allows
the outputs to be dc-coupled, eliminating the need for large
coupling capacitors. Each output is capable of driving two 75 Ω
doubly terminated cables.
The ADA4420-6 operates from a single 5 V supply and has a
low quiescent current of 32 mA, making it ideal for applications
where power consumption is critical. A disable feature allows
for further power conservation by reducing the supply current
to less than 8 μA typical when the device is not in use.
The ADA4420-6 is available in a 16-lead QSOP and operates in
the extended industrial temperature range of −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADA4420-6
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Test Circuits........................................................................................9
Applications Information.............................................................. 10
Overview ..................................................................................... 10
Disable ......................................................................................... 10
Input and Output Coupling...................................................... 10
Printed Circuit Board (PCB) Layout ....................................... 10
Video Encoder Reconstruction Filter...................................... 10
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
Maximum Power Dissipation ..................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
REVISION HISTORY
8/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADA4420-6
SPECIFICATIONS
VS = 5 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 17, Figure 18,
and Figure 19 for the test circuits.
Table 1.
Parameter
Test Conditions/Comments
Min Typ
Max Unit
OVERALL PERFORMANCE
DC Voltage Gain
All channels
5.8
6.0
0 to 2.1
0.25 to 4.6
30
1
6.2
dB
V
V
mA
μA
Input Voltage Range, All Inputs
Output Voltage Range, All Outputs
Linear Output Current per Channel
Filter Input Bias Current
SD CHANNEL DYNAMIC PERFORMANCE
−1 dB Bandwidth
−3 dB Bandwidth
Out-of-Band Rejection
Crosstalk
8.6
10
45
−68
0.02
70
MHz
MHz
dB
dB
%
8.5
42
f = 27 MHz
f = 1 MHz
Total Harmonic Distortion
Signal-to-Noise Ratio
Propagation Delay
f = 1 MHz, VO = 1.4 V p-p, dc-coupled outputs
f = 100 kHz to 6 MHz, unweighted
dB
ns
57
Group Delay Variation
Differential Gain
f = 100 kHz to 5 MHz
NTSC; ac-coupled inputs, dc-coupled outputs;
see Figure 18
16
0.19
ns
%
Differential Phase
NTSC; ac-coupled inputs, dc-coupled outputs;
see Figure 18
0.76
Degrees
HD CHANNEL DYNAMIC PERFORMANCE
−1 dB Bandwidth
−3 dB Bandwidth
Out-of-Band Rejection
Crosstalk
Total Harmonic Distortion
Signal-to-Noise Ratio
Propagation Delay
26
31
48
−68
0.57
66
MHz
MHz
dB
dB
%
27
43
f = 75 MHz
f = 1 MHz
f = 10 MHz, VO = 1.4 V p-p, dc-coupled outputs
f = 100 kHz to 30 MHz, unweighted
dB
ns
15
Group Delay Variation
DC CHARACTERISTICS
Operating Voltage
f = 100 kHz to 30 MHz
11
ns
4.75 to 5.25
V
Quiescent Supply Current
Active, DIS = 1
32
7
36
13
mA
μA
dB
dB
mV
V
Disabled, DIS = 0
PSRR
HD channel, referred to output
SD channel, referred to output
All channels
35
40
135
41
45
250
Output DC Offset
DISABLE Assert Voltage
DISABLE Assert Time
375
1.9
20
ns
DISABLE De-Assert Time
DISABLE Input Bias Current
Input-to-Output Isolation
450
−6.8
−96
ns
μA
dB
Disabled, DIS = 0
Disabled, DIS = 0, f = 5 MHz
Rev. 0 | Page 3 of 12
ADA4420-6
ABSOLUTE MAXIMUM RATINGS
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). The power dissipated due to load drive
depends on the particular application. For each output, the
power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to the loads is equal to the sum of the
power dissipations due to each individual load. RMS voltages
and currents must be used in these calculations.
Table 2.
Parameter
Rating
Supply Voltage
5.5 V
Power Dissipation
See Figure 2
−65°C to +125°C
−40°C to +85°C
300°C
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Airflow increases heat dissipation, effectively reducing θJA.
Figure 2 shows the maximum power dissipation in the package
vs. the ambient temperature for the 16-lead QSOP (105°C/W)
on a JEDEC standard 4-layer board. θJA values are approximate.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
THERMAL RESISTANCE
θJA is specified for the device soldered to a high thermal
conductivity 4-layer (2s2p) circuit board, as described in
EIA/JESD 51-7.
Table 3.
Package Type
θJA
θJC
Unit
16-Lead QSOP
105
23
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4420-6
package is limited by the associated rise in junction temperature
(TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4420-6. Exceeding a
junction temperature of 150°C for an extended time can result
in changes in the silicon devices, potentially causing failure.
0
10
20
30
40
50
60
70
80
90
100
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 4 of 12
ADA4420-6
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
INSD1
INSD2
INSD3
VCC
OUTSD1
OUTSD2
OUTSD3
GND
ADA4420-6
TOP VIEW
DIS
GND
(Not to Scale)
INHD1
INHD2
INHD3
OUTHD1
OUTHD2
OUTHD3
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
INSD1
INSD2
INSD3
VCC
Standard Definition Input 1
Standard Definition Input 2
Standard Definition Input 3
Power Supply
5
DIS
Disable/Power-Down Input
High Definition Input 1
High Definition Input 2
High Definition Input 3
High Definition Output 3
High Definition Output 2
High Definition Output 1
Ground
6
7
8
9
10
11
12
13
14
15
16
INHD1
INHD2
INHD3
OUTHD3
OUTHD2
OUTHD1
GND
GND
Ground
OUTSD3
OUTSD2
OUTSD1
Standard Definition Output 3
Standard Definition Output 2
Standard Definition Output 1
Rev. 0 | Page 5 of 12
ADA4420-6
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5.0 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 17, Figure 18,
and Figure 19 for the test circuits.
10
1.0
HD CHANNELS,
L
SD CHANNELS,
R
= 75Ω
R
= 75Ω
L
0
HD CHANNELS,
L
0.5
R
= 75Ω
HD CHANNELS,
R
= 150Ω
L
–10
–20
–30
–40
–50
–60
–70
–80
0
HD CHANNELS,
L
SD CHANNELS,
SD CHANNELS,
L
R
= 150Ω
R
= 75Ω
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
L
R
= 150Ω
SD CHANNELS,
L
R
= 150Ω
1
1
1
10
100
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 4. Frequency Response vs. Load (RL)
Figure 7. Flatness vs. Load (RL)
10
0
1.0
0.5
–10
–20
–30
–40
–50
–60
–70
–80
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
HD –40°C
HD +25°C
HD +85°C
SD –40°C
SD +25°C
SD +85°C
HD –40°C
HD +25°C
HD +85°C
SD –40°C
SD +25°C
SD +85°C
10
100
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 5. Frequency Response vs. Temperature
Figure 8. Flatness vs. Temperature
10
0
10
0
HD DC-COUPLED
–10
–20
–30
–40
–50
–60
–70
–80
–10
–20
–30
–40
–50
–60
–70
–80
HD AC-COUPLED
SD V = 100mV p-p
SD V = 2.0V p-p
HD V = 100mV p-p
HD V = 2.0V p-p
O
SD AC-COUPLED
SD DC-COUPLED
O
O
O
1
10
FREQUENCY (MHz)
100
10
100
FREQUENCY (MHz)
Figure 9. Frequency Response vs. Output Coupling
Figure 6. Frequency Response vs. Amplitude
Rev. 0 | Page 6 of 12
ADA4420-6
6
5
100
90
80
70
60
50
40
30
20
10
0
SD CHANNELS
4
3
SD CHANNELS
HD CHANNELS
2
HD CHANNELS
1
0
–1
–600 –400 –200
0
200
400
600
800 1000 1200
0.1
1
10
FREQUENCY (MHz)
100
TIME (ns)
Figure 12. Enable Turn-On Time
Figure 10. Group Delay vs. Frequency
36
35
34
33
32
31
30
29
28
10k
1k
DIS = 0
100
10
0.1
–60
–40
–20
0
20
40
60
80
100
1
10
100
TEMPERATURE (°C)
FREQUENCY (MHz)
Figure 13. Supply Current vs. Temperature
Figure 11. Output Impedance vs. Frequency
Rev. 0 | Page 7 of 12
ADA4420-6
4.70
4.68
4.66
4.64
4.62
4.60
4.58
4.56
4.54
4.52
4.50
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
SD CHANNELS
HD CHANNELS
–60
–40
–20
0
20
40
60
80
100
0.1
1
10
100
1000
TEMPERATURE (°C)
FREQUENCY (MHz)
Figure 16. Output Saturation Voltage vs. Temperature
Figure 14. Crosstalk vs. Frequency
6
5
SD CHANNELS
4
3
2
HD CHANNELS
1
0
–1
–200 –160 –120 –80 –40
0
40
80
120 160 200
TIME (ns)
Figure 15. Disable Turn-Off Time
Rev. 0 | Page 8 of 12
ADA4420-6
TEST CIRCUITS
AGILENT E3631A POWER SUPPLY
±25V
COM
+6V
+
–
+
–
ADA4420-6
TEST CIRCUIT
(SEE FIGURE 17)
V
GND DISABLE
CC
V
CC
V
V
OUT
IN
0.1µF
10µF
50Ω
V
IN
PORT 1
PORT 2
220µF
49.9Ω
V
ADA4420-6
BIAS
CONNECT
PORT 1
OUT
118Ω
86.6Ω
AGILENT 8753D VECTOR NETWORK ANALYZER
DISABLE
GND
Figure 17. DC-Coupled Input, AC-Coupled Output
Figure 19. Test Circuit for Frequency Response and Group Delay
V
CC
0.1µF
10µF
V
IN
0.1µF
49.9Ω
V
ADA4420-6
OUT
118Ω
86.6Ω
DISABLE
GND
Figure 18. AC-Coupled Input, DC-Coupled Output
Rev. 0 | Page 9 of 12
ADA4420-6
APPLICATIONS INFORMATION
75Ω
OVERVIEW
CABLE
220µF
220µF
75Ω
75Ω
ADA4420-6
With its high impedance inputs and high output drive, the
ADA4420-6 is ideally suited to video reconstruction and anti-
alias filtering applications. The high impedance inputs give
designers flexibility with regard to how the input signals are
terminated. Devices with DAC current source outputs that feed
the ADA4420-6 can be loaded in whatever resistance provides
the best performance, and devices with voltage outputs can be
optimally terminated as well. The ADA4420-6 outputs can each
drive up to two source-terminated, 75 ꢀ loads and, therefore, can
directly drive the outputs from set-top boxes and DVDs without
the need for a separate output buffer.
75Ω
75Ω
75Ω
CABLE
Figure 20. Driving Two AC-Coupled Loads with Two Coupling Capacitors
75Ω
CABLE
75Ω
ADA4420-6
470µF
75Ω
75Ω
CABLE
75Ω
DISABLE
75Ω
The ADA4420-6 includes a disable feature that can be used to
save power when a particular device is not in use. When disabled,
the ADA4420-6 typically draws only 7 μA from the supply. The
Figure 21. Driving Two AC-Coupled Loads with One Common Coupling Capacitor
PRINTED CIRCUIT BOARD (PCB) LAYOUT
disable feature is asserted by pulling the
pin low.
DIS
As with all high speed applications, attention to the PCB layout
is of paramount importance. When designing with the ADA4420-6,
adhere to standard high speed layout practices. A solid ground
plane is recommended, and surface-mount, ceramic power supply
decoupling capacitors should be placed as close as possible to the
supply pins. Connect all of the ADA4420-6 GND pins to the
ground plane with traces that are as short as possible. Controlled
impedance traces of the shortest length possible should be used
to connect to the signal I/O pins and should not pass over any
voids in the ground plane. A 75 Ω impedance level is typically
used in video applications. When driving transmission lines,
include series termination resistors on the signal outputs of the
ADA4420-6.
Table 5 summarizes the operation of the disable feature.
Table 5. Disable Function
DIS Pin Connection
Status
VCC or floating
GND
Enabled
Disabled
INPUT AND OUTPUT COUPLING
Inputs to the ADA4420-6 can be ac- or dc-coupled. For dc-coupled
inputs, the signal must be completely contained within the input
range of 0 V to 2.1 V. When using ac-coupled inputs, the lowest
point of the signal is clamped to approximately 0 V. The ADA4420-6
outputs can be either ac- or dc-coupled.
When the ADA4420-6 receives its inputs from a device with
current outputs, the required load resistor value for the output
current is often different from the characteristic impedance of
the signal traces. In this case, if the interconnections are short
(<< 0.1 wavelength), the trace does not have to be terminated in
its characteristic impedance. Traces of 75 Ω can be used in this
instance, provided their lengths are an inch or two at most. This
is easily achieved because the ADA4420-6 and the device feeding it
are usually adjacent to each other, and connections can be made
that are less than one inch in length.
When driving single ac-coupled loads in standard 75 Ω video
distribution systems, a minimum capacitance of 220 μF is
recommended to avoid line and field droop. There are two ac
coupling options when driving two loads from one output. One
option simply uses the same value capacitor on the second load,
while the other option uses a common coupling capacitor that
is at least twice the value used for the single load (see Figure 20
and Figure 21).
When driving two parallel 150 Ω loads (75 Ω effective load), the
3 dB bandwidth of the filters typically varies from that of the filters
with a single 150 Ω load (see Figure 4).
VIDEO ENCODER RECONSTRUCTION FILTER
The ADA4420-6 is easily applied as a reconstruction filter at the
DAC outputs of a video encoder. Figure 22 illustrates how to use
the ADA4420-6 in this type of application following an ADV734x
series video encoder, with a single-supply and ac-coupled outputs.
Rev. 0 | Page 10 of 12
ADA4420-6
220μF
220μF
220μF
ADV734x
75Ω
75Ω
75Ω
OUTHD1
OUTHD2
OUTHD3
INHD1
INHD2
INHD3
MULTIFORMAT
VIDEO ENCODER
Y
×1
×1
×1
HD
HD
×2
×2
×2
DAC 1
DAC 2
DAC 3
300Ω
300Ω
300Ω
Pb
Pr
HD
ADA4420-6
SD
DIS
220μF
220μF
220μF
75Ω
75Ω
75Ω
INSD1
INSD2
INSD3
OUTSD1
OUTSD2
OUTSD3
CVBS
×1
×1
×1
×2
×2
×2
DAC 4
DAC 5
DAC 6
300Ω
300Ω
300Ω
SD
SD
S-VIDEO
R
R
SET2
SET1
4.12kΩ
4.12kΩ
Figure 22. The ADA4420-6 Applied as a Reconstruction Filter Following an ADV734x Series Video Encoder
Rev. 0 | Page 11 of 12
ADA4420-6
OUTLINE DIMENSIONS
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
16
1
9
8
0.158 (4.01)
0.154 (3.91)
0.150 (3.81)
0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
0.010 (0.25)
0.006 (0.15)
0.020 (0.51)
0.010 (0.25)
0.069 (1.75)
0.053 (1.35)
0.065 (1.65)
0.049 (1.25)
0.010 (0.25)
0.004 (0.10)
0.041 (1.04)
REF
SEATING
PLANE
8°
0°
0.025 (0.64)
BSC
0.050 (1.27)
0.016 (0.41)
COPLANARITY
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-137-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 23. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model
Temperature Range Package Description
Package Option Ordering Quantity
ADA4420-6ARQZ1
ADA4420-6ARQZ-R71
ADA4420-6ARQZ-RL1
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
16-Lead Shrink Small Outline Package (QSOP)
16-Lead Shrink Small Outline Package (QSOP)
16-Lead Shrink Small Outline Package (QSOP)
RQ-16
RQ-16
RQ-16
1
1,000
1,500
1 Z = RoHS Compliant Part.
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07532-0-8/08(0)
Rev. 0 | Page 12 of 12
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