ADA4432-1BCPZ-R7 [ADI]

SD Video Filter Amplifiers; 标清视频滤波放大器
ADA4432-1BCPZ-R7
型号: ADA4432-1BCPZ-R7
厂家: ADI    ADI
描述:

SD Video Filter Amplifiers
标清视频滤波放大器

放大器
文件: 总28页 (文件大小:472K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SD Video Filter Amplifiers  
with Output Short-to-Battery Protection  
ADA4432-1/ADA4433-1  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
STB  
Qualified for automotive applications  
Output overvoltage (short-to-battery) protection up to 18 V  
Short-to-battery output flag for wire diagnostics  
Output short-to-ground protection  
Fifth-order, low-pass video filter  
0.1 dB flatness to 3 MHz  
ENA  
+V  
(LFCSP ONLY)  
S
ADA4432-1  
IN  
OUT  
×1  
STB  
×2  
SD  
−3 dB bandwidth of 10 MHz  
45 dB rejection at 27 MHz  
OFFSET  
Ultralow power-down current: 13.5 µA typical  
Low quiescent current  
7.6 mA typical (ADA4432-1)  
GND  
13.2 mA typical (ADA4433-1)  
Figure 1.  
Low supply voltage: 2.6 V to 3.6 V  
Small packaging  
8-lead, 3 mm × 3 mm LFCSP  
ENA  
+V  
STB  
2R  
S
ADA4433-1  
6-lead SOT-23 (ADA4432-1 only)  
Wide operating temperature range: −40°C to +125°C  
+IN  
–IN  
×1  
SD  
R
R
+
–OUT  
+OUT  
STB  
APPLICATIONS  
STB  
2R  
Automotive rearview cameras  
Automotive video electronic control units (ECUs)  
Surveillance video systems  
×1  
SD  
GND  
GENERAL DESCRIPTION  
Figure 2.  
The ADA4432-1 (single-ended output) and ADA4433-1  
(differential output) are fully integrated video reconstruction  
filters that combine overvoltage protection (short-to-battery [STB]  
protection) and short-to-ground (STG) protection on the outputs,  
with excellent video specifications and low power consumption.  
The combination of STB protection and robust ESD tolerance  
allows the ADA4432-1 and the ADA4433-1 to provide superior  
protection in the hostile automotive environment.  
The short-to-battery protection integrated into the ADA4432-1  
and ADA4433-1 protects against both dc and transient  
overvoltage events, caused by an accidental short to a battery  
voltage up to 18 V. The Analog Devices, Inc., short-to-battery  
protection eliminates the need for large output coupling capacitors  
and other complicated circuits used to protect standard video  
amplifiers, saving space and cost.  
The ADA4432-1 and ADA4433-1 feature a high-order filter with  
−3 dB cutoff frequency response at 10 MHz and 45 dB of rejection  
at 27 MHz. The ADA4432-1 and ADA4433-1 feature an internally  
fixed gain of 2 V/V. This makes the ADA4432-1 and ADA4433-1  
ideal for SD video applications, including NTSC and PAL.  
The ADA4432-1 is a single-ended input/single-ended output  
video filter capable of driving long back-terminated cables.  
The ADA4433-1 is a fully differential video filter that can be  
used as a fully differential input to a differential output or as a  
single-ended input to a differential output, allowing it to easily  
connect to both differential and single-ended sources. It is  
capable of driving twisted pair or coaxial cable with minimal  
line attenuation. Differential signal processing reduces the effects  
of ground noise, which can plague ground referenced systems.  
The ADA4433-1 is ideal for differential signal processing (gain  
and filtering) throughout the signal chain, simplifying the  
conversion between single-ended and differential components.  
The ADA4432-1 and ADA4433-1 operate on single supplies as  
low as 2.6 V and as high as 3.6 V while providing the dynamic  
range required by the most demanding video systems.  
The ADA4432-1 and ADA4433-1 are offered in an 8-lead, 3 mm ×  
3 mm LFCSP package. The ADA4432-1 is also available in a  
6-lead SOT-23 package. All are rated for operation over the  
wide automotive temperature range of −40°C to +125°C.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Overvoltage (Short-to-Battery) Protection ................................ 15  
Short-to-Battery Output Flag ................................................... 15  
ESD Protection ........................................................................... 16  
Enable/Disable Modes (ENA Pin) ........................................... 16  
Operating Supply Voltage Range.............................................. 16  
Applications Information .............................................................. 17  
Methods of Transmission.......................................................... 17  
Printed Circuit Board (PCB) Layout ....................................... 17  
Configuring the ADA4433-1 for Single-Ended Input Signals... 18  
Pin-Compatible ADA4432-1 and ADA4433-1 ...................... 19  
Typical Application Circuits ..................................................... 20  
Fully DC-Coupled Transmission Line .................................... 22  
Low Power Considerations....................................................... 23  
Outline Dimensions....................................................................... 24  
Ordering Guide .......................................................................... 25  
Automotive Products................................................................. 25  
Applications....................................................................................... 1  
General Description ......................................................................... 1  
Functional Block Diagrams............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
ADA4432-1 Specifications .......................................................... 3  
ADA4433-1 Specifications .......................................................... 4  
Absolute Maximum Ratings............................................................ 6  
Thermal Resistance ...................................................................... 6  
Maximum Power Dissipation ..................................................... 6  
ESD Caution.................................................................................. 6  
Pin Configuration and Function Descriptions............................. 7  
Typical Performance Characteristics ............................................. 9  
ADA4432-1 Typical Performance Characteristics................... 9  
ADA4433-1 Typical Performance Characteristics................. 12  
Theory of Operation ...................................................................... 15  
Short Circuit (Short-to-Ground) Protection.............................. 15  
REVISION HISTORY  
5/12—Rev. 0 to Rev. A  
Changed Fully Differential Transmission Mode Section to Fully  
Differential Mode Section ............................................................. 17  
Added Pin Compatible ADA4432-1 and ADA4433-1 Section,  
Example Configuration for Package-Compatible PCB Section,  
and Figure 48 to Figure 51 ............................................................ 19  
Added Figure 52 ............................................................................. 20  
Added Figure 54 ............................................................................. 22  
Added Low Power Consideration, Figure 56, and Figure 57.... 23  
Updated Outline Dimensions....................................................... 24  
Changes to Ordering Guide.......................................................... 25  
Added ADA4432-1 and 6-Lead SOT-23 .........................Universal  
Added Figure 1; Renumbered Sequentially .................................. 1  
Added Table 1; Renumbered Sequentially .................................... 3  
Changes to Table 2............................................................................ 4  
Added Figure 4, Figure 5, Table 5, and Table 6............................. 7  
Added Figure 7 to Figure 24............................................................ 9  
Changes to Operating Supply Voltage Range Section ............... 16  
Added Methods of Transmission Section, Pseudo Differential  
Mode (Unbalanced Source Termination) Section, Figure 43,  
Pseudo Differential Mode (Balanced Source Impedance)  
Section and Figure 44..................................................................... 17  
4/12—Revision 0: Initial Version  
Rev. A | Page 2 of 28  
 
Data Sheet  
ADA4432-1/ADA4433-1  
SPECIFICATIONS  
ADA4432-1 SPECIFICATIONS  
TA = 25°C, +VS = 3.3 V, RL = 150 Ω, unless otherwise specified.  
Table 1.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
DYNAMIC PERFORMANCE  
−3 dB Small Signal Bandwidth  
−3 dB Large Signal Bandwidth  
VOUT = 0.2 V p-p  
VOUT = 2 V p-p  
ADA4432-1W only: TMIN to TMAX  
VOUT = 2 V p-p  
ADA4432-1W only: TMIN to TMAX  
VOUT = 2 V p-p  
f = 27 MHz, VOUT = 2 V p-p  
ADA4432-1W only: TMIN to TMAX  
Modulated 10-step ramp, sync tip at 0 V  
Modulated 10-step ramp, sync tip at 0 V  
f = 100 kHz to 5 MHz  
10.5  
10.5  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
dB  
%
Degrees  
ns  
dB  
9.3  
8.6  
8.3  
7.6  
1 dB Flatness  
9.4  
0.1 dB Flatness  
Out-of-Band Rejection  
3.3  
43  
37  
35  
Differential Gain  
Differential Phase  
Group Delay Variation  
Pass Band Gain  
0.38  
0.69  
8
5.80  
5.57  
6
6.24  
6.44  
ADA4432-1W only: TMIN to TMAX  
dB  
NOISE/HARMONIC PERFORMANCE  
Signal-to-Noise Ratio  
100% white signal, f = 100 kHz to 5 MHz  
70  
dB  
INPUT CHARACTERISTICS  
Input Voltage Range  
Limited by the output voltage range  
ADA4432-1W only: TMIN to TMAX  
0 to 1.34 0 to 1.4  
0 to 1.45  
0 to 1.47  
V
V
GΩ  
pF  
pA  
0 to 1.3  
>1.0  
8
Input Resistance  
Input Capacitance  
Input Bias Current  
35  
OUTPUT CHARACTERISTICS  
Output Offset Voltage  
VIN = 0 V  
ADA4432-1W only: TMIN to TMAX  
RL = 150 Ω  
192  
280  
300  
+VS − 0.42  
+VS − 0.45  
mV  
mV  
V
V
mA  
mA  
Output Voltage Swing  
0.28  
0.30  
37  
ADA4432-1W only: TMIN to TMAX  
Linear Output Current  
Short-Circuit Output Current  
SHORT-TO-BATTERY  
50  
Overvoltage Protection Range  
+VS  
+VS  
6.3  
6.0  
18  
18  
8.1  
8.4  
V
V
V
V
ns  
ns  
ADA4432-1W only: TMIN to TMAX  
Back termination = 75 Ω  
ADA4432-1W only: TMIN to TMAX  
After the fault is applied  
STB Output Trigger Threshold  
7.2  
Disconnect Time  
Reconnect Time  
150  
300  
After the fault is removed  
POWER SUPPLY  
Power Supply Range1  
Quiescent Current  
2.6  
3.6  
10  
13  
20  
25  
V
No input signal, no load  
ADA4432-1W only: TMIN to TMAX  
ENA = 0 V  
7.6  
14  
mA  
mA  
µA  
µA  
mA  
mA  
dB  
Quiescent Current, Disabled  
ADA4432-1W only: TMIN to TMAX  
Quiescent Current, Short-to-Battery Short-to-battery fault condition: 18 V  
Quiescent Current, Short to Ground Short on far end of output termination (75 Ω)  
PSRR  
4.6  
47  
−63  
Δ+VS RIPPLE  
=
0.3 V, f = dc  
ENABLE PIN  
Input Leakage Current  
ENA = high/low  
+0.3/−14  
µA  
Rev. A | Page 3 of 28  
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
LOGIC OUTPUT/INPUT LEVELS  
STB VOH  
STB VOL  
ENA VIH  
ENA VIL  
VOUT ≥ 7.2 V (fault condition)  
VOUT ≤ 3.1 V (normal operation)  
Input voltage to enable device  
Input voltage to disable device  
3.3  
V
mV  
V
0.02  
≥2.4  
≤0.6  
V
OPERATING TEMPERATURE RANGE  
−40  
+125  
°C  
1 Recommended range for optimal performance. Exceeding this range is not recommended.  
ADA4433-1 SPECIFICATIONS  
TA = 25°C, +VS = 3.3 V, V−IN = 0.5 V, RL = 150 Ω, unless otherwise specified.  
Table 2.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
DYNAMIC PERFORMANCE  
−3 dB Small Signal Bandwidth  
−3 dB Large Signal Bandwidth  
VOUT = 0.2 V p-p  
VOUT = 2 V p-p  
ADA4433-1W only: TMIN to TMAX  
VOUT = 2 V p-p  
ADA4433-1W only: TMIN to TMAX  
VOUT = 2 V p-p  
9.9  
9.9  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
dB  
%
Degrees  
ns  
dB  
8.8  
8.2  
7.7  
7.2  
1 dB Flatness  
8.7  
0.1 dB Flatness  
Out-of-Band Rejection  
3
45  
f = 27 MHz  
41  
39  
ADA4433-1W only: TMIN to TMAX  
Modulated 10-step ramp, sync tip at 0 V  
Modulated 10-step ramp, sync tip at 0 V  
f = 100 kHz to 5 MHz  
Differential Gain  
Differential Phase  
Group Delay Variation  
Pass Band Gain  
0.5  
1.7  
8
5.89  
5.71  
6
6.15  
6.28  
ADA4433-1W only: TMIN to TMAX  
dB  
NOISE/HARMONIC PERFORMANCE  
Signal-to-Noise Ratio  
100% white signal, f = 100 kHz to 5 MHz  
67  
dB  
INPUT CHARACTERISTICS  
Input Common-Mode Voltage Range  
0 to 2.1 0 to 2.2  
0 to 2.3  
0 to 2.5  
V
V
ADA4433-1W only: TMIN to TMAX  
Differential  
Common mode  
0 to 2.0  
800  
400  
1.8  
Input Resistance  
kΩ  
kΩ  
pF  
pA  
dB  
Input Capacitance  
Input Bias Current  
CMRR  
Common mode  
30  
−55  
V−IN = V+IN = 0.1 V to 1.1 V  
OUTPUT CHARACTERISTICS  
Output Offset Voltage  
V+IN = V−IN = 0 V  
1.65  
1.9  
V
ADA4433-1W only: TMIN to TMAX  
Each single-ended output, RL, dm = 150 Ω  
ADA4433-1W only: TMIN to TMAX  
1.9  
+VS − 0.55  
+VS – 0.6  
V
V
V
mA  
mA  
dB  
Output Voltage Swing  
0.54  
0.6  
29  
Linear Output Current  
Short-Circuit Output Current  
Output Balance Error  
SHORT-TO-BATTERY  
60  
−50  
DC to f = 100 kHz, VIN = 0.5 V p-p  
Protection Range  
+VS  
+VS  
5.0  
4.9  
18  
18  
5.7  
6.0  
V
V
V
V
ns  
ns  
ADA4433-1W only: TMIN to TMAX  
Each output back termination = 37.5 Ω  
ADA4433-1W only: TMIN to TMAX  
After the fault is applied  
STB Output Trigger Threshold  
5.4  
Disconnect Time  
Reconnect Time  
150  
300  
After the fault is removed  
Rev. A | Page 4 of 28  
 
 
Data Sheet  
ADA4432-1/ADA4433-1  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
POWER SUPPLY  
Power Supply Range1  
Quiescent Current  
2.6  
3.6  
18  
19  
22  
30  
V
No input signal, no load  
ADA4433-1W only: TMIN to TMAX  
ENA = 0 V  
ADA4433-1W only: TMIN to TMAX  
Short-to-battery fault condition: 18 V  
13.2  
13.5  
mA  
mA  
µA  
µA  
mA  
mA  
dB  
Quiescent Current, Disabled  
Quiescent Current, Short-to-Battery  
Quiescent Current, Short-to-Ground Short on far end of output termination (37.5 Ω)  
PSRR  
18  
60  
−80  
Δ+VS RIPPLE  
=
0.3 V, f = dc  
ENABLE PIN  
Input Leakage Current  
ENA = high/low  
+0.3/−14  
µA  
LOGIC OUTPUT/INPUT LEVELS  
STB VOH  
STB VOL  
ENA VIH  
ENA VIL  
VOUT ≥ 5.7 V (fault condition)  
VOUT ≤ 3 V (normal operation)  
Input voltage to enable device  
Input voltage to disable device  
3.3  
V
V
V
V
0.02  
≥2.4  
≤0.6  
OPERATING TEMPERATURE RANGE  
−40  
+125  
°C  
1 Recommended range for optimal performance. Exceeding this range is not recommended.  
Rev. A | Page 5 of 28  
 
ADA4432-1/ADA4433-1  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
The power dissipated in the package (PD) is the sum of the  
quiescent power dissipation and the power dissipated in the  
package due to the load drive for all outputs. The quiescent  
power is the voltage between the supply pins (VS) times the  
quiescent current (IS). The power dissipated due to the load drive  
depends on the particular application. For each output, the  
power due to load drive is calculated by multiplying the load  
current by the associated voltage drop across the device. The  
power dissipated due to the loads is equal to the sum of the  
power dissipations due to each individual load. RMS voltages  
and currents must be used in these calculations.  
Parameter  
Rating  
Supply Voltage  
4 V  
Output Common-Mode Voltage  
Input Differential Voltage  
Power Dissipation  
Storage Temperature Range  
Operating Temperature Range  
Lead Temperature (Soldering, 10 sec)  
Junction Temperature  
22 V  
+VS  
See Figure 3  
−65°C to +125°C  
−40°C to +125°C  
260°C  
150°C  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Airflow increases heat dissipation, effectively reducing θJA.  
Figure 3 shows the maximum power dissipation in the package  
vs. the ambient temperature for the 6-lead SOT-23 (170°C/W)  
and the 8-lead LFCSP (50°C/W) on a JEDEC standard 4-layer  
board. θJA values are approximate.  
5
T
= 150°C  
J
THERMAL RESISTANCE  
4
3
2
1
θJA is specified for the device soldered to a high thermal  
conductivity 4-layer (2s2p) circuit board, as described in  
EIA/JESD 51-7.  
LFCSP  
Table 4.  
Package Type  
6-Lead SOT-23  
8-Lead LFCSP  
θJA  
170  
50  
θJC  
Unit  
°C/W  
°C/W  
SOT-23  
Not applicable  
5
0
–40  
MAXIMUM POWER DISSIPATION  
–20  
0
20  
40  
60  
80  
100  
120  
AMBIENT TEMPERATURE (ºC)  
The maximum safe power dissipation in the ADA4432-1 and  
ADA4433-1 packages are limited by the associated rise in  
junction temperature (TJ) on the die. At approximately 150°C,  
which is the glass transition temperature, the plastic changes its  
properties. Exceeding a junction temperature of 150°C for an  
extended time can result in changes in the silicon devices,  
potentially causing failure.  
Figure 3. Maximum Power Dissipation vs.  
Ambient Temperature for a 4-Layer Board  
ESD CAUTION  
Rev. A | Page 6 of 28  
 
 
 
 
 
Data Sheet  
ADA4432-1/ADA4433-1  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
ADA4432-1  
ADA4432-1  
NC  
1
2
3
4
8
7
6
5
IN  
IN  
GND  
NC  
1
2
3
6
5
4
+V  
S
ENA  
GND  
NC  
STB  
TOP VIEW  
(Not to  
Scale)  
TOP VIEW  
(Not to Scale)  
ENA  
OUT  
+V  
S
OUT  
NOTES  
1. NC = NO CONNECT.  
2. THE EXPOSED PAD CAN BE CONNECTED  
TO THE GROUND PLANE.  
NOTES:  
1. NC = NO CONNECT.  
Figure 4. ADA4432-1 LFCSP Pin Configuration, Top View  
Figure 5. ADA4432-1 SOT-23 Pin Configuration, Top View  
Table 5. ADA4432-1 LFCSP Pin Function Descriptions  
Table 6. ADA4432-1 SOT-23 Pin Function Descriptions  
Pin  
Pin  
No. Mnemonic Description  
No. Mnemonic Description  
1
2
NC  
STB  
No Connect. Do not connect to this pin.  
1
2
3
4
5
IN  
GND  
NC  
OUT  
ENA  
Input.  
Short-to-Battery Indicator Output. A logic  
high indicates a short-to-battery condition,  
and a logic low indicates normal operation.  
Positive Power Supply. Bypass with 0.1 µF  
capacitor to GND.  
Amplifier Output.  
No Connect. Do not connect to this pin.  
Power Supply Ground Pin.  
Power Supply Ground Pin.  
No Connect. Do not connect to this pin.  
Amplifier Output.  
Enable Function. Connect to +VS or float for  
normal operation; connect to GND for  
device disable.  
3
+VS  
4
5
6
7
OUT  
NC  
GND  
ENA  
6
+VS  
Positive Power Supply. Bypass with 0.1 µF  
capacitor to GND.  
Enable Function. Connect to +VS or float for  
normal operation; connect to GND for  
device disable.  
8
IN  
Input.  
EPAD  
The exposed pad can be connected to the  
ground plane.  
Rev. A | Page 7 of 28  
 
ADA4432-1/ADA4433-1  
Data Sheet  
ADA4433-1  
–IN  
1
2
3
4
8
7
6
5
+IN  
ENA  
GND  
–OUT  
STB  
TOP VIEW  
(Not to  
Scale)  
+V  
S
+OUT  
NOTES  
1. THE EXPOSED PAD CAN BE CONNECTED  
TO THE GROUND PLANE.  
Figure 6. ADA4433-1 LFCSP Pin Configuration, Top View  
Table 7. ADA4433-1 LFCSP Pin Function Descriptions  
Pin No.  
Mnemonic Description  
1
2
−IN  
STB  
Inverting Input.  
Short-to-Battery Indicator Output. A logic high indicates a short-to-battery condition, and a logic low indicates  
normal operation.  
3
4
5
6
7
8
+VS  
Positive Power Supply. Bypass with a 0.1 µF capacitor to GND.  
Noninverting Output.  
Inverting Output.  
Ground.  
Enable Function. Connect to +VS or float for normal operation; connect to GND for device disable.  
Noninverting Input.  
+OUT  
−OUT  
GND  
ENA  
+IN  
EPAD  
The exposed pad can be connected to the ground plane.  
Rev. A | Page 8 of 28  
Data Sheet  
ADA4432-1/ADA4433-1  
TYPICAL PERFORMANCE CHARACTERISTICS  
ADA4432-1 TYPICAL PERFORMANCE CHARACTERISTICS  
TA = 25°C, +VS = 3.3 V, RL = 150 Ω, unless otherwise specified.  
12  
6
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
V
= 0.2V p-p  
OUT  
V
= 0.2V p-p  
0
–6  
OUT  
V
= 2.0V p-p  
OUT  
V
= 2.0V p-p  
OUT  
–12  
–18  
–24  
–30  
–36  
–42  
–48  
–54  
–60  
–66  
0.1  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 7. Frequency Response at Various Output Amplitudes  
Figure 10. 1 dB Flatness Response at Various Output Amplitudes  
12  
6
6.5  
V
= 2.0V p-p  
V
= 2.0V p-p  
OUT  
OUT  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
0
–40°C  
–6  
+125°C  
+25°C  
–12  
–18  
–24  
–30  
–36  
–42  
–48  
–54  
–60  
–66  
+125°C  
–40°C  
+25°C  
0.1  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 8. Large Signal Frequency Response at Various Temperatures  
Figure 11. 1 dB Flatness Response at Various Temperatures  
7.0  
100  
V
= 2.0V p-p  
OUT  
R
= 75Ω  
LOAD  
90  
80  
70  
60  
50  
40  
30  
20  
10  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
R
= 100Ω  
LOAD  
R
= 150Ω  
LOAD  
0.1  
1
10  
0.1  
1
10  
FREQUENCY (MHz)  
100  
FREQUENCY (MHz)  
Figure 9. 1 dB Flatness Response at Various Load Resistances  
Figure 12. Group Delay vs. Frequency  
Rev. A | Page 9 of 28  
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
1.5  
1.5  
1.0  
f = 3.58MHz  
f = 3.58MHz  
1.0  
0.5  
0.5  
0
0
–0.5  
–1.0  
–1.5  
–0.5  
–1.0  
–1.5  
0
1
2
3
4
5
6
7
8
9
10  
11  
0
1
2
3
4
5
6
7
8
9
10  
11  
Figure 13. Differential Gain Plot  
Figure 16. Differential Phase Plot  
6.05  
60  
50  
40  
30  
20  
10  
0
6.04  
6.03  
6.02  
6.01  
6.00  
5.99  
5.98  
5.97  
5.96  
5.95  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
0
0.01  
0.02  
0.03  
0.04  
0.05  
OUTPUT OFFSET DRIFT (V)  
TEMPERATURE (°C)  
Figure 14. DC Pass Band Gain Drift (−40°C to +125°C)  
Figure 17. Total Output Offset Voltage Drift (−40°C to +125°C)  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
12  
V
ENA  
10  
+125°C  
+25°C  
–40°C  
8
V
OUT  
6
4
2
0
–0.5  
–1.0  
–200  
0
200 400 600 800 1000 1200 1400 1600 1800  
TIME (ns)  
0
0.4  
0.8  
1.2  
1.6  
2
2.4  
2.8  
3.2  
ENABLE VOLTAGE (V)  
Figure 18. Supply Current vs. Enable Voltage at Various Temperatures  
Figure 15 Enable (ENA)/Disable Time  
Rev. A | Page 10 of 28  
Data Sheet  
ADA4432-1/ADA4433-1  
13  
12  
11  
10  
9
4
3
2
1
0
STB OUTPUT  
RESET POINT  
OVER  
VOLTAGE  
PULSE  
8
STB OUTPUT  
TRIGGER POINT  
7
6
5
4
STB OUTPUT  
V
OUT  
3
2
1
0
–1  
0
200  
400  
600  
800  
1000  
1200  
1400  
1600  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18  
TIME (ns)  
SHORT-TO-BATTERY (V)  
Figure 19. STB Output Flag Response Time  
Figure 22. STB Output Response vs. Short-to-Battery Voltage on Outputs  
11  
0
REFFERED TO OUTPUT  
–10  
10  
9
SOT-23  
–20  
LFCSP  
–30  
8
–40  
–50  
–60  
7
6
–40  
–20  
0
20  
40  
60  
80  
100  
120  
0.1  
1
10  
FREQUENCY (MHz)  
100  
TEMPERATURE (°C)  
Figure 20. Supply Current vs. Temperature  
Figure 23. Power Supply Rejection Ratio (PSRR) vs. Frequency  
3.3  
–40  
V
= 1.0V p-p  
IN  
–50  
–60  
2.7  
2.1  
LFCSP  
SOT-23  
–70  
–80  
1.5  
–90  
0.9  
–100  
–110  
–120  
–130  
0.3  
–0.3  
0
100 200 300 400 500 600 700 800 900 1000  
TIME (ns)  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 21. Output Transient Response  
Figure 24. Input-to-Output Off (Disabled) Isolation vs. Frequency  
Rev. A | Page 11 of 28  
ADA4432-1/ADA4433-1  
Data Sheet  
ADA4433-1 TYPICAL PERFORMANCE CHARACTERISTICS  
TA = 25°C, +VS = 3.3 V, V−IN = 0.5 V, RL = 150 Ω, unless otherwise specified.  
12  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
V
= 0.2V p-p  
OUT  
6
0
V
= 0.2V p-p  
OUT  
V
= 2.0V p-p  
OUT  
–6  
–12  
–18  
–24  
–30  
–36  
–42  
–48  
–54  
–60  
–66  
V
= 2.0V p-p  
OUT  
0.1  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
100  
FREQUENCY (MHz)  
Figure 25. Frequency Response at Various Output Amplitudes  
Figure 28. 1 dB Flatness Response at Various Output Amplitudes  
12  
6.5  
V
= 2.0V p-p  
V
= 2.0V p-p  
OUT  
OUT  
6
0
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
–6  
–12  
–18  
–24  
–30  
–36  
–42  
–48  
–54  
–60  
–66  
+125°C  
+25°C  
–40°C  
–40°C  
+25°C  
+125°C  
0.1  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 26. Large Signal Frequency Response at Various Temperatures  
Figure 29. 1 dB Flatness Response at Various Temperatures  
7.0  
100  
V
= 2.0V p-p  
OUT  
R
= 75Ω  
LOAD  
90  
80  
70  
60  
50  
40  
30  
20  
10  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
R
= 100Ω  
LOAD  
R
= 150Ω  
LOAD  
0.1  
1
10  
0.1  
1
10  
FREQUENCY (MHz)  
100  
FREQUENCY (MHz)  
Figure 27. 1 dB Flatness Response at Various Load Resistances  
Figure 30. Group Delay vs. Frequency  
Rev. A | Page 12 of 28  
 
Data Sheet  
ADA4432-1/ADA4433-1  
1.5  
1.5  
1.0  
f = 3.58MHz  
f = 3.58MHz  
1.0  
0.5  
0.5  
0
0
–0.5  
–1.0  
–1.5  
–0.5  
–1.0  
–1.5  
0
1
2
3
4
5
6
7
8
9
10  
11  
0
1
2
3
4
5
6
7
8
9
10  
11  
Figure 31. Differential Gain Plot  
Figure 34. Differential Phase Plot  
–25  
–30  
–35  
–40  
–45  
–50  
–55  
–60  
N = 300  
50  
40  
30  
20  
10  
0
V
= 2.0V p-p  
OUT  
–0.04  
–0.02  
0
0.02  
0.04  
0.1  
1
6
OUTPUT COMMON-MODE OFFSET DRIFT (V)  
FREQUENCY (MHz)  
Figure 32. Output Balance Error vs. Frequency  
Figure 35. Total Output Common-Mode Offset Voltage Drift  
(−40°C to +125°C)  
18  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
ENA  
16  
+125°C  
14  
12  
10  
8
+25°C  
–40°C  
+V  
OUT  
–V  
OUT  
6
4
2
–0.5  
0
–1.0  
–200  
0
0.4  
0.8  
1.2  
1.6  
2.0  
2.4  
2.8  
3.2  
0
200 400 600 800 1000 1200 1400 1600 1800  
TIME (ns)  
ENABLE VOLTAGE (V)  
Figure 33. Enable (ENA)/Disable Time  
Figure 36. Supply Current vs. Enable Voltage at Various Temperatures  
Rev. A | Page 13 of 28  
ADA4432-1/ADA4433-1  
Data Sheet  
13  
4
3
2
1
0
12  
STB OUTPUT  
RESET POINT  
OVER  
VOLTAGE  
11  
PULSE  
10  
9
8
7
6
STB OUTPUT  
TRIGGER POINT  
5
STB  
OUTPUT  
4
3
+V  
OUT  
2
1
–V  
OUT  
0
–1  
0
200  
400  
600  
800  
1000  
1200  
1400  
1600  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18  
TIME (ns)  
SHORT-TO-BATTERY (V)  
Figure 40. STB Output Response vs. Short-to-Battery Voltage on Outputs  
Figure 37. STB Output Flag Response Time  
16  
0
REFERRED TO OUTPUT  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
15  
14  
13  
12  
11  
0.1  
1
10  
FREQUENCY (MHz)  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
Figure 41. Power Supply Rejection Ratio (PSRR) vs. Frequency  
Figure 38. Supply Current vs. Temperature  
3.0  
–50  
V
= 1.0V p-p  
IN  
2.7  
2.4  
2.1  
1.8  
1.5  
1.2  
0.9  
0.6  
–60  
–70  
–80  
–90  
–100  
0
100  
200  
300  
400  
500  
600  
700  
800  
0.1  
1
10  
FREQUENCY (MHz)  
100  
TIME (ns)  
Figure 39. Output Transient Response  
Figure 42. Input-to-Output Off (Disabled) Isolation vs. Frequency  
Rev. A | Page 14 of 28  
Data Sheet  
ADA4432-1/ADA4433-1  
THEORY OF OPERATION  
The ADA4432-1 and ADA4433-1 can withstand voltages of up  
to 18 V on the outputs. Critical internal nodes are protected from  
exposure to high voltages by circuitry that isolates the output  
devices from the high voltage and limits internal currents. This  
protection is available whether the device is enabled or disabled,  
even when the supply voltage is removed.  
The ADA4432-1 and ADA4433-1 with short-to-battery and  
short-to-ground protection are designed as fifth-order, low-pass  
filters with a fixed gain of 2 that is capable of driving 2 V p-p video  
signals into doubly terminated video transmission lines on a single  
supply as low as 2.6 V. The filter has a 1 dB flatness of 9 MHz  
and provides a typical out-of-band rejection of 45 dB at 27 MHz.  
The output devices are disconnected when the voltage at the  
output pins exceeds the supply voltage. After the overvoltage  
condition is removed, internal circuitry pulls the output voltage  
back within normal operating levels. The output devices are  
reconnected when the voltage at the output pins falls below the  
supply voltage by about 300 mV. When the devices are used with a  
doubly terminated cable, the voltage sensed at the output pins is  
lower than the voltage applied to the cable by the voltage drop  
across the back termination resistor. The maximum voltage drop  
across the back termination resistor is limited by the short-circuit  
current protection; therefore, the threshold at which the over-  
voltage protection responds to a voltage applied to the cable is  
The ADA4432-1 is a single-ended filter/driver that can be used  
with both ac- and dc-coupled inputs and outputs, with an input  
range that includes ground for use with a ground referenced  
digital-to-analog converter (DAC) in a single-supply application.  
To ensure accurate reproduction of ground referenced signals  
without saturating the output devices, an internal offset is  
added to shift the output voltage up by 200 mV.  
The ADA4433-1 is a fully differential filter/driver that is also  
designed for compliance with both ac- and dc-coupled inputs and  
outputs. The ADA4433-1 can be driven by a differential or single-  
ended source and provides a fully differential output signal that  
is biased at a voltage equal to half the supply voltage (+VS/2). When  
the device is used with a single-ended input source, bias the  
inverting input, −IN, at the middle of the input voltage range  
applied to the noninverting input, +IN, allowing each output  
signal to swing equally around the midsupply point (see the  
Configuring the ADA4433-1 for Single-Ended Input Signals  
section). This is particularly important to maximize output  
voltage headroom in low supply voltage applications.  
V
THRESH (CABLE) = +VS + ILIMITRT  
where:  
VTHRESH (CABLE) is the voltage applied to the cable that activates the  
internal isolation circuitry.  
+VS is the positive supply voltage.  
I
R
LIMIT is the internal short-circuit current limit, typically 50 mA.  
T the back termination resistance.  
If the voltage applied to the cable is lower than VTHRESH (CABLE), the  
voltage seen at the output pins is lower than the supply voltage,  
so no overvoltage condition is detected. However, the internal  
circuitry is protected by the short circuit current limit; therefore,  
the ADA4432-1/ADA4433-1 can withstand an indefinite duration  
short to any positive voltage up to 18 V without damage.  
SHORT CIRCUIT (SHORT-TO-GROUND) PROTECTION  
Both the ADA4432-1 and ADA4433-1 include internal protection  
circuits that limit the output sink or source current to 60 mA.  
This short circuit protection prevents damage to the ADA4432-1  
and ADA4433-1 when the output(s) are shorted to ground, to a  
low impedance source, or together (in the case of the ADA4433-1)  
for an extended time. In addition, in the case of the ADA4433-1,  
the total sink or source current for both outputs is limited to  
50 mA, which helps protect the device in the event of both outputs  
being shorted to a low impedance. However, short circuit  
protection does not affect the normal operation of the devices  
because one output sources current, whereas the other output  
sinks current when driving a differential output signal.  
SHORT-TO-BATTERY OUTPUT FLAG  
In addition to the internal protection circuitry, the short-to-  
battery output flag (STB pin) indicates an overvoltage condition  
on either or both output pins. The flag is present whenever the  
internal overvoltage protection is active; therefore, it is available  
when the device is enabled or disabled. It is not available, however,  
when the supply voltage is removed, although the internal  
protection is still active. The threshold at which the short-to-  
battery flag is activated and deactivated is the same as the  
threshold for the protection circuitry.  
OVERVOLTAGE (SHORT-TO-BATTERY) PROTECTION  
Both the ADA4432-1 and ADA4433-1 include internal protection  
circuits to ensure that internal circuitry is not subjected to  
extreme voltages or currents during an overvoltage event  
applied to their outputs. A short-to-battery condition usually  
consists of a voltage on the outputs that is significantly higher  
than the power supply voltage of the amplifier. Duration can  
vary from a short transient to a continuous fault.  
Table 8. STB Pin Logic  
STB Pin Output  
High (Logic 1)  
Low (Logic 0)  
Device State  
Overvoltage fault condition  
Normal operation  
Rev. A | Page 15 of 28  
 
 
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
Table 9. ENA Pin Function  
ENA Pin Input  
ESD PROTECTION  
Device State  
All pins on the ADA4432-1 and ADA4433-1 are protected with  
internal ESD protection structures connected to the power supply  
pins (+VS and GND). These structures provide protection during  
the handling and manufacturing process.  
High (Logic 1)  
Low (Logic 0)  
High-Z (Floating)  
Enabled  
Disabled  
Enabled  
The outputs (OUT for the ADA4432-1 and +OUT and −OUT  
for the ADA4433-1) can be exposed to dc voltages well above the  
supply voltage in an overvoltage event; therefore, conventional  
ESD structure protection cannot be used. Instead, the outputs  
are protected by Analog Devices proprietary ESD devices, which  
allow protection and recovery from an overvoltage event while  
providing ESD protection well beyond the handling and  
manufacturing requirements.  
OPERATING SUPPLY VOLTAGE RANGE  
The ADA4432-1 and ADA4433-1 are specified over an operating  
supply voltage range of 2.6 V to 3.6 V. This range establishes the  
nominal utilization voltage at which the devices perform in  
conformance with their specifications. The operating supply  
voltage refers to sustained voltage levels and not to a momentary  
voltage excursion that can occur due to variation in the output of  
the supply regulator. When the devices operate at the limits of the  
operating supply voltage range (2.6 V to 3.6 V), excursions that are  
outside of this range, but less than the absolute maximum, can  
lead to some performance degradation; however, they do not  
damage the device.  
The outputs of the ADA4432-1 and ADA4433-1 are ESD  
protected to survive 8 kV and 6 kV human body model  
(HBM), respectively.  
ENABLE/DISABLE MODES (ENA PIN)  
The power-down or enable/disable (ENA) pin is internally pulled  
up to +VS through a 250 kΩ resistor. When the voltage on this  
pin is high, the amplifier is enabled; pulling ENA low disables  
the ADA4432-1 and ADA4433-1, reducing the supply current  
to a very low 13.5 µA. With no external connection, this pin  
floats high, enabling the amplifier.  
Rev. A | Page 16 of 28  
 
 
 
Data Sheet  
ADA4432-1/ADA4433-1  
APPLICATIONS INFORMATION  
Fully Differential Mode  
METHODS OF TRANSMISSION  
The ADA4433-1 is designed to be used as a fully differential driver.  
The differential outputs of the ADA4433-1 allow fully balanced  
transmission using twisted or untwisted pair cable. In this  
configuration, the differential output termination consists of two  
source resistors, one on each output, and each equal to half the  
receiver input termination. For example, in a 75 Ω system, each  
output of the ADA4433-1 is back terminated with 37.5 Ω resistors  
that are connected to a differential resistance of 75 Ω at the receiver.  
An illustration of this arrangement is shown in Figure 45.  
Pseudo Differential Mode (Unbalanced Source  
Termination)  
The ADA4432-1 can be used as a pseudo differential driver  
with an unbalanced transmission line. Pseudo differential mode  
uses a single conductor to carry an unbalanced data signal from  
the driver to the receiver, while a second conductor is used as a  
ground reference signal.  
The positive conductor connects the ADA4432-1 output to the  
positive input of a differential receiver, such as ADA4830-1. The  
negative wire or ground conductor from the source circuitry  
connects to the negative input of the receiver. Match the impedance  
of the input termination at the receiver to the output termination  
of the ADA4432-1 (see Figure 43).  
DRIVER PCB  
POSITIVE WIRE  
37.5Ω  
37.5Ω  
INP  
75Ω  
INN  
+
ADA4433-1  
ADA4830-1  
DRIVER PCB  
NEGATIVE WIRE  
POSITIVE WIRE  
75Ω  
INP  
75Ω  
INN  
+
Figure 45. Fully Differential Mode  
ADA4432-1  
ADA4830-1  
PRINTED CIRCUIT BOARD (PCB) LAYOUT  
NEGATIVE WIRE  
As with all high speed applications, attention to PCB layout is of  
paramount importance. Adhere to standard high speed layout  
practices when designing with the ADA4432-1 and ADA4433-1.  
A solid ground plane is recommended. Place a 0.1 µF surface-  
mount, ceramic power supply decoupling capacitor as close as  
possible to the supply pin.  
Figure 43. Pseudo Differential Mode  
Pseudo Differential Mode (Balanced Source Impedance)  
Pseudo differential signaling is typically implemented using  
unbalanced source termination, as shown in Figure 43. With this  
arrangement, however, common-mode signals on the positive  
and negative inputs receive different attenuation due to unbalanced  
termination at the source. This effectively converts some of the  
common-mode signal into a differential mode signal, degrading  
the overall common-mode rejection of the system. System  
common-mode rejection can be improved by balancing the output  
impedance of the driver, as shown in Figure 44. Splitting the source  
termination resistance evenly between the hot and cold conductors  
results in matched attenuation of the common-mode signals,  
ensuring maximum rejection.  
Connect the GND pin(s) to the ground plane with a trace that is  
as short as possible. Use controlled impedance traces of the shortest  
length possible to connect to the signal I/O pins and do not run the  
traces over any voids in the ground plane. A 75 Ω impedance level  
is typically used in video applications. All signal outputs of the  
ADA4432-1 and ADA4433-1 should include series termination  
resistors when driving transmission lines.  
When the ADA4432-1 or the ADA4433-1 receives its inputs from a  
device with current outputs, the required load resistor value for  
the output current is most often different from the characteristic  
impedance of the signal traces. In this case, if the interconnections  
are sufficiently short (less than 2 inches), the trace does not  
need to be terminated in its characteristic impedance.  
DRIVER PCB  
POSITIVE WIRE  
37.5Ω  
INP  
75Ω  
INN  
+
ADA4432-1  
ADA4830-1  
37.5Ω  
NEGATIVE WIRE  
Figure 44. Pseudo Differential Mode with Balanced Source Impedance  
Rev. A | Page 17 of 28  
 
 
 
 
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
strictly positive, where each output swings only above V+OUT or  
below V−OUT, the midsupply VOCM level. Directly at the output of the  
ADA4433-1, the output voltage extends from 0.65 V to 2.65 V,  
requiring a full 2 V of output to produce a 1 V p-p signal at the  
receiver (represented by the voltage across 2R).  
CONFIGURING THE ADA4433-1 FOR SINGLE-  
ENDED INPUT SIGNALS  
The ADA4433-1 is a fully differential filter/driver that can be  
used as a single-ended-to-differential amplifier or as a differential-  
to-differential amplifier. In single-ended-to-differential output  
applications, bias the −IN input appropriately to optimize the  
output range. To make the most efficient use of the output range  
of the ADA4433-1, especially with low supply voltages, it is  
important to allow the differential output voltage to swing in  
both a positive and negative direction around the output common-  
mode voltage (VOCM) level, the midsupply point. To do this, the  
differential input voltage must swing both positive and negative.  
Figure 46 shows a 1 V p-p single-ended signal on +IN with −IN  
grounded. This produces a differential input voltage that ranges  
from 0 V to 1 V. The resulting differential output voltage is  
To make a more efficient use of the output range, the −IN input is  
biased at the midpoint of the expected input signal range, as shown  
in Figure 47. A 1 V p-p single-ended signal on +IN, with −IN  
biased at 0.5 V, produces a differential input voltage that ranges  
from −0.5 V to +0.5 V. The resulting differential output voltage  
now contains both positive and negative components, where  
each output swings both above and below the midsupply VOCM  
level. Directly at the output of the ADA4433-1, the output  
voltage now extends only from 1.15 V to 2.15 V, requiring only  
1 V of the output to produce a 1 V p-p signal at the receiver.  
INPUT SIGNAL  
DIFFERENTIAL OUTPUT SIGNAL  
DIFFERENTIAL OUTPUT SIGNAL ACROSS 2R  
2.65V  
V
+OUT  
1V p-p  
ADA4433-1  
1.0V  
0V  
R
2R  
+
V
V
V
+IN  
V
1.65V  
=
OCM  
1V p-p  
OUT  
R
V
–IN  
–OUT  
0.65V  
– V  
V
(IN) = V  
– V  
V
(OUT) = V  
V
= V  
(OUT) ÷ 2  
DIFF  
+IN  
–IN  
DIFF  
+OUT  
–OUT  
OUT  
DIFF  
Figure 46. Single-Ended-to-Differential Configuration with Negative Input (−IN) Connected to Ground  
INPUT SIGNAL  
DIFFERENTIAL OUTPUT SIGNAL  
DIFFERENTIAL OUTPUT SIGNAL ACROSS 2R  
V
+OUT  
ADA4433-1  
2.15V  
1.15V  
1.0V  
R
V
V
+
–IN  
V
1.65V  
=
OCM  
1V p-p  
1V p-p  
V
2R  
OUT  
0.5V  
0V  
R
V
+IN  
–OUT  
V
(IN) = V  
– V  
V
(OUT) = V  
– V  
V
= V  
(OUT) ÷ 2  
DIFF  
+IN  
–IN  
DIFF  
+OUT  
–OUT  
OUT  
DIFF  
Figure 47. Single-Ended-to-Differential Configuration with Negative Input (−IN) Connected to 0.5 V  
Rev. A | Page 18 of 28  
 
 
 
Data Sheet  
ADA4432-1/ADA4433-1  
Example Configuration for Package-Compatible PCB  
PIN-COMPATIBLE ADA4432-1 AND ADA4433-1  
The single-ended output with the ADA4432-1 includes the following:  
The ADA4432-1 and ADA4433-1 are single-ended output and  
differential output, respectively, short-to-battery protected video  
filters for automotive applications. Each version shares a common  
package, the 8-lead LFSCP, which allows them to share a common  
pinout and footprint. This allows a designer to change from a  
single-ended output configuration to a differential output on  
the same PCB with only minimal change to the external resistor  
values and placements. Figure 48 and Figure 50 show the pin  
configuration of the ADA4432-1 and ADA4433-1 in 8-lead  
LFCSP packages. Figure 49 and Figure 51 show an example  
schematic configured for the ADA4432-1 and the ADA4433-1,  
respectively.  
R1 matches the requirement for the source.  
R2, R3, and R6 are not installed.  
C3 is not installed.  
R5 is chosen to match the receiver termination impedance.  
R8 is 0 Ω to provide ground reference.  
The differential output with the ADA4433-1 includes the following:  
R1 matches the requirement for the source.  
R2 and R3 are chosen to provide the correct bias for −IN.  
C3 is for the −IN bypass.  
R5 and R6 are chosen to match the receiver termination  
impedance.  
R8 is not installed.  
ADA4432-1  
ADA4433-1  
NC  
1
2
3
4
8
7
6
5
IN  
–IN  
1
2
3
4
8
7
6
5
+IN  
ENA  
GND  
NC  
ENA  
GND  
–OUT  
STB  
STB  
TOP VIEW  
(Not to  
Scale)  
TOP VIEW  
(Not to  
Scale)  
+V  
+V  
S
S
OUT  
+OUT  
NOTES  
1. NC = NO CONNECT.  
2. THE EXPOSED PAD MAY BE CONNECTED  
TO THE GROUND PLANE.  
NOTES  
1. THE EXPOSED PAD MAY BE CONNECTED  
TO THE GROUND PLANE.  
Figure 48. 8-Lead LFCSP Package Pin Configuration, ADA4432-1  
Figure 50. 8-Lead LFCSP Package Pin Configuration, ADA4433-1  
ENA  
ENA  
R6  
DNI  
R6  
37.5Ω  
GROUND  
REFERENCE  
CONDUCTOR  
NEGATIVE  
OUTPUT  
VIDEO  
INPUT  
VIDEO  
INPUT  
CONDUCTOR  
R8  
0Ω  
R8  
DNI  
R1  
75Ω  
8
7
6
5
R1  
75Ω  
8
7
6
5
IN ENA GND NC  
+IN ENA GND –OUT  
ADA4432-1  
ADA4433-1  
+V  
+V  
S
S
NC STB +V  
OUT  
4
–IN STB +V +OUT  
S
S
R3  
DNI  
R3  
7.5kΩ  
1
2
3
1
2
3
4
R5  
75Ω  
R5  
37.5Ω  
POSITIVE  
OUTPUT  
POSITIVE  
OUTPUT  
CONDUCTOR  
CONDUCTOR  
C3  
DNI  
R2  
DNI  
C3  
0.1µF  
R2  
1.33kΩ  
+V  
S
+V  
S
C1  
2.2µF  
C2  
0.1µF  
C1  
C2  
0.1µF  
2.2µF  
STB  
STB  
Figure 49. Example Compatible Schematic Configured for the ADA4432-1  
Figure 51. Example Compatible Schematic Configured for the ADA4433-1  
Rev. A | Page 19 of 28  
 
 
 
 
 
ADA4432-1/ADA4433-1  
Data Sheet  
TYPICAL APPLICATION CIRCUITS  
VDD_IO  
33µF  
10µF  
0.1µF  
100nF  
GND_IO  
GND_IO  
GND_IO  
GND_IO  
PVDD  
VAA  
33µF  
10µF  
0.1µF  
100nF  
PGND  
PGND  
PGND  
PGND  
33µF  
10µF  
0.1µF  
100nF  
AGND  
1µF  
AGND  
AGND  
AGND  
AGND  
VDD  
33µF  
10µF  
0.1µF  
100nF  
DGND  
DGND  
DGND  
DGND  
ENABLE  
(INPUT)  
STB FLAG  
(OUTPUT)  
VAA  
P0  
P1  
P2  
P3  
P4  
P5  
P6  
P7  
COMP  
RSET  
2.2µF  
0.1µF  
AGND  
PIXEL PORT  
INPUTS  
AGND  
+V  
4.12kΩ  
2.2nF  
ADV7391/  
ADV7393  
ENA  
S
STB  
AGND  
P8  
P9  
P10  
VOUT  
IN  
75Ω  
DAC1  
DAC2  
DAC3  
STB  
75Ω  
P11 (ADV7393 ONLY)  
PIXEL PORT  
INPUTS  
TWISTED  
PAIR  
300Ω  
P12  
P13  
P14  
P15  
AGND  
SOT-23 PACKAGE  
ADA4432-1  
GND  
HSYNC  
VSYNC  
CONTROL  
INPUTS/OUTPUTS  
AGND  
CLOCK INPUT  
I2C PORT  
CLKIN  
SDA  
SCL  
ALSB  
DGND  
RESET  
PVDD  
EXT_LF  
12nF  
AGND PGND DGND DGND GND_IO  
150nF 170Ω  
AGND PGND DGND DGND GND_IO  
EXTERNAL LOOP  
FILTER  
(OPTIONAL)  
Figure 52. ADA4432-1 and ADV7391/ADV7393 Video Encoder Application Circuit  
Rev. A | Page 20 of 28  
 
Data Sheet  
ADA4432-1/ADA4433-1  
VDD_IO  
33µF  
10µF  
0.1µF  
100nF  
GND_IO  
PVDD  
GND_IO  
GND_IO  
GND_IO  
33µF  
10µF  
0.1µF  
100nF  
PGND  
PGND  
VAA  
PGND  
PGND  
33µF  
10µF  
0.1µF  
100nF  
AGND  
1µF  
AGND  
VDD  
AGND  
AGND  
AGND  
33µF  
10µF  
0.1µF  
100nF  
DGND  
DGND  
DGND  
DGND  
ENABLE  
(INPUT)  
STB FLAG  
(OUTPUT)  
VAA  
P0  
P1  
P2  
P3  
P4  
P5  
P6  
P7  
COMP  
2.2µF  
0.1µF  
AGND  
PIXEL PORT  
INPUTS  
R
SET  
AGND  
+V  
4.12kΩ  
2.2nF  
ADV7391/  
ADV7393  
ENA  
STB  
S
AGND  
P8  
P9  
P10  
+IN  
DAC 1  
DAC 2  
DAC 3  
P11 (ADV7393 ONLY)  
–OUT  
+OUT  
PIXEL PORT  
INPUTS  
VAA  
7.5kΩ  
37.5Ω  
37.5Ω  
300Ω  
STB  
STB  
P12  
P13  
P14  
P15  
75Ω  
TWISTED  
PAIR  
AGND  
–IN  
HSYNC  
VSYNC  
CONTROL  
INPUTS/OUTPUTS  
1.33kΩ  
0.1µF  
ADA4433-1  
GND  
CLOCK INPUT  
CLKIN  
AGND  
SDA  
SCL  
ALSB  
2
I C PORT  
AGND  
DGND  
RESET  
PVDD  
EXT_LF  
12nF  
AGND PGND DGND DGND GND_IO  
150nF 170Ω  
AGND PGND DGND DGND GND_IO  
EXTERNAL LOOP  
FILTER  
(OPTIONAL)  
Figure 53. ADA4433-1 and ADV7391/ADV7393 Video Encoder Application Circuit  
Rev. A | Page 21 of 28  
ADA4432-1/ADA4433-1  
Data Sheet  
levels at the transmitter and receiver is within the common-mode  
range of the receiver, very little current flow results, and no image  
degradation is anticipated.  
FULLY DC-COUPLED TRANSMISSION LINE  
The ADA4432-1and ADA4433-1 are designed to be used with  
high common-mode rejection, high input impedance receivers  
such as the ADA4830-1, ADA4830-2, or other generic receivers.  
Figure 54 and Figure 55 show an example configuration of a  
completely dc-coupled transmission using the ADA4432-1 and  
the ADA4433-1 along with a high input impedance differential  
receiver.  
The very low output impedance of the ADA4432-1 and the  
ADA4433-1 allow them to be used in fully dc-coupled transmission  
line applications in which there may be a significant discrepancy  
between voltage levels at the ground pins of the driver and  
receiver. As long as the voltage difference between reference  
STB FLAG  
(OUTPUT)  
+V  
(5.0V)  
S
ENABLE  
(INPUT)  
4.99kΩ  
ENABLE  
(INPUT)  
+V  
(3.3V)  
S
+
2.2µF  
ENA  
+VS  
0.1µF  
STB FLAG  
(OUTPUT)  
+VS  
STB  
2.2µF  
0.1µF  
VREF  
4.7µF  
ENA  
+V  
STB  
S
FROM  
75Ω  
TWISTED  
PAIR  
IMAGER  
OR VIDEO  
ENCODER  
OUT  
IN  
T
75Ω  
INP  
+
TO VIDEO  
DECODER  
STB  
VOUT  
0.1µF  
75Ω  
INN  
R
+
ADA4432-1  
LFCSP PACKAGE  
ADA4830-1  
GND  
GND  
Figure 54. ADA4432-1 Video Filter and the ADA4830-1 Difference Amplifier in a DC-Coupled Configuration  
STB FLAG  
(OUTPUT)  
+V  
(5.0V)  
S
ENABLE  
(INPUT)  
4.99kΩ  
ENABLE  
(INPUT)  
+V  
(3.3V)  
STB FLAG  
(OUTPUT)  
S
+
2.2µF  
ENA  
+VS  
0.1µF  
+
+VS  
STB  
2.2µF  
ENA  
0.1µF  
+V  
STB  
S
FROM  
IMAGER  
ADA4433-1  
VREF  
4.7µF  
OR VIDEO  
ENCODER  
75Ω  
TWISTED  
PAIR  
+IN  
TO  
VIDEO  
LPF  
–OUT  
+OUT  
37.5Ω  
37.5Ω  
INP  
DECODER  
+
R
T
VOUT  
75Ω  
INN  
0.1µF  
+
+V  
S
–IN  
ADA4830-1  
LPF  
7.5kΩ  
GND  
GND  
1.33kΩ  
0.1µF  
Figure 55. ADA4433-1 Video Filter and ADA4830-1 Difference Amplifier in a DC-Coupled Configuration  
Rev. A | Page 22 of 28  
 
 
 
Data Sheet  
ADA4432-1/ADA4433-1  
For more detailed information on low drive mode, see the  
ADV7391 data sheet.  
LOW POWER CONSIDERATIONS  
Using a series source termination and a shunt load termination on  
a low supply voltage with the ADA4432-1 or ADA4433-1 realizes  
significant power savings compared with driving a video cable  
directly from a DAC output. Figure 56 shows a video DAC  
driving a cable directly. Properly terminated, a DAC driven  
transmission line requires two 75 Ω loads in parallel, demanding  
in excess of 33 mA to reach a full-scale voltage level of 1.3 V.  
Figure 57 shows the same video load being driven using the  
ADA4432-1 and a series-shunt termination. This requires two  
times the output voltage to drive the equivalent of 150 Ω but  
only requires a little more than 15 mA to reach a full-scale output.  
When running on the same supply voltage as the DAC, this result  
in a 74% reduction in power consumption compared with the  
circuit in Figure 56. The high order filtering provided by the  
ADA4432-1 lowers the requirements on the DAC oversampling  
ratio, realizing further power savings. The main source for power  
savings realized by the configuration shown in Figure 57 comes  
from the low drive mode setting for the ADV7391. This along  
with the reduction in the requirement for oversampling (PLL  
turned off), and the reduced load current required, results in  
significant power savings.  
3.3V  
ADV7391  
75Ω CABLE  
R
SET  
75Ω  
510Ω  
75Ω  
Figure 56. Driving a Video Transmission Line Directly with a DAC  
3.3V  
3.3V  
75Ω  
ADV7391  
ADA4432-1  
75Ω CABLE  
R
SET  
300Ω  
4.12kΩ  
75Ω  
Figure 57. Driving a Video Transmission Line with the ADA4432-1  
Rev. A | Page 23 of 28  
 
 
 
ADA4432-1/ADA4433-1  
OUTLINE DIMENSIONS  
Data Sheet  
2.44  
2.34  
2.24  
3.10  
3.00 SQ  
2.90  
0.50 BSC  
8
5
PIN 1 INDEX  
AREA  
EXPOSED  
PAD  
1.70  
1.60  
1.50  
0.50  
0.40  
0.30  
4
1
PIN 1  
INDICATOR  
(R 0.15)  
TOP VIEW  
BOTTOM VIEW  
FOR PROPER CONNECTION OF  
THE EXPOSED PAD, REFER TO  
THE PIN CONFIGURATION AND  
FUNCTION DESCRIPTIONS  
0.80  
0.75  
0.70  
0.05 MAX  
0.02 NOM  
COPLANARITY  
0.08  
SECTION OF THIS DATA SHEET.  
SEATING  
PLANE  
0.30  
0.25  
0.20  
0.203 REF  
COMPLIANT TOJEDEC STANDARDS MO-229-WEED  
Figure 58. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
3 mm × 3 mm Body, Very Very Thin, Dual Lead  
(CP-8-11)  
Dimensions shown in millimeters  
3.00  
2.90  
2.80  
6
1
5
2
4
3
3.00  
2.80  
2.60  
1.70  
1.60  
1.50  
PIN 1  
INDICATOR  
0.95 BSC  
1.90  
BSC  
1.30  
1.15  
0.90  
0.20 MAX  
0.08 MIN  
1.45 MAX  
0.95 MIN  
0.55  
0.45  
0.35  
0.15 MAX  
0.05 MIN  
10°  
4°  
0°  
SEATING  
PLANE  
0.60  
BSC  
0.50 MAX  
0.30 MIN  
COMPLIANT TO JEDEC STANDARDS MO-178-AB  
Figure 59. 6-Lead Small Outline Transistor Package [SOT-23]  
(RJ-6)  
Dimensions shown in millimeters  
Rev. A | Page 24 of 28  
 
Data Sheet  
ADA4432-1/ADA4433-1  
ORDERING GUIDE  
Temperature  
Range  
Package  
Option  
Ordering  
Branding Quantity  
Model1, 2  
Package Description  
ADA4432-1BRJZ-R2  
ADA4432-1BRJZ-R7  
ADA4432-1WBRJZ-R7  
ADA4432-1BRJ-EBZ  
ADA4432-1BCPZ-R2  
ADA4432-1BCPZ-R7  
ADA4432-1WBCPZ-R7  
ADA4432-1BCP-EBZ  
ADA4433-1BCPZ-R2  
ADA4433-1BCPZ-R7  
ADA4433-1WBCPZ-R7  
ADA4433-1BCP-EBZ  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
6-Lead Small Outline Transistor Package [SOT-23]  
6-Lead Small Outline Transistor Package [SOT-23]  
6-Lead Small Outline Transistor Package [SOT-23]  
SOT-23 Evaluation Board  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
LFCSP_WD Evaluation Board  
RJ-6  
RJ-6  
RJ-6  
322  
322  
323  
250  
3000  
3000  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
CP-8-11  
CP-8-11  
CP-8-11  
321  
321  
H33  
250  
1500  
1500  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
Evaluation Board  
CP-8-11  
CP-8-11  
CP-8-11  
331  
331  
H2Z  
250  
1500  
1500  
1 Z = RoHS Compliant Part.  
2 W = Qualified for Automotive Applications.  
AUTOMOTIVE PRODUCTS  
The ADA4432-1W and ADA4433-1W models are available with controlled manufacturing to support the quality and reliability  
requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial  
models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products  
shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product  
ordering information and to obtain the specific Automotive Reliability reports for these models.  
Rev. A | Page 25 of 28  
 
 
 
ADA4432-1/ADA4433-1  
NOTES  
Data Sheet  
Rev. A | Page 26 of 28  
Data Sheet  
NOTES  
ADA4432-1/ADA4433-1  
Rev. A | Page 27 of 28  
ADA4432-1/ADA4433-1  
NOTES  
Data Sheet  
©2012 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D10597-0-5/12(A)  
Rev. A | Page 28 of 28  

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