ADD8704 [ADI]
16 V Quad Operational Amplifier; 16 V四路运算放大器
| 型号： | ADD8704 |
| 厂家： | 
ADI |
| 描述： | 16 V Quad Operational Amplifier |
| 文件： | 总16页 (文件大小：546K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
16 V Quad
Operational Amplifier
ADD8704
FEATURES
PIN CONFIGURATIONS
Single-supply operation: 4.5 V to 16.5 V
Upper/lower buffers swing to VDD/GND
Continuous output current: 35 mA
VCOM peak output current: 250 mA
Offset voltage: 15 mV
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
V–
+
–
+ –
Slew rate: 6 V/µs
ADD8704
Unity gain stable with large capacitive loads
Supply current: 700 µA per amplifier
Drop-in replacement for EL5420
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
+
–
+ –
8
APPLICATIONS
TFT LCD monitor panels
TFT LCD notebook panels
Communications equipment
Portable instrumentation
Electronic games
Figure 1. 14-Lead TSSOP (RU Suffix)
12 –IN D
11 +IN D
10 V–
–IN A
+IN A
V+
1
2
3
4
GENERAL DESCRIPTION
ADD8704
TOP VIEW
The ADD8704 is a single-supply quad operational amplifier that
has been optimized for today’s low cost TFT LCD notebook and
monitor panels. Output channels A and D swing to the rail for
use as end-point gamma references. Output channels B and C
provide high continuous and peak current drive for use as VCOM
or repair amplifiers; they can also be used as midpoint gamma
references. All four amplifiers have excellent transient response
and have high slew rate and capacitive load drive capability. The
ADD8704 is specified over the –40°C to +85°C temperature
range and is available in either a 14-lead TSSOP or a 16-lead
LFCSP package for thin, portable applications.
+IN B
9 +IN C
Figure 2. 16-Lead CSP (CP Suffix)
Table 1. Input/Output Characteristics
Channel
VIH
VIL
IO (mA)
15
35
35
15
ISC (mA)
150
250
250
150
A
B
C
D
VDD – 1.7 V
VDD – 1.7 V
VDD
GND
GND
GND
GND + 1.7 V
VDD
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
ADD8704
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
Application Information................................................................ 12
Theory.......................................................................................... 12
Input............................................................................................. 12
Output.......................................................................................... 12
Important Note........................................................................... 12
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADD8704
ELECTRICAL CHARACTERISTICS
Table 2. VS = 16 V, VCM = VS/2, TA @ 25°C, unless otherwise noted
Parameter
Symbol
Condition
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
VOS
2
10
200
15
mV
µV/°C
nA
nA
nA
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
∆VOS/∆T
IB
1100
1500
100
Input Offset Current
IOS
10
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
VCM = 0 to (VS – 1.7 V)
VCM = 0 to (VS – 1.7 V)
VCM = 0 to VS
250
nA
Common-Mode Rejection Ratio
Amp A
Amp B
Amp C
Amp D
Large Signal Voltage Gain
Input Impedance
Input Capacitance
OUTPUT CHARACTERISTIS
Output Voltage High (A)
Optimized for Low Swing
CMRR
54
54
54
54
1
95
95
95
95
10
400
1
dB
dB
dB
dB
V/mV
kΩ
pF
VCM = 1.7 V to VS
RL = 10 kΩ, VO = 0.5 to (VS – 0.5 V)
AVO
ZIN
CIN
VOH
VOH
VOH
VOH
VOL
VOL
VOL
VOL
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
IL = 5 mA
15.985
15.75
V
V
V
V
V
V
V
V
V
V
V
V
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
15.6
15.5
Output Voltage High (B)
Optimized for VCOM
15.995
15.9
15.8
15.75
Output Voltage High (C)
Optimized for Midrange
15.995
15.9
15.8
15.75
Output Voltage High (D)
Optimized for High Swing
15.99
15.85
15.75
15.65
Output Voltage Low (A)
Optimized for Low Swing
20
80
200
300
Output Voltage Low (B)
Optimized for VCOM
5
50
150
250
Output Voltage Low (C)
Optimized for Midrange
5
50
150
250
Output Voltage Low (D)
Optimized for High Swing
50
375
500
600
–40°C ≤ TA ≤ +85°C
Continuous Output Current (A and D)
Continuous Output Current (B and C)
Peak Output Current (A and D)
Peak Output Current (B and C)
SUPPLY CHARACTERISTICS
Supply Voltage
IOUT
IOUT
IPK
15
35
50
200
VS = 16 V
VS = 16 V
IPK
VS
PSRR
ISY
4.5
70
16
V
Power Supply Rejection Ratio
Total Supply Current
VS = 4 V to 17 V, –40°C ≤ TA ≤ +85°C
VO = VS/2, No Load
–40°C ≤ TA ≤ +85°C
90
2.8
dB
mA
mA
3.4
4
Rev. 0 | Page 3 of 16
ADD8704
ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameter
Symbol
Condition
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
–3 dB Bandwidth
SR
RL = 2 kΩ, CL = 200 pF
RL = 10 kΩ, CL = 40 pF
RL = 10 kΩ, CL = 40 pF
RL = 10 kΩ, CL = 40 pF
4
6
V/µs
GBP
BW
Øo
5.8
6.8
55
75
MHz
MHz
Degrees
dB
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise Density (A, B, and C)
en
en
en
en
in
f = 1 kHz
f = 10 kHz
f = 1 kHz
f = 10 kHz
f = 10 kHz
26
25
36
35
0.8
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
Voltage Noise Density (D)
Current Noise Density
Rev. 0 | Page 4 of 16
ADD8704
ABSOLUTE MAXIMUM RATINGS
Table 3. ADD8704 Stress Ratings1
Table 4. Package Characteristics
Package Type
2
Parameter
Rating
θJA
θJC
35
303
Unit
°C/W
°C/W
Supply Voltage (VS)
18 V
14-Lead TSSOP (RU)
180
383
Input Voltage
–0.5 V to VS + 0.5 V
VS
–65°C to +150°C
–40°C to +85°C
–65°C to +150°C
300°C
16-Lead LFCSP (CP)
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature Range
ESD Tolerance (HBM)
ESD Tolerance (MM)
1 Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
1500 V
175 V
2 θJA is specified for worst-case conditions, i.e., θJA is specified for devices
soldered onto a circuit board for surface-mount packages.
3 DAP is soldered down to PCB.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this part features proprietary
ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
Rev. 0 | Page 5 of 16
ADD8704
TYPICAL PERFORMANCE CHARACTERISTICS
600
10
8
V
S
= 16V
V
= 16V
S
500
400
300
200
100
0
6
4
C
2
B
0
A
–2
–4
–6
D
–8
–10
–9
–7
–5
–3
–1
1
3
5
7
9
11
0
2
4
6
8
10
12
14
16
INPUT OFFSET VOLTAGE (mV)
COMMON-MODE VOLTAGE (V)
Figure 3. Input Offset Voltage, VS = 16 V
Figure 6. Offset Voltage vs. Common-Mode Voltage
20
18
16
14
12
10
8
400
200
V
= 16V
S
V
= 16V
S
A
0
–200
–400
–600
–800
–1000
D
B
C
6
4
2
0
0
10
20
30
40
50
60
70
80
90 100
–60
–40
–20
0
20
40
60
80
100
TCVOS (µV/°C)
TEMPERATURE (°C)
Figure 7. Input Bias Current vs. Temperature
Figure 4. Input Offset Voltage Drift, VS = 16 V
80
10
8
V
= 16V
V
= 16V
S
S
V
= V /2
S
CM
60
40
6
4
A
D
B
20
2
C
D
0
0
B
C
–2
–4
–6
–8
–20
–40
A
–60
–80
–10
–60
–60
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 8. Input Offset Current vs. Temperature
Figure 5. Input Bias Current vs. Temperature
Rev. 0 | Page 6 of 16
ADD8704
100k
10k
100k
10k
1k
V
= 16V
V
= 16V
S
S
CHANNEL A
CHANNEL D
1k
100
10
100
10
SINK
SOURCE
SOURCE
SINK
1
1
0.1
0.1
0.0001
0.001
0.01
0.1
1
10
100
100
100
0.0001
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 9. Channel A Output Voltage vs. Load Current
Figure 12. Channel D Output Voltage vs. Load Current
10k
1k
10k
1k
V
= 4.5V
V
= 16V
S
S
SOURCE
CHANNEL B
D
100
10
100
A
B, C
SOURCE
10
1
SINK
1
0.1
0.1
0.0001
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 10. Channel B Output Voltage vs. Load Current
Figure 13. Output Source Voltage vs. Load Current, All Channels
10k
1k
10k
V
= 16V
V
= 4.5V
S
S
CHANNEL C
SINK
1k
D
A
100
100
SOURCE
B, C
10
10
1
SINK
1
0.1
0.1
0.0001
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 11. Channel C Output Voltage vs. Load Current
Figure 14. Output Sink Voltage vs. Load Current, All Channels
Rev. 0 | Page 7 of 16
ADD8704
16.00
15.95
15.90
15.85
15.80
15.75
0.80
0.75
0.70
0.65
0.60
V
= 16V
S
V
= 16V
S
I
= 5mA
SOURCE
B
C
D
A
15.70
–60
–40
–20
0
20
40
60
80
100
100
18
–60
–40
–20
0
20
40
60
80
100
0
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 15. Output Source Voltage vs. Temperature
Figure 18. Supply Current vs. Temperature
500
450
400
80
60
40
20
0
V
= 16V
S
L
L
V
= 16V
S
R
C
= 10kΩ
I
= 5mA
SINK
= 40pF
D
45
350
300
90
250
200
150
100
50
135
180
225
A
B
C
0
–20
–60
–40
–20
0
20
40
60
80
1k
10k
100k
FREQUENCY (Hz)
1M
10M
100M
TEMPERATURE (°C)
Figure 16. Output Sink Voltage vs. Temperature
Figure 19. Frequency vs. Gain and Shift
1.0
0.9
0.8
0.7
0.6
80
40
60
20
0
0
V
= 4.5V
= 10kΩ
= 40pF
S
L
L
R
C
45
90
0.5
0.4
0.3
0.2
0.1
0
135
180
225
–20
0
2
4
6
8
10
12
14
16
1k
10k
100k
FREQUENCY (Hz)
1M
10M
100M
SUPPLY VOLTAGE (V)
Figure 17. Supply Current vs. Supply Voltage
Figure 20. Frequency vs. Gain and Shift
Rev. 0 | Page 8 of 16
ADD8704
50
40
30
20
120
100
80
60
40
20
0
V
= 16V
S
L
L
R
C
= 10kΩ
= 40pF
V
= 16V
S
A
A
A
= 100
= 10
= 1
V
V
V
10
0
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Closed-Loop Gain vs. Frequency
Figure 24. Common-Mode Rejection vs. Frequency
16
14
12
10
8
100
80
60
40
20
0
V
= 16V
= 10kΩ
= 1
S
R
A
L
V = 16V
S
V
+PSRR
PSRR
ٛ
6
4
2
0
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22. Output Swing vs. Frequency
Figure 25. Common-Mode Rejection vs. Frequency
675
600
525
100
90
80
70
60
50
40
V
= ±8V
= ±50mV
= 1
A
= 1
S
V
V
IN
A
R
V
L
–OS
= 2k
Ω
V
= 4.5V
S
450
375
300
+OS
225
150
75
30
20
10
0
V
= 16V
S
0
100
1k
10k
100k
1M
10M
10
100
1k
10k
FREQUENCY (Hz)
CAPACITIVE LOAD (pF)
Figure 26. Overshoot vs. Capacitive Load
Figure 23. Impedance vs. Frequency
Rev. 0 | Page 9 of 16
ADD8704
20
R
= 10kΩ
L
10
0
100pF
50pF
–10
–20
–30
–40
–50
540pF
1040pF
10M
100k
1M
FREQUENCY (Hz)
30M
TIME (40µs/DIV)
Figure 27.Gain vs. Capacitive Load
Figure 30. No Phase Reversal
20
15
V
= 16V
V
= 16V
S
S
R
C
= 2kΩ
L
= 100pF
LOAD
10
5
2kΩ
0
10kΩ
1kΩ
150Ω
–5
–10
–15
–20
–25
–30
100k
1M
10M
100M
TIME (0.2µs/DIV)
FREQUENCY (Hz)
Figure 28. Gain vs. Resistive Load
Figure 31. Small-Signal Transient Response
11
10
9
V
= 16V
S
8
120pF
7
1nF
10nF
320pF
6
5
4
3
520pF
2
1
0
V
= 16V
S
R
C
SERIES = 33Ω
OUT
= 0.1µF
LOAD
–200
200
600
1000
1400
1800
TIME (20µs/DIV)
TIME (ns)
Figure 29. Transient Load Response
Figure 32. Small-Signal Transient Response
Rev. 0 | Page 10 of 16
ADD8704
70
60
50
40
30
V
= 16V
= 2kΩ
DD
V = 16V
S
R
C
L
L
MARKER SET @ 10kHz
MARKER READING = 36.6nV/ Hz
CHANNEL D
= 100pF
20
10
0
–10
0
5
10
15
20
25
TIME (2µs/DIV)
FREQUENCY (Hz)
Figure 33. Large Signal Transient Response
Figure 35. Voltage Noise Density vs. Frequency
70
60
50
40
V
= 16V
S
MARKER SET @ 10kHz
MARKER READING = 25.7nV/ Hz
CHANNEL A, B, C
30
20
10
0
–10
0
5
10
15
20
25
FREQUENCY (Hz)
Figure 34. Voltage Noise Density vs. Frequency
Rev. 0 | Page 11 of 16
ADD8704
APPLICATION INFORMATION
THEORY
Amplifier C is a rail-to-rail input range that makes the
ADD8704 suitable for use anywhere on the RDAC as well as for
The ADD8704 is designed for use in LCD gamma correction
circuits. Depending on the panel architecture, between 4 and 18
different gamma voltages may be needed. These gamma
voltages provide the reference voltages for the column driver
RDACs. Due to the capacitive nature of LCD panels, it is
necessary for these drivers to provide high capacitive load drive.
VCOM applications.
Amplifier D has an NPN follower input stage. This covers the
upper rail to GND plus 1.7 V. This amplifier is suitable for the
upper range of the RDAC.
OUTPUT
In addition to providing gamma reference voltages, these parts
are also capable of providing the VCOM voltage. VCOM is the
center voltage common to all the LCD pixels. Since the VCOM
circuit is common to all the pixels in the panel, the VCOM driver
is designed to supply continuous currents up to 35 mA.
The outputs of the amplifiers have been designed to match the
performance needs of the gamma correction circuit. All four of
the amplifiers have rail-to-rail outputs, but the current drive
capabilities differ. Since amplifier A is suited for voltages close
to VSS (GND), the output is designed to sink more current than
it sources; it can sink 15 mA of continuous current. Likewise,
since amplifier D is primarily used for voltages close to VDD, it
sources more current. Amplifier D can source 15 mA of
continuous current. Amplifiers B and C are designed for use as
either midrange gamma or VCOM amplifiers. They therefore sink
and source equal amounts of current. Since they are used as
VCOM amplifiers, they have a drive capability of up to 35 mA of
continuous current.
INPUT
The ADD8704 has four amplifiers specifically designed for the
needs of an LCD panel. Figure 36 shows a typical gamma
correction curve for a normally white twisted nematic LCD
panel. The symmetric curve comes from the need to reverse the
polarity on the LC pixels to avoid “burning” in the image. The
application therefore requires gamma voltages that come close
to both supply rails. To accommodate this transfer function, the
ADD8704 has been designed to have four different amplifiers in
one package.
The nature of LCD panels introduces a large amount of
parasitic capacitance from the column drivers as well as the
capacitance associated with the liquid crystals via the common
plane. This makes capacitive drive capability an important
factor when designing the gamma correction circuit.
V
DD
V
G1
V
V
V
G2
IMPORTANT NOTE
G3
G4
Because of the asymmetric nature of amplifiers A and D, care
must be taken to connect an input that forces the amplifiers to
operate in their most productive output states. Amplifier D has
very limited sink capabilities, while amplifier A does not source
well. If more than one ADD8704 is used, set the amplifier D
input to enable the amplifier output to source current and set
the amplifier A input to force a sinking output current. This
means making sure the input is above the midpoint of the
common-mode input range for amplifier D and below the
midpoint for amplifier A. Mathematically speaking, make sure
VIN > VS/2 for amplifier D and VIN < VS/2 for amplifier A.
V
V
G5
G6
V
V
G7
G8
V
G9
V
G10
V
SS
0
16
32
48
64
GRAY SCALE BITS
Figure 36. LCD Gamma Correction Curve
Figure 37 shows an example using 4 ADD8704s to generate 10
gamma outputs. Note that the top three resistor tap-points are
connected to the amplifier D inputs, thus assuring these
channels will source current. Likewise, the bottom three resistor
tap-points are connected to the amplifier A inputs to provide
sinking output currents.
Amplifier A has a single-supply PNP input stage followed by a
folded cascode stage. This provides an input range that goes to
the bottom rail. This amplifier can therefore be used to provide
the bottom voltage on the RDAC string.
Amplifier B (PNP folded cascode) swings to the low rail as well,
but it provides 35 mA continuous output current versus 15 mA.
This buffer is suitable for lower RDAC range, middle RDAC
range, or VCOM applications.
Rev. 0 | Page 12 of 16
ADD8704
V
DD
ADD8704
TP 1
TP 2
TP 3
TP 4
TP 1
TP 4
TP 5
TP 8
D
GAMMA 1
GAMMA 4
GAMMA 5
GAMMA 8
C
B
A
V
DD
ADD8704
TP 5
TP 6
TP 7
TP 8
TP 2
TP 6
TP 7
TP 9
D
GAMMA 2
GAMMA 6
GAMMA 7
GAMMA 9
RESISTOR STRING
TO COLUMN DRIVER
C
B
A
V
DD
ADD8704
TP 9
TP 3
NC
D
GAMMA 3
NC
TP 10
C
A
B
TP 10
V
DD
GAMMA 10
V
COM
Figure 37. Using Four ADD8704s to Generate 10 Gamma Outputs
Rev. 0 | Page 13 of 16
ADD8704
OUTLINE DIMENSIONS
5.10
5.00
4.90
14
8
7
4.50
4.40
4.30
6.40
BSC
1
PIN 1
0.65
BSC
1.05
1.00
0.80
0.20
0.09
1.20
MAX
0.75
0.60
0.45
8°
0°
0.15
0.05
0.30
0.19
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 38. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU)
Dimensions shown in millimeters
4.0
BSC SQ
0.60 MAX
PIN 1
INDICATOR
0.60 MAX
13
12
16
1
0.65 BSC
PIN 1
INDICATOR
2.25
2.10 SQ
1.95
TOP
VIEW
3.75
BSC SQ
BOTTOM
VIEW
0.75
0.60
0.50
4
9
8
5
0.25 MIN
1.95 BSC
0.80 MAX
0.65 TYP
12° MAX
0.05 MAX
0.02 NOM
1.00
0.85
0.80
0.35
0.28
0.25
0.20 REF
COPLANARITY
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 39. 16-Terminal Leadless Frame Chip Scale Package [LFCSP] (CP)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADD8704ARU
Temperature Range
–40°C to +85°C
Package Description
Package Option
RU-14
14-Lead Thin Shrink SOIC
ADD8704ARU-REEL
ADD8704ARUZ1
ADD8704ARUZ-REEL1
ADD8704ACPZ-R21
ADD8704ACPZ-REEL71
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
14-Lead Thin Shrink SOIC
14-Lead Thin Shrink SOIC
14-Lead Thin Shrink SOIC
16-Terminal Leadless Frame Chip Scale
16-Terminal Leadless Frame Chip Scale
RU-14
RU-14
RU-14
CP-16
CP-16
1 Z = Pb-free part.
Rev. 0 | Page 14 of 16
ADD8704
NOTES
Rev. 0 | Page 15 of 16
ADD8704
NOTES
© 2003 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C04417–0–10/03(0)
Rev. 0 | Page 16 of 16
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