ADEL2020ARZ-20-REEL [ADI]
OP-AMP, 10000uV OFFSET-MAX, 8MHz BAND WIDTH, PDSO20, PLASTIC, SOIC-20;
| 型号： | ADEL2020ARZ-20-REEL |
| 厂家： | 
ADI |
| 描述： | OP-AMP, 10000uV OFFSET-MAX, 8MHz BAND WIDTH, PDSO20, PLASTIC, SOIC-20 放大器 光电二极管 |
| 文件： | 总12页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Improved Second Source
to the EL2020
ADEL2020
FEATURES
CONNECTION DIAGRAMS
Ideal for Video Applications
0.02% Differential Gain
8-Lead PDIP (N)
20-Lead SOIC (R)
0.04ꢀ Differential Phase
0.1 dB Bandwidth to 25 MHz (G = +2)
High Speed
90 MHz Bandwidth (–3 dB)
500 V/ꢁs Slew Rate
60 ns Settling Time to 0.1% (VO = 10 V Step)
Low Noise
2.9 nV/√Hz Input Voltage Noise
Low Power
6.8 mA Supply Current
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
NC
BAL
NC
–IN
NC
+IN
NC
V–
NC
BAL
–IN
+IN
V–
1
2
3
4
8
7
6
5
DISABLE
V+
DISABLE
NC
ADEL2020
TOP VIEW
OUTPUT
BAL
V+
ADEL2020
TOP VIEW
NC
OUTPUT
NC
BAL
NC
NC
2.1 mA Supply Current (Power-Down Mode)
High Performance Disable Function
Turn-Off Time of 100 ns
NC 10
NC
NC = NO CONNECT
Input to Output Isolation of 54 dB (Off State)
GENERAL DESCRIPTION
The ADEL2020 offers other significant improvements. The
most important is lower power supply current (33% less than the
competition) with higher output drive. Important specifications
like voltage noise and offset voltage are less than half of those
for the EL2020. The ADEL2020 also provides an improved
disable feature. The disable time (to high output impedance) is
100 ns with guaranteed break before make. The ADEL2020 is
offered for the industrial temperature range of –40°C to +85°C
and comes in both PDIP and SOIC packages.
The ADEL2020 is an improved second source to the EL2020.
This op amp improves on all the key dynamic specifications
while offering lower power and lower cost. The ADEL2020
offers 50% more bandwidth and gain flatness of 0.1 dB to
beyond 25 MHz. In addition, differential gain and phase are
less than 0.05% and 0.05° while driving one back terminated
cable (150 Ω).
+0.1
R
= 150ꢂ
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
L
GAIN = +2
0
ꢃ15V
ꢃ5V
R
R
= 750ꢂ
= 150ꢂ
F
L
–0.1
fC = 3.58MHz
100 IRE
MODULATED RAMP
+0.1
0
R
= 1kꢂ
L
ꢃ15V
ꢃ5V
GAIN
PHASE
–0.1
100k
1M
10M
FREQUENCY – Hz
100M
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE – ꢃV
Figure 1. Fine-Scale Gain (Normalized) vs. Frequency
for Various Supply Voltages, RF = 750 Ω, Gain = +2
Figure 2. Differential Gain and Phase vs. Supply Voltage
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
ADEL2020–SPECIFICATIONS
(@ TA = 25ꢀC, VS = ꢃ15 V dc, RL = 150 Ω, unless otherwise noted.)
ADEL2020A
Parameter
Conditions
Temperature
Min
Typ
Max
Unit
INPUT OFFSET VOLTAGE
1.5
2.0
7
7.5
10.0
mV
mV
µV/°C
TMIN to TMAX
Offset Voltage Drift
COMMON-MODE REJECTION
VCM = 10 V
VOS
Input Current
TMIN to TMAX
TMIN to TMAX
50
65
64
0.1
dB
µA/V
1.0
0.5
POWER SUPPLY REJECTION
VOS
VS = 4.5 V to 18 V
TMIN to TMAX
TMIN to TMAX
72
0.05
dB
µA/V
Input Current
INPUT BIAS CURRENT
–Input
+Input
TMIN to TMAX
TMIN to TMAX
0.5
1
7.5
15
µA
µA
INPUT CHARACTERISTICS
+Input Resistance
–Input Resistance
1
1
10
40
2
MΩ
Ω
+Input Capacitance
pF
OPEN-LOOP TRANSRESISTANCE
VO = 10 V
RL = 400 Ω
TMIN to TMAX
3.5
MΩ
OPEN-LOOP DC VOLTAGE GAIN
RL = 400 Ω, VOUT
RL = 100 Ω, VOUT
=
=
10 V TMIN to TMAX
2.5 V TMIN to TMAX
80
76
100
88
dB
dB
OUTPUT VOLTAGE SWING
Short-Circuit Current
Output Current
RL = 400 Ω
TMIN to TMAX
TMIN to TMAX
12.0
30
13.0
150
60
V
mA
mA
POWER SUPPLY
Operating Range
Quiescent Current
Power-Down Current
Disable Pin Current
Min Disable Pin Current to Disable
3.0
18
10.0
3.0
V
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
6.8
2.1
290
30
mA
mA
µA
µA
Disable Pin = 0 V
400
DYNAMIC PERFORMANCE
3 dB Bandwidth
G = +1; RFB = 820
G = +2; RFB = 750
G = +10; RFB = 680
G = +2; RFB = 750
VO = 20 V p-p,
90
70
30
25
MHz
MHz
MHz
MHz
0.1 dB Bandwidth
Full Power Bandwidth
RL = 400 Ω
8
500
60
0.02
0.04
MHz
V/µs
ns
%
Degree
Slew Rate
RL = 400 Ω, G = +1
10 V Step, G = –1
f = 3.58 MHz
Settling Time to 0.1%
Differential Gain
Differential Phase
f = 3.58 MHz
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
f = 1 kHz
2.9
nV/√Hz
–IIN, f = 1 kHz
+IIN, f = 1 kHz
13
1.5
pA/√Hz
pA/√Hz
OUTPUT RESISTANCE
Open Loop (5 MHz)
15
Ω
Specifications subject to change without notice.
–2–
REV. A
ADEL2020
ABSOLUTE MAXIMUM RATINGS1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation2 . . . . . . . Observe Derating Curves
Output Short Circuit Duration . . . . Observe Derating Curves
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Storage Temperature Range
PDIP and SOIC . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
The maximum power that can be safely dissipated by the
ADEL2020 is limited by the associated rise in junction tempera-
ture. For the plastic packages, the maximum safe junction
temperature is 145°C. If the maximum is exceeded momen-
tarily, proper circuit operation will be restored as soon as the
die temperature is reduced. Leaving the device in the over-
heated condition for an extended period can result in device
burnout. To ensure proper operation, it is important to observe
the derating curves in figure 4.
While the ADEL2020 is internally short circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature is not exceeded under all conditions.
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
28-Lead PDIP: θJA = 90°C/W
2.4
2.2
2.0
20-Lead SOIC Package: θJA = 150°C/W
1.8
+V
S
20-LEAD SOIC
0.1ꢁF
1.6
1.4
10kꢂ
7
1.2
1
8-LEAD PDIP
2
3
–
5
1.0
6
ADEL2020
0.8
0.6
0.4
+
4
0.1ꢁF
–40
–20
0
20
40
60
80
100
–V
S
AMBIENTTEMPERATURE – ꢀC
Figure 3. Offset Null Configuration
Figure 4. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
ADEL2020AN
ADEL2020AR-20
ADEL2020AR-20-REEL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead PDIP
20-Lead SOIC
20-Lead SOIC
N-8
R-20
R-20
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADEL2020 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. A
–3–
ADEL2020–Typical Performance Characteristics
GAIN = +1
L
GAIN = +1
L
R
= 150ꢂ
R
= 1kꢂ
0
0
–45
–90
–135
–180
–225
–270
–45
–90
–135
–180
–225
–270
PHASE
PHASE
V
= ꢃ15V
S
V
= ꢃ15V
ꢃ5V
S
1
0
1
0
ꢃ5V
–1
–2
–3
–4
–5
–1
–2
–3
–4
–5
GAIN
GAIN
V
= ꢃ15V
ꢃ5V
V
= ꢃ15V
ꢃ5V
S
S
1
10
100
1000
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
TPC 1. Closed-Loop Gain and Phase vs. Frequency,
TPC 4. Closed-Loop Gain and Phase vs. Frequency,
G = + 1, RL = 150 Ω, RF = 1 kΩ for 15 V, 910 Ω for 5 V
G = +1, RL = 1 kΩ, RF = 1 kΩ for 15 V, 910 Ω for 5 V
110
110
GAIN = +1
L
GAIN = –1
L
R
= 150ꢂ
R
= 150ꢂ
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
V
= 250mV p-p
V
= 250mV p-p
O
O
<
PEAKING 1.0dB
<
PEAKING 1.0dB
R
= 750ꢂ
R
R
= 499ꢂ
= 681ꢂ
F
F
<
<
PEAKING 0.1dB
R
= 1kꢂ
PEAKING 0.1dB
F
F
F
R
= 1.5kꢂ
R = 1kꢂ
F
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
16
18
20
SUPPLYVOLTAGE – ꢃV
SUPPLYVOLTAGE – ꢃV
TPC 2. –3 dB Bandwidth vs. Supply Voltage,
TPC 5. –3 dB Bandwidth vs. Supply Voltage,
Gain = +1, RL = 150 Ω
Gain = –1, RL = 150 Ω
GAIN = –1
L
GAIN = –1
L
R
= 150ꢂ
R
= 1kꢂ
180
135
90
180
135
90
PHASE
PHASE
V
= ꢃ15V
V
= ꢃ15V
S
S
1
0
45
1
0
45
0
0
ꢃ5V
ꢃ5V
–1
–2
–3
–4
–5
–45
–1
–2
–3
–4
–5
–45
GAIN
GAIN
V
= ꢃ15V
ꢃ5V
V
= ꢃ15V
ꢃ5V
S
S
1
10
100
1000
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
TPC 3. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 150 Ω, RF = 680 Ω for 15 V, 620 Ω for 5 V
TPC 6. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 1 kΩ, RF = 680 Ω for VS = 15 V, 620 Ω
for 5 V
–4–
REV. A
ADEL2020
GAIN = +2
L
GAIN = +2
L
R
= 150ꢂ
R
= 1kꢂ
0
0
–45
–90
–135
–180
–225
–270
–45
–90
–135
–180
–225
–270
PHASE
PHASE
V
= ꢃ15V
V
= ꢃ15V
S
S
7
6
7
6
ꢃ5V
ꢃ5V
5
4
3
2
1
5
4
3
2
1
GAIN
GAIN
V
= ꢃ15V
ꢃ5V
V
= ꢃ15V
ꢃ5V
S
S
1
10
100
1000
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
TPC 7. Closed-Loop Gain and Phase vs. Frequency,
TPC 10. Closed-Loop Gain and Phase vs. Frequency,
G = +2, RL = 150 Ω, RF = 750 Ω for 15 V, 715 Ω for 5 V
G = +2, RL = 1 kΩ, RF = 750 Ω for 15 V, 715 Ω for 5 V
110
110
GAIN = +2
L
GAIN = +10
L
R
= 150ꢂ
R
= 150ꢂ
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
V
= 250mV p-p
V
= 250mV p-p
O
O
<
PEAKING 1.0dB
R
= 500ꢂ
F
<
PEAKING 0.5dB
R
= 232ꢂ
<
F
PEAKING 0.1dB
R
= 750ꢂ
F
R
= 442ꢂ
F
<
PEAKING 0.1dB
R
= 1kꢂ
F
R
= 1kꢂ
F
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
16
18
20
SUPPLYVOLTAGE – ꢃV
SUPPLYVOLTAGE – ꢃV
TPC 8. –3 dB Bandwidth vs. Supply Voltage,
TPC 11. –3 dB Bandwidth vs. Supply Voltage,
Gain = +2, RL = 150 Ω
Gain = +10, RL = 150 Ω
GAIN = +10
GAIN = +10
R
R
= 270ꢂ
= 150ꢂ
R
R
= 270ꢂ
= 1kꢂ
0
0
F
L
F
L
–45
–90
–135
–180
–225
–270
–45
–90
–135
–180
–225
–270
PHASE
PHASE
V
= ꢃ15V
ꢃ5V
V
= ꢃ15V
ꢃ5V
S
S
21
20
21
20
19
18
17
16
15
19
18
17
16
15
GAIN
GAIN
V
= ꢃ15V
ꢃ5V
V
= ꢃ15V
ꢃ5V
S
S
1
10
100
1000
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
TPC 9. Closed-Loop Gain and Phase vs. Frequency,
TPC 12. Closed-Loop Gain and Phase vs. Fre-
G = +10, RL = 150 kΩ
quency, G = +10, RL = 1 kΩ
REV. A
–5–
ADEL2020
30
10
GAIN = +2
= 715ꢂ
V
= ꢃ15V
R
S
F
25
20
V
= ꢃ5V
S
1
OUTPUT LEVEL FOR 3% THD
15
10
5
V
= ꢃ15V
S
0.1
V
= ꢃ5V
S
0
100k
0.01
10k
1M
10M
FREQUENCY – Hz
100M
100k
1M
FREQUENCY – Hz
10M
100M
TPC 13. Maximum Undistorted Output Voltage
vs. Frequency
TPC 16. Closed-Loop Output Resistance vs. Frequency
80
10
9
R
A
= 715ꢂ
= +2
F
V
70
60
50
40
30
20
10
0
V
= ꢃ15V
= ꢃ5V
S
V
= ꢃ15V
8
7
6
5
S
V
= ꢃ5V
V
S
S
CURVES ARE FORWORST-CASE
CONDITIONWHERE ONE
SUPPLY ISVARIEDWHILETHE
OTHER IS HELD CONSTANT
4
10k
100k
1M
10M
100M
–60 –40 –20
0
20
40
60
80
100 120 140
FREQUENCY – Hz
JUNCTIONTEMPERATURE – ꢀC
TPC 14. Power Supply Rejection vs. Frequency
TPC 17. Supply Current vs. Junction Temperature
100
10
1
100
1200
V
= ꢃ5V TO ꢃ15V
R
= 400ꢂ
S
L
1100
1000
900
800
700
600
500
400
300
200
GAIN = –10
INVERTING INPUT
CURRENT
GAIN = +10
10
GAIN = +2
VOLTAGE NOISE
NONINVERTING
INPUT CURRENT
1
100k
0
2
4
6
8
10
12
14
16
18
20
10
100
1k
FREQUENCY – Hz
10k
SUPPLYVOLTAGE – ꢃV
TPC 15. Input Voltage and Current Noise vs. Frequency
TPC 18. Slew Rate vs. Supply Voltage
–6–
REV. A
ADEL2020
1kꢂ
750ꢂ
+V
7
+V
7
S
S
0.1ꢁF
0.1ꢁF
750ꢂ
2
3
–
2
3
–
6
6
V
ADEL2020
V
O
ADEL2020
O
R
R
L
L
V
V
IN
+
+
IN
4
4
0.1ꢁF
0.1ꢁF
R
R
T
T
–V
–V
S
S
Figure 5. Connection Diagram for AVCL = +1
Figure 7. Connection Diagram for AVCL = +2
681ꢂ
270ꢂ
+V
+V
S
S
0.1ꢁF
0.1ꢁF
681ꢂ
30ꢂ
7
7
V
2
3
–
2
3
–
IN
6
6
V
V
O
ADEL2020
ADEL2020
O
R
R
L
L
V
+
+
4
IN
4
0.1ꢁF
0.1ꢁF
R
T
–V
–V
S
S
Figure 6. Connection Diagram for AVCL = –1
Figure 8. Connection Diagram for AVCL = +10
REV. A
–7–
ADEL2020
GENERAL DESIGN CONSIDERATIONS
DISABLE MODE
The ADEL2020 is a current feedback amplifier optimized for
use in high performance video and data acquisition systems.
Since it uses a current feedback architecture, its closed-loop
bandwidth depends on the value of the feedback resistor. The
–3 dB bandwidth is also somewhat dependent on the power
supply voltage. Lowering the supplies increases the values of
internal capacitances, reducing the bandwidth. To compen-
sate for this, smaller values of feedback resistors are used at
lower supply voltages.
By pulling the voltage on Pin 8 to common (0 V), the ADEL2020
can be put into a disabled state. In this condition, the supply
current drops to less than 2.8 mA, the output becomes a high
impedance, and there is a high level of isolation from input to
output. In the case of a line driver, for example, the output
impedance will be about the same as that for a 1.5 kΩ resistor
(the feedback plus gain resistors) in parallel with a 13 pF capacitor
(due to the output), and the input to output isolation will be
better than 50 dB at 10 MHz.
Leaving the disable pin disconnected (floating) will leave the
part in the enabled state.
POWER SUPPLY BYPASSING
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can contribute to resonant circuits that
produce peaking in the amplifier’s response. In addition, if large
current transients must be delivered to the load, then bypass
capacitors (typically greater than 1 µF) will be required to
provide the best settling time and lowest distortion. Although
the recommended 0.1 µF power supply bypass capacitors will
be sufficient in most applications, more elaborate bypassing
(such as using two paralleled capacitors) may be required in
some cases.
In cases where the amplifier is driving a high impedance load,
the input to output isolation will decrease significantly if the
input signal is greater than about 1.2 V p–p. The isolation can
be restored to the 50 dB level by adding a dummy load (say 150 Ω)
at the amplifier output. This will attenuate the feedthrough
signal. (This is not an issue for multiplexer applications where the
outputs of multiple ADEL2020s are tied together as long as at
least one channel is in the ON state.) The input impedance of
the disable pin is about 35 kΩ in parallel with a few pF. When
grounded, about 50 µA flows out of the disable pin for 5 V supplies.
Break-before-make operation is guaranteed by design. If driven
by standard CMOS logic, the disable time (until the output is
high impedance) is about 100 ns and the enable time (to low
impedance output) is about 160 ns. Since it has an internal pull-
up resistor of about 35 kΩ, the ADEL2020 can be used with
open drain logic as well. In that case, the enable time increases
to about 1 µs.
CAPACITIVE LOADS
When used with the appropriate feedback resistor, the ADEL2020
can drive capacitive loads exceeding 1000 pF directly without
oscillation. Another method of compensating for large load
capacitance is to insert a resistor in series with the loop output.
In most cases, less than 50 Ω is all that is needed to achieve an
extremely flat gain response.
If there is a nonzero voltage present on the amplifier’s output
at the time it is switched to the disabled state, some additional
decay time will be required for the output voltage to relax to
zero. The total time for the output to go to zero will normally
be about 250 ns; it is somewhat dependent on the load impedance.
OFFSET NULLING
A 10 kΩ pot connected between Pins 1 and 5, with its wiper con-
nected to V+, can be used to trim out the inverting input current
(with about 20 µA of range). For closed-loop gains above about
5, this may not be sufficient to trim the output offset voltage to
zero. Tie the pot’s wiper to ground through a large value resistor
(50 kΩ for 5 V supplies, 150 kΩ for 15 V supplies) to trim the
output to zero at high closed-loop gains.
OPERATION AS A VIDEO LINE DRIVER
The ADEL2020 is designed to offer outstanding performance at
closed-loop gains of 1 or greater. At a gain of 2, the ADEL2020
makes an excellent video line driver. The low differential gain
and phase errors and wide –0.1 dB bandwidth are nearly inde-
pendent of supply voltage and load. For applications requiring
widest 0.1 dB bandwidth, it is recommended to use 715 Ω feed-
back and gain resistors. This will result in about 0.05 dB of
peaking and a –0.1 dB bandwidth of 30 MHz on 15 V supplies.
–8–
REV. A
ADEL2020
OUTLINE DIMENSIONS
8-Lead Plastic Dual-in-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
20-Lead Standared Small Outline Pacakge [SOIC]
Wide Body
(R-20)
Dimensions shown in millimeters and (inches)
13.00 (0.5118)
12.60 (0.4961)
20
1
11
10
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
ꢄ 45ꢀ
0.30 (0.0118)
0.10 (0.0039)
8ꢀ
0ꢀ
1.27
(0.0500)
BSC
0.51 (0.0201) SEATING
0.33 (0.0130)
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.32 (0.0126)
0.23 (0.0091)
PLANE
COMPLIANT TO JEDEC STANDARDS MS-013AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. A
–9–
ADEL2020
Revision History
Location
Page
1/03—Data Sheet changed from REV. 0 to REV. A.
Format updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
8-Lead PDIP (N) and 20-Lead SOIC (R) updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
OUTLINE DIMENSIONS updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
–10–
REV. A
–11–
–12–
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