ADG1334BRSZ [ADI]
Quad SPDT +-15 V/+12 V Switches; 四路SPDT + -15 V / + 12 V开关
| 型号： | ADG1334BRSZ |
| 厂家： | 
ADI |
| 描述： | Quad SPDT +-15 V/+12 V Switches |
| 文件： | 总12页 (文件大小：324K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Quad SPDT
± ±1 ꢀV/±ꢁ ꢀ Sꢂwitche
ADG±334
FUNCTIONAL BLOCK DIAGRAM
FEATURES
33 V supply range
130 Ω on resistance
Fully specified at 1ꢀ V/+12 V
3 V logic compatible inputs
Rail-to-rail operation
S4A
D2
S1A
D1
S4B
S1B
IN1
IN4
Break-before-make switching action
20-lead SSOP
ADG1334
IN2
IN3
S2B
D2
S3B
D3
APPLICATIONS
Audio and video routing
Battery-powered systems
Signal routing
S2A
S3A
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
1. 3 V logic compatible digital input VIH = 2.0 V, VIL = 0.8 V.
2. No VL logic power supply required.
3. Low power consumption.
The ADG1334 is a monolithic CMOS device comprising
four independently selectable SPDT switches designed on a
CMOS process.
When the switches are on, each switch conducts equally well
in both directions and has an input signal range that extends to
the power supplies. In the off condition, signal levels up to the
supplies are blocked. All switches exhibit break-before-make
switching action for use in multiplexer applications. Inherent in
the design is the low charge injection for minimum transients
when switching the digital inputs.
4. 20-lead SSOP.
Fast switching speed coupled with high signal bandwidth makes
the part suitable for video signal switching. CMOS construction
ensures ultra ow power dissipation, making the part ideally
suited for portable and battery-powered instruments.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADG±334
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Terminology .......................................................................................7
Typical Performance Characteristics ..............................................8
Test Circuits..................................................................................... 10
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
REVISION HISTORY
1/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG±334
SPECIFICATIONS
DUAL SUPPLY1
VDD = +15 V 10ꢀ, VSS = –15 V 10ꢀ, GND = 0 V, unless otherwise noted.
Table 1.
B Version
−40°C to
Parameter
Unit
Test Conditions/Comments
+2ꢀ°C
+10ꢀ°C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
VSS to VDD
230
V
130
200
5
10
25
65
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = 10 V, IS = −10 mA; see Figure 11
VDD = +13.5 V, VSS = −13.5 V
VS = 10 V, IS = −10 mA
On Resistance Match Between Channels (∆RON)
On Resistance Flatness (RFLAT (ON)
)
VS = −5 V, 0 V, +5 V; IS = −10 mA
LEAKAGE CURRENTS
VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage IS (Off)
Drain Off Leakage ID (Off)
Channel On Leakage ID, IS (On)
DIGITAL INPUTS
10
10
10
nA typ
nA typ
nA typ
VD = 10 V; VS = 10 V; see Figure 12
VD = 10 V; VS = 10 V; see Figure 12
VS = VD = 10 V; see Figure 13
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
2.0
0.8
V min
V max
μA typ
μA max
pF typ
0.005
5
VIN = VINL or VINH
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
TON
110
130
65
85
25
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 14
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 14
150
95
TOFF
TBBM
RL = 300 Ω, CL = 35 pF
10
VS1 = VS2 = +10 V; see Figure 15
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 16
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
CS (Off)
2
80
85
700
5
5
10
MHz typ RL = 50 Ω, CL = 5 pF; see Figure 18
pF typ
pF typ
pF typ
f = 1 MHz; VS = 0 V
f = 1 MHz; VS = 0 V
f = 1 MHz; VS = 0 V
CD (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
VDD = +16.5 V, VSS = −16.5 V
Digital inputs = 0 V or VDD
0.002
260
μA typ
μA max
μA typ
μA max
μA typ
μA max
μA typ
μA max
1
IDD
ISS
ISS
Digital inputs = 5 V
400
1
0.002
0.002
Digital inputs = 0 V or VDD
Digital inputs = 5 V
1
1 Temperature range is B Version: −40°C to +105°C.
2 Guaranteed by design, not subject to production test.
Rev. 0 | Page 3 of 12
ADG±334
SINGLE SUPPLY1
VDD = 12 V 10ꢀ, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
B Version
−40°C to
Parameter
+2ꢀ°C
+10ꢀ°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0 to VDD
520
V
325
500
10
20
65
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VS = 0 V to10 V, IS = −10 mA; see Figure 11
VDD = 10.8 V, VSS = 0 V
VS = 0 V to10 V, IS = −10 mA
On Resistance Match Between Channels (∆RON)
On Resistance Flatness (RFLAT(ON)
)
VS = 3 V, 6 V, 9 V, IS = −10 mA
LEAKAGE CURRENTS
VDD = 13.2 V
Source Off Leakage IS (Off)
Drain Off Leakage ID (Off)
Channel On Leakage ID, IS (On)
DIGITAL INPUTS
10
10
10
nA typ
nA typ
nA typ
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12
VS = VD = 1 V or 10 V, see Figure 13
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
2.0
0.8
V min
V max
μA typ
μA max
pF typ
0.005
3
VIN = VINL or VINH
f = 1 MHz
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
TON
135
170
95
115
50
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 14
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 14
200
140
10
TOFF
TBBM
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V; see Figure 15
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 16
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
RL = 50 Ω, CL = 5 pF; see Figure 18
f = 1 MHz; VS = 6 V
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
CS (Off)
2
80
85
500
5
5
10
CD (Off)
CD, CS (On)
f = 1 MHz; VS = 6 V
f = 1 MHz; VS = 6 V
POWER REQUIREMENTS
IDD
VDD = 13.2 V
Digital inputs = 0 V or VDD
0.002
260
μA typ
μA max
μA typ
μA max
1
IDD
Digital inputs = 5 V
420
1 Temperature range is B Version: −40°C to +105°C.
2 Guaranteed by design, not subject to production test.
Rev. 0 | Page 4 of 12
ADG±334
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
VDD to VSS
35 V
VDD to GND
VSS to GND
Analog, Digital Inputs1
−0.3 V to +25 V
+0.3 V to −25 V
VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
Continuous Current, S or D
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle max)
24 mA
100 mA
Only one absolute maximum rating may be applied at any one
time.
Operating Temperature Range
Industrial Temperature Range
(B Version)
−40°C to +105°C
Storage Temperature Range
Junction Temperature
SSOP Package
−65°C to +150°C
150°C
θJA, Thermal Impedance
Reflow Soldering Peak Temperature,
Pb-free
83.2°C/W
260°C
1 Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADG±334
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN1
S1A
D1
1
2
3
4
5
6
7
8
9
20 IN4
19 S4A
18 D4
ADG1334
TOP VIEW
(Not to Scale)
S1B
17 S4B
V
16
V
DD
SS
GND
S2B
D2
15 NC
14 S3B
13 D3
S2A
12 S3A
11 IN3
IN2 10
NC = NO CONNECT
Figure 2. 20-Lead SSOP Pin Configuration
Table 4. 20-Lead SSOP Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 10, 11, 20
2, 4, 7, 9, 12, 14, 17, 19
3, 8, 13, 18
5
IN1, IN2, IN3, IN4
S1A, S1B, S2B, S2A, S3A, S3B, S4B, S4A
D1, D2, D3, D4
VSS
Logic Control Input.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Most Negative Power Supply Potential in Dual Supplies. In
single-supply applications, it can be connected to ground.
6
15
16
GND
NC
VDD
Ground (0 V) Reference.
No Connect.
Most Positive Power Supply Potential.
Table 5. ADG1334 Truth Table
Logic
Switch A
Switch B
On
Off
0
1
Off
On
Rev. 0 | Page 6 of 12
ADG±334
TERMINOLOGY
RON
tBBM
Ohmic resistance between D and S.
Off time measured between the 80ꢀ point of both switches
when switching from one address state to another.
ΔRON
Difference between the RON of any two channels.
VINL
Maximum input voltage for Logic 0.
IS (Off)
Source leakage current when switch is off.
VINH
Minimum input voltage for Logic 1.
ID (Off)
Drain leakage current when switch is off.
IINL (IINH)
Input current of the digital input.
ID, IS (On)
Channel leakage current when switch is on.
IDD
Positive supply current.
VD (VS)
Analog voltage on Terminal D, Terminal S.
ISS
Negative supply current.
CS (OFF)
Channel input capacitance for off condition.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CD (Off)
Channel output capacitance for off condition.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
CD, CS (On)
On switch capacitance.
Bandwidth
CIN
Frequency at which the output is attenuated by 3 dB.
Digital input capacitance.
On Response
Frequency response of the on switch.
tON
The delay between applying the digital control input and the
output switching on (see Figure 14).
tOFF
The delay between applying the digital control input and the
output switching off (see Figure 14).
Rev. 0 | Page 7 of 12
ADG±334
TYPICAL PERFORMANCE CHARACTERISTICS
200
600
500
400
300
200
T
= 25°C
V
V
= 12V
= 0V
A
DD
SS
180
160
140
120
100
80
T
= +85°C
A
V
= +15V
DD
= –15V
V
SS
60
40
T
= –40°C
A
T
= +25°C
A
100
0
20
0
–15 –12
–9
–6
–3
0
3
6
9
12
15
0
2
4
6
8
10
12
SOURCE OR DRAIN VOLTAGE (V)
SOURCE OR DRAIN VOLTAGE (V)
Figure 3. On Resistance as a Function of VD (VS ) for Dual Supply
Figure 6. On Resistance as a Function of VD (VS ) for Different
Temperatures, Single Supply
450
6
T
= 25°C
T
= +25°C
A
A
V
V
= +15V
= –15V
DD
SS
400
350
300
250
200
150
4
2
V
V
= +5V
= –5V
DD
SS
V
V
= 12V
= 0V
DD
SS
0
V
V
= +12V
= 0V
DD
SS
–2
100
–4
–6
50
0
0
2
4
6
8
10
12
–15
–10
–5
0
5
10
15
SOURCE OR DRAIN VOLTAGE (V)
V
(V)
S
Figure 4. On Resistance as a Function of VD (VS ) for Single Supply
Figure 7. Charge Injection vs. Source Voltage
250
160
140
120
100
80
V
V
= +15V
= –15V
DD
SS
V
V
= +15V
= –15V
DD
SS
200
150
100
T
ON
T
T
= +85°C
OFF
A
60
T
= +25°C
A
T
= –40°C
A
40
50
0
20
0
–15
–10
–5
0
5
10
15
–40
–20
0
20
40
60
80
SOURCE OR DRAIN VOLTAGE (V)
TEMPERATURE (°C)
Figure 8. TON/TOFF Time vs. Temperature
Figure 5. On Resistance as a Function of VD (VS ) for Different
Temperatures, Dual Supply
Rev. 0 | Page 8 of 12
ADG±334
0
–10
–20
–30
–40
–50
–60
–70
–80
V
V
= +15V
= –15V
DD
SS
V
V
= +15V
= –15V
= +25°C
DD
SS
–10
–20
–30
–40
–50
–60
–70
–80
–90
T
= +25°C
A
T
A
SxA – SxB
S1x – S2x
–90
–100
–110
–100
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Off Isolation vs. Frequency
Figure 10. Crosstalk vs. Frequency
Rev. 0 | Page 9 of 12
ADG±334
TEST CIRCUITS
V
I
(ON)
A
D
S
D
NC
S
D
I
V
D
DS
NC = NO CONNECT
V
S
Figure 13. On Leakage
Figure 11. On Resistance
I
(OFF)
A
I
(OFF)
S
D
S
D
A
V
V
S
D
Figure 12. Off Leakage
V
V
DD
SS
0.1μF
0.1μF
V
V
IN
50%
50%
50%
V
V
SS
DD
SxB
SxA
V
IN
S
50%
90%
D
V
OUT
R
300Ω
C
35pF
L
L
90%
INx
V
OUT
V
IN
GND
tON
tOFF
Figure 14. Switching Timing
V
V
DD
DD
SS
0.1μF
0.1μF
V
IN
V
V
SS
SxB
SxA
V
S
D
V
OUT
80%
V
R
C
OUT
L
L
35pF
300Ω
INx
tBBM
tBBM
V
IN
GND
Figure 15. Break-Before-Make Delay
Rev. 0 | Page 10 of 12
ADG±334
V
V
V
DD
SS
0.1μF
0.1μF
V
(NORMALLY
IN
CLOSED SWITCH)
V
DD
SS
ON
OFF
SxB
SxA
NC
V
D
V
S
V
(NORMALLY
IN
OPEN SWITCH)
OUT
C
1nF
L
INx
V
ΔV
OUT
OUT
V
IN
Q
= C × ΔV
L
GND
INJ
OUT
Figure 16. Charge Injection
V
V
DD
V
V
SS
DD
SS
0.1μF
0.1μF
0.1μF
0.1μF
NETWORK
ANALYZER
NETWORK
ANALYZER
V
V
DD
V
V
SS
DD
SS
NC
50Ω
SxA
V
OUT
R
L
SxA
SxB
50Ω
50Ω
INx
V
S
SxB
D
R
D
50Ω
V
OUT
V
INx
IN
R
L
50Ω
V
S
GND
GND
V
V
OUT
OFF ISOLATION = 20 log
V
S
OUT
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
V
S
Figure 19. Channel-to-Channel Crosstalk
Figure 17. Off Isolation
V
V
DD
SS
0.1μF
0.1μF
NETWORK
V
V
ANALYZER
DD
SS
NC
50Ω
SxA
SxB
INx
V
S
D
V
OUT
V
IN
R
L
50Ω
GND
V
WITH SWITCH
OUT
INSERTION LOSS = 20 log
V
WITHOUT SWITCH
OUT
Figure 18. Bandwidth
Rev. 0 | Page 11 of 12
ADG±334
OUTLINE DIMENSIONS
7.50
7.20
6.90
20
11
5.60
5.30
5.00
8.20
7.80
7.40
1
10
PIN 1
1.85
1.75
1.65
2.00 MAX
0.25
0.09
8°
4°
0°
0.65
BSC
0.95
0.75
0.55
0.38
0.22
0.05 MIN
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-150-AE
Figure 20. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG1334BRSZ1
ADG1334BRSZ-REEL1
Temperature Range
−40°C to +105°C
−40°C to +105°C
Description
20-Lead Shrink Small Outline Package (SSOP)
20-Lead Shrink Small Outline Package (SSOP)
Package Option
RS-20
RS-20
1 Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D0ꢀ744-0-1/06(0)
Rev. 0 | Page 12 of 12
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