ADG3233BRMZ [ADI]
Low Voltage 1.65 V to 3.6 V,Bidirectional Logic Level Translation, Bypass Switch; 低电压1.65 V至3.6 V ，双向逻辑电平转换，旁路开关
| 型号： | ADG3233BRMZ |
| 厂家： | 
ADI |
| 描述： | Low Voltage 1.65 V to 3.6 V,Bidirectional Logic Level Translation, Bypass Switch |
| 文件： | 总16页 (文件大小：292K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Voltage 1.65 V to 3.6 V, Bidirectional
Logic Level Translation, Bypass Switch
Data Sheet
ADG3233
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
V
CC2
CC1
Operates from 1.65 V to 3.6 V supply rails
Bidirectional level translation, unidirectional signal path
8-lead SOT-23 and MSOP packages
Bypass or normal operation
V
CC1
A1
Y1
Short circuit protection
V
V
V
V
CC2
CC1
CC1
CC2
APPLICATIONS
0
1
Y2
JTAG chain bypassing
Daisy-chain bypassing
Digital switching
A2
EN
ADG3233
GND
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG32331 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V. It
operates from two supply voltages, allowing bidirectional level
translation, that is, it translates low voltages to higher voltages
and vice versa. The signal path is unidirectional, meaning data
may only flow from A → Y.
1. Bidirectional level translation matches any voltage level
from 1.65 V to 3.6 V.
2. The bypass switch offers high performance and is fully
guaranteed across the supply range.
3. Short circuit protection.
4. Tiny 8-lead SOT-23 package and 8-lead MSOP.
Table 1. Truth Table
This type of device may be used in applications that require a
bypassing function. It is ideally suited to bypassing devices in
a JTAG chain or in a daisy-chain loop. One switch could be
used for each device or a number of devices, thus allowing
easy bypassing of one or more devices in a chain. This may
be particularly useful in reducing the time overhead in testing
devices in the JTAG chain or in daisy-chain applications where
the user does not wish to change the settings of a particular device.
EN
Signal Path
Function
L
Enable bypass mode
Enable normal mode
A1 → Y2, Y1 → VCC1
A1 → Y1, A2 → Y2
H
The bypass switch is packaged in two of the smallest footprints
available for its required pin count. The 8-lead SOT-23 package
requires only 2.9 mm × 2.8 mm board space, while the MSOP
package occupies approximately 3 mm × 4.9 mm board area.
1 U.S. Patent Number: 7,369,385 B2.
Rev. B
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADG3233
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 13
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Test Waveforms ............................................................................. 5
Absolute Maximum Ratings............................................................ 6
EN
A1 and
Input ........................................................................ 13
Normal Operation...................................................................... 13
Bypass Operation ....................................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 16
REVISION HISTORY
7/13—Rev. A to Rev. B
Changes to Table 1 ............................................................................ 1
7/11—Rev. 0 to Rev. A
Changes to Patent Number, General Description Section, and
Product Highlights Section ............................................................. 1
Changes to VCC = VCC1 = VCC2 = 2.5 V 0.2 V, ENABLE Time
→ Y1, Table 2 ............................................................................. 4
EN
Changes to Table 3............................................................................ 6
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
5/03—Revision 0: Initial Version
Rev. B | Page 2 of 16
Data Sheet
ADG3233
SPECIFICATIONS
VCC1 = VCC2 = 1.65 V to 3.6 V, GND = 0 V, all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter1
Symbol
Test Conditions/Comments
VCC2 = 1.65 V to 3.6 V, GND = 0 V
VCC1 = 3.0 V to 3.6 V
Min
Typ2 Max
Unit
LOGIC INPUTS/OUTPUTS3
Input High Voltage4
VIH
1.35
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
VCC1 = 3.0 V to 3.6 V
VCC1 = 2.3 V to 2.7 V
1.35
0.65 × VCC
Input Low Voltage4
VIL
0.8
0.7
0.35 × VCC
VCC1 = 1.65 V to 1.95 V
Output High Voltage (Y1)
VOH
IOH = −100 µA, VCC1 = 3.0 V to 3.6 V
IOH = −100 µA, VCC1 = 2.3 V to 2.7 V
IOH = −100 µA, VCC1 = 1.65 V to 1.95 V
IOH = −4 mA, VCC1 = 2.3 V to 2.7 V
IOH = −4 mA, VCC1 = 1.65 V to 1.95 V
IOH = −8 mA, VCC1 = 3.0 V to 3.6 V
IOL = 100 µA, VCC1 = 3.0 V to 3.6 V
IOL = 100 µA, VCC1 = 2.3 V to 2.7 V
IOL = 100 µA, VCC1 = 1.65 V to 1.95 V
IOL = 4 mA, VCC1 = 2.3 V to 2.7 V
IOL = 4 mA, VCC1 = 1.65 V to 1.95 V
IOL = 8 mA, VCC1 = 3.0 V to 3.6 V
VCC1 = 1.65 V to 3.6 V, GND = 0 V
IOH = −100 µA, VCC2 = 3.0 V to 3.6 V
IOH = −100 µA, VCC2 = 2.3 V to 2.7 V
IOH = −100 µA, VCC2 = 1.65 V to 1.95 V
IOH = −4 mA, VCC2 = 2.3 V to 2.7 V
IOH = −4 mA,VCC2 = 1.65 V to 1.95 V
IOH = −8 mA, VCC2 = 3.0 V to 3.6 V
IOL = 100 µA, VCC2 = 3.0 V to 3.6 V
IOL = 100 µA, VCC2 = 2.3 V to 2.7 V
IOL = 100 µA, VCC2 = 1.65 V to 1.95 V
IOL = 4 mA, VCC2 = 2.3 V to 2.7 V
IOL = 4 mA, VCC2 = 1.65 V to 1.95 V
IOL = 8 mA, VCC2 = 3.0 V to 3.6 V
2.4
2.0
VCC − 0.45
2.0
VCC – 0.45
2.4
Output Low Voltage (Y1)
VOL
0.40
0.40
0.45
0.40
0.45
0.40
LOGIC OUTPUTS3
Output High Voltage (Y2)
VOH
2.4
2.0
VCC − 0.45
2.0
VCC – 0.45
2.4
V
V
V
V
V
V
V
V
V
V
V
V
Output Low Voltage (Y2)
VOL
0.40
0.40
0.45
0.40
0.45
0.40
SWITCHING CHARACTERISTICS 4, 5
VCC = VCC1 = VCC2 = 3.3 V 0.3 V
Propagation Delay, tPD
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
3.5
3.5
4
5.4
5.4
6.5
6
ns
ns
ns
ns
A1 → Y1 Normal Mode
A2 →Y2 Normal Mode
A1 → Y2 Bypass Mode
4
ENABLE Time EN → Y1
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
2.8
4.5
4
4
ns
ns
ns
DISABLE Time EN → Y1
ENABLE Time EN → Y2
DISABLE Time EN → Y2
6.5
6.5
Rev. B | Page 3 of 16
ADG3233
Data Sheet
Parameter1
Symbol
Test Conditions/Comments
Min
Typ2 Max
Unit
VCC = VCC1 = VCC2 = 2.5 V 0.2 V
Propagation Delay, tPD
A1 → Y1 Normal Mode
A2 → Y2 Normal Mode
A1 → Y2 Bypass Mode
ENABLE Time EN → Y1
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
4.5
4.5
4.5
5
6.2
6.2
6.5
7.2
ns
ns
ns
ns
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
3.2
5
4.7
7.7
7.2
ns
ns
ns
DISABLE Time EN → Y1
ENABLE Time EN → Y2
4.8
DISABLE Time EN → Y2
VCC = VCC1 = VCC2 = 1.8 V 0.15 V
Propagation Delay, tPD
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
6.7
6.5
6.5
7
10
ns
ns
ns
ns
A1 → Y1 Normal Mode
A2 → Y2 Normal Mode
A1 → Y2 Bypass Mode
ENABLE Time EN → Y1
10
10.25
10.5
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
4.4
7
6.5
12
ns
ns
ns
DISABLE Time EN → Y1
ENABLE Time EN → Y2
6.5
10.5
DISABLE Time EN → Y2
Input Leakage Current
Output Leakage Current
POWER REQUIREMENTS
Power Supply Voltages
II
IO
0 ≤ VIN ≤ 3.6 V
0 ≤ VIN ≤ 3.6 V
1
1
µA
µA
VCC1
VCC2
ICC1
ICC2
ΔICC1
1.65
1.65
3.6
3.6
2
2
0.75
V
V
µA
µA
µA
Quiescent Power Supply Current
Increase in ICC per Input
Digital inputs = 0 V or VCC
Digital inputs = 0 V or VCC
VCC = 3.6 V, one input at 3.0 V; others at
V
CC or GND
1 Temperature range is as follows: B Version: −40°C to +85°C.
2 All typical values are at VCC = VCC1 = VCC2, TA = 25°C, unless otherwise stated.
3 VIL and VIH levels are specified with respect to VCC1, VOH, and VOL levels for Y1 are specified with respect to VCC1, and VOH, and VOL levels are specified for Y2 with respect to
VCC2
.
4 Guaranteed by design, not subject to production test.
5 See the Test Waveforms section.
Rev. B | Page 4 of 16
Data Sheet
ADG3233
TEST WAVEFORMS
V
V
CC1
INPUT
T
0V
tPHL
tPLH
V
V
OH
OUTPUT
T
V
OL
Figure 2. Propagation Delay
V
V
CC1
EN
T
0V
tEN
tDIS
V
V
V
OH
Y1
V
T
T
(A1 AT GND)
OL
Figure 3. Y1 Enable and Disable Times
V
V
CC1
EN
T
0V
tEN
tDIS
V
CC1
A1
A2
0V
V
CC1
0V
V
OLH
V
Y2
T
V
V
T
OL
Figure 4. Y2 Enable and Disable Times
Rev. B | Page 5 of 16
ADG3233
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
VCC to GND
Digital Inputs to GND
A1, EN
–0.3 V to +4.6 V
–0.3 V to +4.6 V
–0.3 V to +4.6 V
–0.3 V to VCC1 + 0.3 V
25 mA
A2
Only one absolute maximum rating may be applied at any one
time.
DC Output Current
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
8-Lead MSOP
ESD CAUTION
–40°C to +85°C
–65°C to +150°C
150°C
θJA Thermal Impedance
θJC Thermal Impedance
8-Lead SOT-23
206°C/W
43°C/W
θJA Thermal Impedance
Lead Temperature, Soldering (10 sec)
211°C/W
300°C
IR Reflow, Peak Temperature (<20 sec) 235°C
Soldering (Pb-Free)
Reflow, Peak Temperature
Time at Peak Temperature
260(+0/−5)°C
20 sec to 40 sec
Rev. B | Page 6 of 16
Data Sheet
ADG3233
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
1
2
3
4
8
7
6
5
V
CC2
CC1
A1
V
1
2
3
4
8 V
CC1
CC2
Y1
Y1
ADG3233
ADG3233
7
A1
A2
EN
TOP VIEW
A2
EN
Y2
TOP VIEW
(Not to Scale)
Y2
6
5
(Not to Scale)
GND
GND
Figure 5. 8-Lead SOT-23 Package (RJ-8)
Figure 6. 8-Lead MSOP Package (RM-8)
Table 4. Pin Function Descriptions
Pin No.
RJ-8 RM-8
Mnemonic Description
1
8
2
3
7
6
8
1
7
6
2
3
VCC1
VCC2
A1
A2
Y1
Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V.
Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V.
Input Referred to VCC1
Input Referred to VCC2
.
.
Output Referred to VCC1.
Y2
Output Referred to VCC2. Voltage levels appearing at Y2 will be translated from a VCC1 voltage level to a VCC2
voltage level.
4
5
5
4
EN
Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode.
Device Ground.
GND
Rev. B | Page 7 of 16
ADG3233
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
30
25
20
15
10
5
T
= 25°C
V
= 3.3V
A
CC1
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 3.3V
CC2
V
= 2.5V
CC2
V
= 1.8V
CC2
V
= 2.5V
V
= 3.3V
CC2
CC2
V
= 1.8V
2.5
0
CC2
–5
1.5
2.0
3.0
3.5
4.0
0
10
20
30
40
50
60
70
80
V
(V)
TEMPERATURE (°C)
CC1
Figure 10. ICC2 vs. Temperature
Figure 7. ICC1 vs. VCC1
2000
1800
1600
1400
1200
1000
800
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
T
= 25°C
A
T
= 25°C
A
V
= V
= 3.3V
= 1.8V
CC1
CC2
V
= V
CC1
CC2
600
V
= 3.3V
CC1
2.0
V
= 2.5V
CC1
400
200
V
= 1.8V
3.5
CC1
0
10k
100k
1M
FREQUENCY (Hz)
10M
100M
1.5
2.5
3.0
(V)
4.0
V
CC2
Figure 11. ICC1 vs. Frequency, Normal Mode
Figure 8. ICC2 vs. VCC2
80
70
60
50
40
30
20
10
0
30
T
= 25°C
A
V
= 3.3V
CC2
25
20
15
10
5
V
= V
= 3.3V
= 1.8V
CC1
CC1
CC2
CC2
V
V
= 3.3V
= 2.5V
CC1
CC1
V
= 1.8V
CC1
V
= V
0
10k
100k
1M
FREQUENCY (Hz)
10M
100M
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 12. ICC1 vs. Frequency, Bypass Mode
Figure 9. ICC1 vs. Temperature
Rev. B | Page 8 of 16
Data Sheet
ADG3233
2000
10
8
T
= 25°C
A
1800
1600
1400
1200
1000
800
600
400
200
0
V
= V
= 3.3V
CC2
CC1
6
tEN
V
= V = 1.8V
CC2
CC1
4
tDIS
2
0
T
= 25°C
A
V
= V
CC1
CC2
10k
100k
1M
FREQUENCY (Hz)
10M
100M
100M
4.0
1.5
2.0
2.5
3.0
3.5
4.0
SUPPLY (V)
Figure 13. ICC2 vs. Frequency, Normal Mode
Figure 16. Y2 Enable, Disable Time vs. Supply
2000
1800
1600
1400
1200
1000
800
6
T
= 25°C
A
5
4
3
2
1
0
tEN
V
= V = 3.3V
CC2
CC1
V
= V = 1.8V
CC2
CC1
tDIS
600
400
V
= V = 3.3V
CC2
CC1
200
0
10k
100k
1M
FREQUENCY (Hz)
10M
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 14. ICC2 vs. Frequency, Bypass Mode
Figure 17. Y1 Enable, Disable Time vs. Temperature
10
8
6
5
4
3
2
1
0
tEN
6
tDIS
tEN
tDIS
4
2
0
T
= 25°C
A
V
= V = 3.3V
CC2
CC1
V
= V
CC1
CC2
1.5
2.0
2.5
3.0
3.5
–40
–20
0
20
40
60
80
SUPPLY (V)
TEMPERATURE (°C)
Figure 15. Y1 Enable, Disable Time vs. Supply
Figure 18. Y2 Enable, Disable Time vs. Temperature
Rev. B | Page 9 of 16
ADG3233
Data Sheet
16
10
9
8
7
6
5
4
3
2
1
0
V
V
= 3.3V
= 1.8V
= 25°C
V
V
= 1.8V
= 3.3V
CC1
CC1
CC2
CC2
14
12
10
8
T
T = 25°C
A
A
DATA RATE = 10Mbps
DATA RATE = 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
tPLH, LOW-TO-HIGH TRANSITION
6
4
tPHL, HIGH-TO-LOW TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
2
0
22
32
42
52
62
72
82
92
102
22
32
42
52
62
72
82
92
102
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 19. Rise/Fall Time vs. Capacitive Load, A1 → Y1, A2 → Y2
Figure 22. Rise/Fall Time vs. Capacitive Load, A1 → Y2, Bypass Mode
16
8
V
V
= 3.3V
= 3.3V
V
V
= 3.3V
= 1.8V
CC1
CC2
CC1
CC2
14
12
10
8
7
6
5
4
3
2
1
0
T
= 25°C
T = 25°C
DATA RATE = 10Mbps
A
A
DATA RATE = 10Mbps
tPLH
,
LOW-TO-HIGH TRANSITION
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
6
4
tPHL, HIGH-TO-LOW TRANSITION
2
0
22
32
42
52
62
72
82
92
102
22
32
42
52
62
72
82
92
102
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 20. Rise/Fall Time vs. Capacitive Load, A1 → Y2, Bypass Mode
Figure 23. Propagation Delay vs. Capacitive Load A1 → Y1
10
8
V
V
= 1.8V
= 3.3V
CC1
9
8
7
6
5
4
3
2
1
0
CC2
7
6
5
4
3
2
1
0
T
= 25°C
A
DATA RATE = 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
V
V
= 3.3V
= 3.3V
CC1
CC2
= 25°C
T
A
DATA RATE = 10Mbps
22
32
42
52
62
72
82
92
102
22
32
42
52
62
72
82
92
102
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 21. Rise/Fall Time vs. Capacitive Load, A1 → Y1, A2 → Y2
Figure 24. Propagation Delay vs. Capacitive Load A2 → Y2
Rev. B | Page 10 of 16
Data Sheet
ADG3233
8
7
6
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
tPHL
,
A2 → Y2
tPHL, A1 → Y1
tPLH
,
LOW-TO-HIGH TRANSITION
5
4
3
2
1
0
tPLH
,
A1 → Y1
tPLH
,
A2 → Y2
tPHL, HIGH-TO-LOW TRANSITION
V
V
T
= 3.3V
= 3.3V
CC1
CC2
= 25°C
A
DATA RATE = 10Mbps
V
= V
= 3.3V
0
CC1
CC2
22
32
42
52
62
72
82
92
102
–40
–20
20
40
60
80
CAPACITIVE LOAD (pF)
TEMPERATURE (°C)
Figure 28. Propagation Delay vs. Temperature, Normal Mode
Figure 25. Propagation Delay vs. Capacitive Load A1 → Y2, Bypass Mode
8
7
4
tPHL, A1 → Y2
tPLH
,
A1 → Y1
6
5
4
3
2
1
0
3
2
1
0
tPLH
,
A1 → Y2
tPHL, A2 → Y2
tPHL, A1 → Y1
tPLH
,
A2 → Y2
T
V
= 25°C
A
= V
CC1
CC2
V
= V
CC2
= 3.3V
0
CC1
1.5
2.0
2.5
3.0
3.5
4.0
–40
–20
20
40
60
80
SUPPLY (V)
TEMPERATURE (°C)
Figure 26. Propagation Delay vs. Supply, Normal Mode
Figure 29. Propagation Delay vs. Temperature, Bypass Mode
8
6
4
2
0
T
= 25°C
A
EN = HIGH
3.3V
A1
Y1
1.8V
3.3V
tPHL, A1 → Y2
3
1
tPLH
,
A1 → Y2
A2
Y2
T
V
= 25°C
A
2
4
= V
CC1
CC2
DATA RATE = 10MHz
M5.00ns CH1 1.48V
1.5
2.0
2.5
3.0
3.5
4.0
CH1 1.00V
CH2 500mV
SUPPLY (V)
CH3 1.00VΩ CH4 1.00VΩ
Figure 27. Propagation Delay vs. Supply, Bypass Mode
Figure 30. Normal Mode VCC1 = 3.3 V, VCC2 = 1.8 V
Rev. B | Page 11 of 16
ADG3233
Data Sheet
1.8V
T
= 25°C
A
DATA RATE = 10MHz
3.3V
1.8V
A1
3.3V
A1
3
2
Y2
1.8V
Y2
Y1
3
2
1
T
= 25°C
A
DATA RATE = 10MHz
CH2 1.00VΩ CH2 500mV
M5.00ns
CH2 1.47V
CH1 1.00V
CH3 1.00VΩ
CH2 2.00V
M5.00ns CH3 900mV
Figure 31. Bypass Mode, VCC1 = 3.3 V, VCC2 = 1.8 V
Figure 33. Bypass Mode, VCC1 = 1.8 V, VCC2 = 3.3 V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 3.3V
= 2.5V
T
V
= 25°C
CC
CC
A
3.3V
= V
= V
CC2
CC
CC1
1.8V
A1
3
1
V
Y1
SOURCE
1.8V
3.3V
V
= 1.8V
CC
A2
4
2
Y2
V
= 3.3V
CC
V
= 2.5V
CC
V
= 1.8V
CC
T
= 25°C
A
SINK
DATA RATE = 10MHz
0
5
10
CURRENT (mA)
15
20
CH1 1.00V
CH2 2.00V
CH3 5.00VΩ CH4 1.00VΩ
M5.00ns CH1 1.48V
Figure 32. Normal Mode, VCC1 = 1.8 V, VCC2 = 3.3 V
Figure 34. Y1 and Y2 Source and Sink Current
Rev. B | Page 12 of 16
Data Sheet
ADG3233
THEORY OF OPERATION
NORMAL OPERATION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V. It
operates from two supply voltages, allowing bidirectional level
translation, that is, it translates low voltages to higher voltages
and vice versa. The signal path is unidirectional, meaning data
may only flow from A → Y.
Figure 35 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 → Y1 and A2 → Y2.
The device will level translate the signal applied to A1 to a VCC1
logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which
will have standard VOL/VOH levels for VCC1 supplies. The signal
is then passed through Device 1 and back to the A2 input pin
of the bypass switch.
A1 AND EN INPUT
EN
The A1 and enable ( ) inputs have VIL/VIH logic levels so that
The logic level inputs of A2 are with respect to the VCC1 supply.
The signal will be level translated from VCC1 to VCC2 and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the VCC2 supply.
the part can accept logic levels of VOL/VOH from Device 0 or the
controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1,
capable of accepting inputs outside the VCC1 supply range. For
example, the VCC1 supply applied to the bypass switch could be
1.8 V while Device 0 could be operating from a 2.5 V or 3.3 V
supply rail, there are no internal diodes to the supply rails, so
the device can handle inputs above the supply but inside the
absolute maximum ratings.
EN
) are
V
V
V
CC2
CC0
CC1
DEVICE 0
DEVICE 1
DEVICE 2
SIGNAL INPUT
SIGNAL OUTPUT
V
V
CC2
CC1
A1
A2
Y1
Y2
EN
LOGIC 1
BYPASS SWITCH
Figure 35. Bypass Switch in Normal Mode
Rev. B | Page 13 of 16
ADG3233
Data Sheet
BYPASS OPERATION
Figure 36 illustrates the device as used in bypass mode. The
signal path is now from A1 directly to Y2, thus bypassing
Device 1 completely. The signal will be level translated to a VCC2
logic level and available on Y2, where it may be applied directly
The three supplies in Figure 35 and Figure 36 may be any
combination of supplies, that is., VCC0, VCC1, and VCC2 may be
any combination of supplies, for example, 1.8 V, 2.5 V, an d 3 . 3 V.
to the input of Device 2. In bypass mode, Y1 is pulled up to VCC1
.
V
V
V
CC2
CC0
CC1
DEVICE 0
DEVICE 1
DEVICE 2
SIGNAL INPUT
SIGNAL OUTPUT
V
V
CC2
CC1
A1
A2
Y1
Y2
EN
LOGIC 0
BYPASS SWITCH
Figure 36. Bypass Switch in Bypass Mode
Rev. B | Page 14 of 16
Data Sheet
ADG3233
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 37. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
3.00
2.90
2.80
8
1
7
2
6
3
5
4
3.00
2.80
2.60
1.70
1.60
1.50
PIN 1
INDICATOR
0.65 BSC
1.95
BSC
1.30
1.15
0.90
0.22 MAX
0.08 MIN
1.45 MAX
0.95 MIN
0.60
0.45
0.30
0.15 MAX
0.05 MIN
8°
4°
0°
SEATING
PLANE
0.60
BSC
0.38 MAX
0.22 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-BA
Figure 38. 8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
Rev. B | Page 15 of 16
ADG3233
Data Sheet
ORDERING GUIDE
Model1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead SOT-23
8-Lead SOT-23
8-Lead SOT-23
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
Branding
W1B
W1B
S1S
W1B
W1B
W1B
S1S
Package Option
ADG3233BRJ-REEL
ADG3233BRJ-REEL7
ADG3233BRJZ-REEL7
ADG3233BRM
ADG3233BRM-REEL
ADG3233BRM-REEL7
ADG3233BRMZ
RJ-8
RJ-8
RJ-8
RM-8
RM-8
RM-8
RM-8
RM-8
ADG3233BRMZ-REEL7
S1S
1 Z = RoHS Compliant Part.
©2003–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03297-0-7/13(B)
Rev. B | Page 16 of 16
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