ADG408BR-REEL [ADI]
LC2MOS 4-/8-Channel High Performance Analog Multiplexers; LC2MOS 4- / 8通道高性能模拟多路复用器
| 型号： | ADG408BR-REEL |
| 厂家： | 
ADI |
| 描述： | LC2MOS 4-/8-Channel High Performance Analog Multiplexers |
| 文件： | 总16页 (文件大小：440K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LC2MOS 4-/8-Channel
High Performance Analog Multiplexers
ADG408/ADG409
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
44 V supply maximum ratings
VSS to VDD analog signal range
Low on resistance (100 Ω maximum)
Low power (ISUPPLY < 75 μA)
Fast switching
Break-before-make switching action
Plug-in replacement for DG408/DG409
ADG408
ADG409
S1
S1A
S4A
DA
DB
D
S1B
S4B
S8
APPLICATIONS
1-OF-8
1-OF-4
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
DECODER
DECODER
A0 A1 A2 EN
A0 A1 EN
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG408/ADG409 are monolithic CMOS analog multiplexers
comprising eight single channels and four differential channels,
respectively. The ADG408 switches one of eight inputs to a
common output as determined by the 3-bit binary address lines
A0, A1, and A2. The ADG409 switches one of four differential
inputs to a common differential output, as determined by the
2-bit binary address lines A0 and A1. An EN input on both devices
is used to enable or disable the device. When the device is disabled,
all channels are switched off.
1. Extended Signal Range. The ADG408/ADG409 are
fabricated on an enhanced LC2MOS process, giving an
increased signal range that extends to the supply rails.
2. Low Power Dissipation.
3. Low RON
.
4. Single-Supply Operation. For applications where the
analog signal is unipolar, the ADG408/ADG409 can be
operated from a single rail power supply. The parts are
fully specified with a single 12 V power supply and remain
functional with single supplies as low as 5 V.
The ADG408/ADG409 are designed on an enhanced LC2MOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when on and has an input signal
range that extends to the supplies. In the off condition, signal
levels up to the supplies are blocked. All channels exhibit break-
before-make switching action, preventing momentary shorting
when switching channels. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 analog multiplexers.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADG408/ADG409
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................6
ESD Caution...................................................................................6
Pin Configurations and Function Descriptions............................7
Typical Performance Characteristics ..............................................8
Test Circuits..................................................................................... 11
Terminology.................................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply................................................................................... 3
Single Supply................................................................................. 4
REVISION HISTORY
10/06—Rev. B to Rev. C
3/03—Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to Table 3............................................................................ 6
Inserted Table 4 and Table 5............................................................ 7
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide .......................................................... 15
Changes to Ordering Guide.............................................................4
Updated Outline Dimensions....................................................... 11
2/01—Revision 0: Initial Version
Rev. C | Page 2 of 16
ADG408/ADG409
SPECIFICATIONS
DUAL SUPPLY
VDD = 15 V, VSS = −15 V, GND = 0 V, unless otherwise noted.
Table 1.
B Version
−40ºC to
T Version
−55ºC to
Parameter
+25ºC
+85ºC
VSS to VDD
125
+25ºC
+125ºC
VSS to VDD
125
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
V
40
100
15
40
100
15
Ω typ
Ω max
Ω max
VD = 10 V, IS = −10 mA
VD = +10 V, −10 V
∆RON
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
ADG408
0.5
50
0.5
50
nA max
VD = 10 V, VS = m 10 V; see Figure 19
VD = 10 V; VS = m 10 V; see Figure 20
1
1
100
50
1
1
100
50
nA max
nA max
ADG409
Channel On Leakage ID, IS (ON)
ADG408
ADG409
VS = VD = 10 V; see Figure 21
1
1
100
50
1
1
100
50
nA max
nA max
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
IINL or IINH
10
10
μA max
pF typ
VIN = 0 or VDD
f = 1 MHz
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS1
tTRANSITION
8
8
120
250
10
120
250
10
ns typ
ns max
ns min
RL = 300 Ω, CL = 35 pF;
VS1 = 10 V, VS8 = m 10 V; see Figure 22
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 23
RL = 300 Ω CL = 35 pF;
VS = 5 V; see Figure 24
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 24
VS = 0 V, RS = 0 Ω, CL = 10 nF; see Figure 25
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; see Figure 26
RL = 1 kΩ, f = 100 kHz; see Figure 27
f = 1 MHz
tOPEN
10
10
tON (EN)
tOFF (EN)
85
150
125
225
65
85
150
125
225
65
ns typ
ns max
ns typ
ns max
pC typ
dB typ
150
150
Charge Injection
OFF Isolation
20
−75
20
−75
Channel-to-Channel Crosstalk
CS (OFF)
85
11
85
11
dB typ
pF typ
CD (OFF)
f = 1 MHz
ADG408
ADG409
40
20
40
20
pF typ
pF typ
CD, CS (ON)
ADG408
ADG409
f = 1 MHz
54
34
54
34
pF typ
pF typ
Rev. C | Page 3 of 16
ADG408/ADG409
B Version
−40ºC to
T Version
−55ºC to
Parameter
+25ºC
+85ºC
+25ºC
+125ºC
Unit
Test Conditions/Comments
POWER REQUIREMENTS
IDD
1
5
1
5
1
5
1
5
μA typ
μA max
μA typ
μA max
μA typ
μA max
VIN = 0 V, VEN = 0 V
ISS
IDD
100
200
100
200
VIN = 0 V, VEN = 2.4 V
500
500
1 Guaranteed by design, not subject to production test.
SINGLE SUPPLY
VDD = 12 V, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
B Version
−40ºC to
T Version
−55ºC to
Parameter
+25ºC +85ºC
+25°C
+125ºC
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
0 to VDD
0 to VDD
V
90
90
0.5
Ω typ
VD = 3 V, 10 V, IS = –1 mA
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
ADG408
0.5
50
50
nA max
VD = 8 V/0 V, VS = 0 V/8 V; see Figure 19
VD = 8 V/0 V, VS = 0 V/8 V; see Figure 20
1
1
100
50
1
1
100
50
nA max
nA max
ADG409
Channel On Leakage ID, IS (ON)
ADG408
ADG409
VS = VD = 8 V/0 V; see Figure 21
1
1
100
50
1
1
100
50
nA max
nA max
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
IINL or IINH
10
10
μA max
pF typ
VIN = 0 or VDD
f = 1 MHz
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS1
tTRANSITION
8
8
130
10
130
10
ns typ
ns typ
RL = 300 Ω, CL = 35 pF;
VS1 = 8 V/0 V, VS8 = 0 V/8 V; see Figure 22
RL = 300 Ω, CL = 35 pF;
tOPEN
VS = 5 V; see Figure 23
tON (EN)
tOFF (EN)
140
60
140
60
ns typ
ns typ
RL = 300 Ω CL = 35 pF;
VS = 5 V; see Figure 24
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 24
Charge Injection
Off Isolation
5
–75
5
–75
pC typ
dB typ
VS = 0 V, RS = 0Ω, CL = 10 nF; see Figure 25
RL = 1 kΩ f = 100 kHz;
VEN = 0 V; see Figure 26
Rev. C | Page 4 of 16
ADG408/ADG409
B Version
−40ºC to
+25ºC +85ºC
Channel-to-Channel Crosstalk 85
T Version
−55ºC to
Parameter
+25°C
85
11
+125ºC
Unit
Test Conditions/Comments
dB typ
pF typ
RL = 1 kΩ, f = 100 kHz; see Figure 27
f = 1 MHz
f = 1 MHz
CS (OFF)
CD (OFF)
11
ADG408
40
20
40
20
pF typ
pF typ
ADG409
CD, CS (ON)
ADG408
f = 1 MHz
54
34
54
34
pF typ
pF typ
ADG409
POWER REQUIREMENTS
IDD
1
5
1
5
μA typ
μA max
μA typ
μA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
IDD
100
200
100
200
500
500
1 Guaranteed by design, not subject to production test.
Rev. C | Page 5 of 16
ADG408/ADG409
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
VDD to VSS
44 V
VDD to GND
VSS to GND
−0.3 V to +32 V
+0.3 V to −32 V
Analog, Digital Inputs
VSS − 2 V to VDD + 2 V or 20 mA,
whichever occurs first
Continuous Current, S or D
Peak Current, S or D
20 mA
(Pulsed at 1 ms, 10% Duty Cycle
Maximum)
40 mA
ESD CAUTION
Operating Temperature Range
Industrial (B Version)
Extended (T Version)
Storage Temperature Range
Junction Temperature
−40° C to +85°C
−55° C to +125°C
−65° C to +150°C
150°C
CERDIP Package, Power Dissipation 900 mW
θJA, Thermal Impedance
Lead Temperature, Soldering
(10 sec)
76°C/W
300°C
PDIP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
(10 sec)
470 mW
117°C/W
260°C
TSSOP Package, Power Dissipation
θJA, Thermal Impedance
θJC, Thermal Impedance
SOIC Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
450 mW
155°C/W
50°C/W
600 mW
77°C/W
215°C
220°C
Infrared (15 sec)
Rev. C | Page 6 of 16
ADG408/ADG409
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
A0
EN
1
2
3
4
5
6
7
8
16 A1
A0
1
2
3
4
5
6
7
8
16 A1
15 GND
EN
15 A2
V
ADG409 14
V
DD
SS
V
14 GND
SS
TOP VIEW
ADG408
S1A
13 S1B
12 S2B
11 S3B
10 S4B
(Not to Scale)
S1
13
V
DD
TOP VIEW
S2A
S3A
S4A
DA
(Not to Scale)
S2
S3
S4
D
12 S5
11 S6
10 S7
9
DB
9
S8
Figure 3. ADG409 Pin Configuration
Figure 2. ADG408 Pin Configuration
Table 4. ADG408 Pin Function Descriptions
Table 5. ADG409 Pin Function Descriptions
Pin
No.
Pin
Mnemonic Description
No. Mnemonic Description
1
2
A0
EN
Logic Control Input.
1
2
A0
EN
Logic Control Input.
Active High Digital Input. When low, the
device is disabled and all switches are off.
When high, Ax logic inputs determine on
switches.
Active High Digital Input. When low, the
device is disabled and all switches are off.
When high, Ax logic inputs determine on
switches.
3
VSS
Most Negative Power Supply Potential in
Dual Supplies. In single-supply applications,
it can be connected to ground.
3
VSS
Most Negative Power Supply Potential in
Dual Supplies. In single-supply applications,
it can be connected to ground.
4
S1
S2
S3
S4
D
Source Terminal 1. Can be an input or
an output.
Source Terminal 2. Can be an input or
an output.
Source Terminal 3. Can be an input or
an output.
Source Terminal 4. Can be an input or
an output.
4
S1A
S2A
S3A
S4A
DA
Source Terminal 1A. Can be an input or
an output.
Source Terminal 2A. Can be an input or
an output.
Source Terminal 3A. Can be an input or
an output.
Source Terminal 4A. Can be an input or
an output.
5
5
6
6
7
7
8
Drain Terminal. Can be an input or an
output.
8
Drain Terminal A. Can be an input or an
output.
9
S8
S7
S6
S5
Source Terminal 8. Can be an input or
an output.
Source Terminal 7. Can be an input or
an output.
Source Terminal 6. Can be an input or
an output.
Source Terminal 5. Can be an input or
an output.
9
DB
Drain Terminal B. Can be an input or an
output.
Source Terminal 4B. Can be an input or
an output.
Source Terminal 3B. Can be an input or
an output.
Source Terminal 2B. Can be an input or
an output.
Source Terminal 1B. Can be an input or
an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
10
11
12
10
11
12
13
S4B
S3B
S2B
S1B
13
14
15
16
VDD
GND
A2
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
14
15
16
VDD
GND
A1
A1
Logic Control Input.
Logic Control Input.
Table 6. ADG408 Truth Table
Table 7. ADG409 Truth Table
A2
X
0
0
0
0
1
1
1
A1
X
0
0
1
1
0
0
1
A0
X
0
1
0
1
0
1
0
EN
ON SWITCH
ON SWITCH
PAIR
0
1
1
1
1
1
1
1
NONE
A1
X
0
0
1
A0
X
0
1
0
EN
0
1
1
1
1
2
3
4
5
6
7
8
NONE
1
2
3
4
1
1
1
1
1
1
1
Rev. C | Page 7 of 16
ADG408/ADG409
TYPICAL PERFORMANCE CHARACTERISTICS
120
180
160
140
120
100
80
T
= 25°C
A
T = 25°C
A
V
V
= 5V
= 0V
V
V
= +5V
= –5V
DD
SS
DD
SS
100
V
= +12V
= –12V
80
DD
V
SS
V
V
= +10V
= –10V
DD
SS
V
V
= 12V
= 0V
V
V
= 10V
DD
SS
DD
SS
= 0V
60
40
20
V
V
= 15V
= 0V
V
= +15V
= –15V
DD
DD
60
V
SS
SS
40
0
3
6
9
12
15
–15
–10
–5
0
5
10
15
V
[V ] (V)
S
V
[V ] (V)
S
D
D
Figure 4. RON as a Function of VD (VS): Dual-Supply Voltage
Figure 7. RON as a Function of VD (VS): Single-Supply Voltage
100
90
80
70
60
50
40
30
130
120
110
100
90
V
V
= 12V
= 0V
V
V
= +15V
= –15V
DD
SS
DD
SS
125°C
125°C
85°C
85°C
25°C
80
25°C
70
60
–15
–10
–5
0
5
10
15
0
2
4
6
8
10
12
V
[V ] (V)
S
V
[V ] (V)
S
D
D
Figure 5. RON as a Function of VD (VS) for Different Temperatures
Figure 8. RON as a Function of VD (VS) for Different Temperature
0.2
0.04
T
V
V
= 25°C
= +15V
T
V
V
= 25°C
= 12V
A
A
DD
DD
= –15V
= 0V
SS
SS
0.02
0
0.1
0
I
(OFF)
S
I
(ON)
D
I
(OFF)
D
I
(OFF)
D
I
(OFF)
S
–0.02
–0.04
–0.06
I
(ON)
D
–0.1
–0.2
–15
–10
–5
0
5
10
15
0
2
4
6
8
10
12
V
[V ] (V)
S
V
D
[V ] (V)
S
D
Figure 6. Leakage Currents as a Function of VD (VS)
Figure 9. Leakage Currents as a Function of VD (VS)
Rev. C | Page 8 of 16
ADG408/ADG409
120
100
80
140
120
100
80
V
V
= 12V
= 0V
V
V
= +15V
= –15V
DD
SS
DD
SS
tTRANSITION
tTRANSITION
tON (EN)
tON (EN)
60
tOFF (EN)
40
60
tOFF (EN)
20
40
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
V
(V)
V
(V)
IN
IN
Figure 13. Switching Time vs. VIN (Single Supply)
Figure 10. Switching Time vs. VIN (Bipolar Supply)
400
300
200
100
0
300
200
100
0
V
= 5V
V
= 5V
IN
IN
tTRANSITION
tTRANSITION
tON (EN)
tON (EN)
tOFF (EN)
tOFF (EN)
5
7
9
11
(V)
13
15
±5
±7
±9
±11
(V)
±13
±15
V
V
SUPPLY
SUPPLY
Figure 11. Switching Time vs. Single Supply
Figure 14. Switching Time vs. Bipolar Supply
10k
10k
V
V
= +15V
= –15V
V
V
= +15V
= –15V
DD
SS
DD
SS
1k
100
10
1k
EN = 2.4V
EN = 0V
EN = 2.4V
EN = 0V
0
100
–10
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 12. Positive Supply Current vs. Switching Frequency
Figure 15. Negative Supply Current vs. Switching Frequency
Rev. C | Page 9 of 16
ADG408/ADG409
110
110
100
90
V
V
= +15V
= –15V
V
V
= +15V
= –15V
DD
SS
DD
SS
100
90
80
80
70
70
60
1k
10k
100k
1M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 16. Off Isolation vs. Frequency
Figure 17. Crosstalk vs. Frequency
Rev. C | Page 10 of 16
ADG408/ADG409
TEST CIRCUITS
I
DS
V
V
V
V
DD
DD
SS
V1
SS
S1
S2
S8
D
I
(OFF)
D
S
D
0.8V
A
EN
GND
V
V
S
S
V
D
R
= V1/I
ON
DS
Figure 20. ID (OFF)
Figure 18. On Resistance
V
V
V
V
DD
SS
SS
V
V
V
V
DD
DD
SS
SS
DD
S1
S1
S8
D
I
(OFF)
S
S2
S8
D
I
(ON)
A
D
A
0.8V
2.4V
EN
EN
GND
GND
V
V
S
V
D
V
S
D
Figure 19. IS (OFF)
Figure 21. ID (ON)
V
V
V
SS
DD
3V
ADDRESS
tr < 20ns
tf < 20ns
V
DD
SS
50%
50%
A0
A1
A2
DRIVE (V
)
IN
S1
V
V
S1
S8
0V
V
IN
50Ω
S2–S7
tTRANSITION
tTRANSITION
90%
S8
ADG4081
OUTPUT
D
2.4V
EN
OUTPUT
300Ω
GND
35pF
90%
1
SIMILAR CONNECTION FOR ADG409.
Figure 22. Switching Time of Multiplexer, tTRANSlTlON
V
V
V
V
DD
SS
SS
3V
DD
ADDRESS
A0
DRIVE (V
)
IN
S1
V
S
A1
A2
V
IN
50Ω
0V
S2–S7
S8
ADG4081
80%
80%
OUTPUT
OUTPUT
D
2.4V
EN
300Ω
GND
35pF
tOPEN
1
SIMILAR CONNECTION FOR ADG409.
Figure 23. Break-Before-Make Delay, tOPEN
Rev. C | Page 11 of 16
ADG408/ADG409
V
V
V
V
DD
SS
SS
3V
DD
A0
A1
A2
ENABLE
50%
50%
DRIVE (V
)
S1
S2–S8
V
IN
S
0V
ADG4081
tON (EN)
tOFF (EN)
0.9V
OUTPUT
0.9V
D
EN
O
O
OUTPUT
V
35pF
IN
50Ω
300Ω
GND
1
SIMILAR CONNECTION FOR ADG409.
Figure 24. Enable Delay, tON (EN), tOFF (EN)
V
V
V
V
DD
DD
SS
SS
3V
A0
A1
A2
V
V
IN
ADG4081
R
S
S
D
OUT
V
ΔV
OUT
OUT
EN
C
10nF
L
V
Q
= C × ΔV
S
INJ
L
OUT
GND
V
IN
1
SIMILAR CONNECTION FOR ADG409.
Figure 25. Charge Injection
V
V
V
V
V
V
DD
DD
SS
SS
DD
DD
SS
V
V
SS
2.4V
A0
A0
A1
A2
EN
D
A1
A2
S1
ADG408
ADG408
V
D
OUT
V
OUT
S1
S8
EN
1kΩ
1kΩ
1kΩ
S2
S8
0V
V
S
GND
GND
V
S
CROSSTALK = 20 log V
/V
OFF ISOLATION = 20 log V
/V
OUT IN
OUT IN
Figure 27. Channel-to-Channel Crosstalk
Figure 26. Off Isolation
Rev. C | Page 12 of 16
ADG408/ADG409
TERMINOLOGY
RON
tTRANSITION
Ohmic resistance between D and S.
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
ΔRON
Difference between the RON of any two channels.
tOPEN
IS (OFF)
Off time measured between the 80% point of both switches
when switching from one address state to another.
Source leakage current when the switch is off.
ID (OFF)
VINL
Drain leakage current when the switch is off.
Maximum input voltage for Logic 0.
ID, IS (ON)
VINH
Channel leakage current when the switch is on.
Minimum input voltage for Logic 1.
VD (VS)
IINL (IINH
Input current of the digital input.
)
Analog voltage on Terminal D and Terminal S.
CS (OFF)
Crosstalk
Channel input capacitance for off condition.
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
CD (OFF)
Channel output capacitance for off condition.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CD, CS (ON)
On switch capacitance.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
CIN
Digital input capacitance.
IDD
tON (EN)
Positive supply current.
Delay time between the 50% and 90% points of the digital input
and switch on condition.
ISS
Negative supply current.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
Rev. C | Page 13 of 16
ADG408/ADG409
OUTLINE DIMENSIONS
0.800 (20.32)
0.790 (20.07)
0.780 (19.81)
16
1
9
8
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 28. 16-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-16)
Dimensions shown in inches and (millimeters)
0.098 (2.49) MAX
9
0.005 (0.13) MIN
16
0.310 (7.87)
0.220 (5.59)
1
8
PIN 1
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.840 (21.34) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
15°
0°
0.070 (1.78)
0.030 (0.76)
0.023 (0.58)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 29. 16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
Dimensions shown in inches and (millimeters)
Rev. C | Page 14 of 16
ADG408/ADG409
10.00 (0.3937)
9.80 (0.3858)
16
1
9
8
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.75 (0.0689)
1.35 (0.0531)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
× 45°
0.25 (0.0098)
0.10 (0.0039)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 30. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
5.10
5.00
4.90
16
9
8
4.50
4.40
4.30
6.40
BSC
1
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.75
0.60
0.45
8°
0°
0.30
0.19
0.65
BSC
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 31. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
Rev. C | Page 15 of 16
ADG408/ADG409
ORDERING GUIDE
Model
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
Package Description
Package Option
N-16
16-Lead Plastic Dual In-Line Package [PDIP]
ADG408BN
ADG408BNZ1
16-Lead Plastic Dual In-Line Package [PDIP]
N-16
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Ceramic Dual In-Line Package [CERDIP]
DIE
ADG408BR
R-16
ADG408BR-REEL
ADG408BR-REEL7
ADG408BRU
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
ADG408BRU-REEL
ADG408BRU-REEL7
ADG408BRUZ1
ADG408BRUZ-REEL1
ADG408BRUZ-REEL71
ADG408BRZ1
ADG408BRZ-REEL1
ADG408BRZ-REEL71
ADG408TQ
R-16
R-16
Q-16
ADG408BCHIPS
16-Lead Plastic Dual In-Line Package [PDIP]
ADG409BN
ADG409BNZ1
N-16
N-16
R-16
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Ceramic Dual In-Line Package [CERDIP]
ADG409BR
ADG409BR-REEL
ADG409BR-REEL7
ADG409BRU
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
ADG409BRU-REEL
ADG409BRU-REEL7
ADG409BRUZ1
ADG409BRUZ-REEL1
ADG409BRUZ-REEL71
ADG409BRZ1
ADG409BRZ-REEL1
ADG409BRZ-REEL71
ADG409TQ
R-16
R-16
Q-16
1 Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00027-0-10/06(C)
Rev. C | Page 16 of 16
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