ADG439FBR-REEL [ADI]
High Performance, 4-Channel, Fault-Protected Analog Multiplexer;
| 型号： | ADG439FBR-REEL |
| 厂家： | 
ADI |
| 描述： | High Performance, 4-Channel, Fault-Protected Analog Multiplexer 光电二极管 |
| 文件： | 总16页 (文件大小：302K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Performance, 4-/8-Channel,
Fault-Protected Analog Multiplexers
ADG438F/ADG439F
FEATURES
FUNCTIONAL BLOCK DIAGRAM
All switches off with power supply off
ADG438F
Analog output of on channel clamped within power supplies
if an overvoltage occurs
S1
Latch-up proof construction
Fast switching times
D
t
t
ON 250 ns maximum
OFF 150 ns maximum
Fault and overvoltage protection: −40 V to +55 V
Break-before-make construction
S8
1 OF 8
DECODER
TTL- and CMOS-compatible inputs
APPLICATIONS
A0 A1 A2 EN
Figure 1.
Data acquisition systems
Industrial and process control systems
Avionics test equipment
Signal routing between systems
High reliability control systems
ADG439F
S1A
S4A
DA
DB
GENERAL DESCRIPTION
S1B
S4B
The ADG438F and ADG439F are CMOS analog multiplexers, with
the ADG438F comprising eight single channels and the ADG439F
comprising four differential channels. These multiplexers provide
fault protection. Using a series n-channel, p-channel, and
n-channel MOSFET structure, both device and signal source
protection is provided in the event of an overvoltage or power
loss. The multiplexer can withstand continuous overvoltage
inputs from −40 V to +55 V. During fault conditions with power
supplies off, the multiplexer input (or output) appears as an open
circuit and only a few nanoamperes of leakage current flows. This
protects not only the multiplexer and the circuitry driven by the
multiplexer, but also protects the sensors or signal sources which
drive the multiplexer.
1 OF 4
DECODER
A1
A0
EN
Figure 2.
PRODUCT HIGHLIGHTS
1. Fault Protection. The ADG438F and ADG439F can with-
stand continuous voltage inputs up to −40 V or +55 V.
When a fault occurs due to the power supplies being
turned off, all the channels are turned off and only a
leakage current of a few nanoamperes flows.
The ADG438F switches one of eight inputs to a common output
as determined by the 3-bit binary address lines, A0, A1, and A2.
The ADG439F switches one of four differential inputs to a
common differential output as determined by the 2-bit binary
address lines, A0 and A1. An EN input on each device is used
to enable or disable the device. When disabled, all channels are
switched off.
2. On channel saturates while fault exists.
3. Low RON
.
4. Fast Switching Times.
5. Break-Before-Make Switching. Switches are guaranteed
break-before-make so that input signals are protected
against momentary shorting.
6. Trench Isolation Eliminates Latch-Up. A dielectric trench
separates the p-channel and n-channel MOSFETs thereby
preventing latch-up.
7. Improved Off Isolation. Trench isolation enhances the
channel-to-channel isolation of the ADG438F/ADG439F.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2011 Analog Devices, Inc. All rights reserved.
ADG438F/ADG439F
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics ..............................................7
Test Circuits........................................................................................9
Terminology.................................................................................... 12
Theory of Operation ...................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
7/11—Rev. D to Rev. E
Updated Format..................................................................Universal
Changes to Product Highlights Section and General
Description........................................................................................ 1
Changes to Specification Section and Table 1 .............................. 3
Changes to Table 2............................................................................ 5
Added Table 3 and Table 4; Renumbered Sequentially ............... 6
Changes to Figure 5 to Figure 10.................................................... 7
Changes to Figure 11 to Figure 13.................................................. 8
Added Figure 14 to Figure 16.......................................................... 8
Changes to Figure 18 to Figure 20, Figure 23, and Figure 24 ..... 9
Changes to Terminology Section.................................................. 12
Changes to Theory of Operation Section, Figure 29, and
Figure 30 .......................................................................................... 13
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide .......................................................... 15
2/00—Rev. C to Rev. D
Rev. E | Page 2 of 16
ADG438F/ADG439F
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V 10%, VSS = −15 V 10%, GND = 0 V, unless otherwise noted.
Table 1.
B Version
−40°C to −40°C to −40°C to
Parameter
+25°C
+85°C
+105°C
+125°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
VSS + 1.4
VDD − 1.4
VSS + 2.2
VDD – 2.2
270
V typ
V typ
V typ
V typ
Ω typ
Ω max
% typ
% max
Output open circuit
Output loaded, 1 mA
RON
−10 V ≤ VS ≤ +10 V, IS = 1 mA
See Figure 17
−10 V ≤ VS ≤ +10 V, IS = 1 mA
390
10
3
420
10
3
450
10
3
On-Resistance Flatness, RFLAT (ON)
9
10
0.6
3
RON Drift
On-Resistance Match Between
Channels, ΔRON
%/°C typ VS = 0 V, IS = 1 mA
% max
VS = 10 V, IS = 1 mA
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
0.01
0.5
0.01
0.5
0.01
0.5
nA typ
nA max
nA typ
nA max
nA typ
nA max
VD = 10 V, VS = m10 V
See Figure 18
VD = 10 V, VS = m10 V
See Figure 19
VS = VD = 10 V
See Figure 20
1.5
5
1.5
5
4
Drain Off Leakage, ID (Off)
ADG438F ADG439F
Channel On Leakage, ID, IS (On)
ADG438F/ADG439F
20
20
5
5
FAULT
Source Leakage Current, IS (Fault)
0.02
nA typ
VS = +55 V or −40 V, VD = 0 V;
see Figure 21
(With Overvoltage)
Drain Leakage Current, ID (Fault)
(With Overvoltage)
Source Leakage Current, IS (Fault)
(Power Supplies Off)
0.05
0.05
0.05
30
0.1
0.1
0.2
0.2
0.2
0.2
μA max
nA typ
μA max
nA typ
VS = 25 V, VD = m10 V; see Figure 19
VS = 25 V, VD = VEN, A0, A1, A2 = 0 V
See Figure 22
0.1
0.2
0.3
1
μA max
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
2.4
0.8
V min
V max
IINL or IINH
1
1
1
μA max
pF typ
VIN = 0 V or VDD
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tTRANSITION
5
175
220
90
ns typ
ns max
RL = 1 MΩ, CL = 35 pF
VS1 = 10 V, VS8 = m10 V; see Figure 25
300
40
300
40
330
40
tOPEN
60
ns min
RL = 1 kΩ, CL = 35 pF, VS = 5 V;
see Figure 26
tON (EN)
tOFF (EN)
180
230
100
130
ns typ
ns max
ns typ
ns max
RL = 1 kΩ, CL = 35 pF
VS = 5 V; see Figure 27
RL = 1 kΩ, CL = 35 pF
VS = 5 V; see Figure 27
300
150
300
150
345
173
Rev. E | Page 3 of 16
ADG438F/ADG439F
B Version
−40°C to −40°C to −40°C to
Parameter
Settling Time, tSETT
0.1%
0.01%
Charge Injection
+25°C
+85°C
+105°C
+125°C
Unit
Test Conditions/Comments
1
1
1
μs typ
μs typ
pC typ
RL = 1 kΩ, CL = 35 pF
VS = 5 V
VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 28
RL = 1 kΩ, CL = 15 pF, f = 100 kHz,
VS = 7 V rms; see Figure 23
RL = 1 kΩ, CL = 15 pF, f = 100 kHz,
VS = 7 rms; see Figure 24
2.5
2.5
2.5
15
93
93
3
Off Isolation
dB typ
dB typ
pF typ
Channel-to-Channel Crosstalk
CS (Off)
CD (Off)
ADG438F
ADG439F
POWER REQUIREMENTS
IDD
22
12
pF typ
pF typ
0.05
0.1
0.1
mA typ
mA max
μA typ
VIN = 0 V or 5 V
0.2
1
0.2
1
0.2
1
ISS
μA max
1 Guaranteed by design, not subject to production test.
Rev. E | Page 4 of 16
ADG438F/ADG439F
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 2.
Parameter
Rating
VDD to VSS
48 V
VDD to GND
VSS to GND
−0.3 V to +48 V
+0.3 V to −48 V
Digital Input, EN, Ax
−0.3 V to VDD + 0.3 V or 20 mA,
whichever occurs first
VS, Analog Input Overvoltage with
Power On (VDD = +15 V, VSS = −15 V)
VSS − 25 V to VDD + 40 V
ESD CAUTION
VS, Analog Input Overvoltage with
Power Off (VDD = 0 V, VSS = 0 V)
−40 V to +55 V
Continuous Current, S or D
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
20 mA
40 mA
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
Plastic DIP Package
θJA, Thermal Impedance
SOIC Package
−40°C to +125°C
−65°C to +150°C
150°C
117°C/W
θJA, Thermal Impedance
Narrow Body
Wide Body
125°C/W
90°C/W
Rev. E | Page 5 of 16
ADG438F/ADG439F
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A0
1
2
3
4
5
6
7
8
A0
EN
1
2
3
4
5
6
7
8
16 A1
16 A1
EN
15 A2
15 GND
V
V
SS
14 GND
14
V
DD
SS
ADG438F
ADG439F
TOP VIEW
(Not to Scale)
S1
S1A
13
V
13 S1B
12 S2B
11 S3B
TOP VIEW
DD
(Not to Scale)
S2
S3
S4
D
S2A
S3A
S4A
DA
12 S5
11 S6
10 S7
10
9
S4B
DB
9
S8
Figure 3. ADG438F Pin Configuration
Figure 4. ADG439F Pin Configuration
Table 3. ADG438F Pin Function Description
Table 4. ADG439F Pin Function Description
Pin
No.
Pin
No.
Mnemonic Description
Mnemonic Description
1
2
A0
EN
Logic Control Input.
1
2
A0
EN
Logic Control Input.
Active High Digital Input. When low, the
device is disabled, and all switches are off.
When high, Ax logic inputs determine on
switches.
Active High Digital Input. When low, the
device is disabled, and all switches are off.
When high, Ax logic inputs determine on
switches.
3
VSS
Most Negative Power Supply Potential. In
single-supply applications, this pin can be
connected to ground.
3
VSS
Most Negative Power Supply Potential. In
single-supply applications, this pin can be
connected to ground.
4
S1
S2
S3
S4
D
Source Terminal 1. This pin can be an input
or an output.
Source Terminal 2. This pin can be an input
or an output.
Source Terminal 3. This pin can be an input
or an output.
Source Terminal 4. This pin can be an input
or an output.
4
S1A
S2A
S3A
S4A
DA
Source Terminal 1A. This pin can be an
input or an output.
Source Terminal 2A. This pin can be an
input or an output.
Source Terminal 3A. This pin can be an
input or an output.
Source Terminal 4A. This pin can be an
input or an output.
5
5
6
6
7
7
8
Drain Terminal. This pin can be an input or
an output.
8
Drain Terminal A. This pin can be an input
or an output.
9
S8
S7
S6
S5
Source Terminal 8. This pin can be an input
or an output.
Source Terminal 7. This pin can be an input
or an output.
Source Terminal 6. This pin can be an input
or an output.
Source Terminal 5. This pin can be an input
or an output.
9
DB
Drain Terminal B. This pin can be an input
or an output.
Source Terminal 4B. This pin can be an
input or an output.
Source Terminal 3B. This pin can be an
input or an output.
Source Terminal 2B. This pin can be an
input or an output.
Source Terminal 1B. This pin can be an
input or an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
10
11
12
10
11
12
13
S4B
S3B
S2B
S1B
13
14
15
16
VDD
GND
A2
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
14
15
16
VDD
GND
A1
A1
Logic Control Input.
Logic Control Input.
Table 5. ADG438F Truth Table1
Table 6. ADG439F Truth Table1
A2
X
0
0
0
0
1
1
1
A1
X
0
0
1
1
0
0
1
A0
X
0
1
0
1
0
1
0
EN
On Switch
A1
A0
EN
On Switch Pair
0
1
1
1
1
1
1
1
None
X
0
0
1
X
0
1
0
0
1
1
1
None
1
2
3
4
5
6
7
8
1
2
3
4
1
1
1
1 X = don’t care.
1
1
1
1
1 X = don’t care.
Rev. E | Page 6 of 16
ADG438F/ADG439F
TYPICAL PERFORMANCE CHARACTERISTICS
2000
2000
1750
1500
1250
1000
750
T
= 25°C
A
V
V
= +15V
= –15V
DD
SS
1750
1500
1250
1000
750
500
250
0
V
= +5V
= –5V
DD
SS
T
T
T
T
= 125°C
= 105°C
= 85°C
= 25°C
V
A
A
A
A
V
V
= +10V
= –10V
DD
SS
V
V
= +15V
= –15V
DD
SS
500
250
0
–15
–15
–10
–5
0
5
10
15
–10
–5
0
5
10
15
V
, V (V)
S
D
V , V (V)
D S
Figure 5. On Resistance as a Function of VD (VS)
Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures
1m
100µ
10µ
1µ
1m
V
V
V
= 0V
= 0V
= 0V
100µ
DD
SS
V
V
V
= +15V
= –15V
= 0V
DD
SS
D
10µ
1µ
D
OPERATING RANGE
100n
10n
1n
100n
10n
1n
OPERATING RANGE
100p
10p
1p
100p
10p
1p
–50 –40 –30 –20 –10
0
10
20
30
40
50
60
–50 –40 –30 –20 –10
0
10
20
30
40
50
60
V
SOURCE VOLTAGE (V)
V
SOURCE VOLTAGE (V)
S
S
Figure 6. Source Input Leakage Current as a Function of VS (Power Supplies Off)
During Overvoltage Conditions
Figure 9. Source Input Leakage Current as a Function of VS (Power Supplies On)
During Overvoltage Conditions
1m
0.3
V
V
V
= +15V
= –15V
DD
100µ
V
V
V
= +15V
= –15V
= 0V
DD
SS
SS
0.2
0.1
(V ) = ±10V
S
A
D
10µ
1µ
D
T
= 25°C
100n
10n
1n
I
(OFF)
D
0.0
I
(OFF)
S
–0.1
–0.2
–0.3
OPERATING RANGE
100p
10p
1p
I
, I (ON)
S
D
–50 –40 –30 –20 –10
0
10
20
30
40
50
60
–14
–10
–6
–2
2
V , V (V)
S
6
10
14
V
SOURCE VOLTAGE (V)
S
D
Figure 7. Drain Output Leakage Current as a Function of VS (Power Supplies On)
During Overvoltage Conditions
Figure 10. Leakage Currents as a Function of VD (VS)
Rev. E | Page 7 of 16
ADG438F/ADG439F
100
0
–20
T
= 25°C
A
V
V
= +15V
= –15V
DD
SS
V
V
V
V
= +15V
= –15V
= +10V
DD
SS
D
S
10
1
= –10V
–40
I
(OFF)
D
–60
I
(ON)
D
–80
I
(OFF)
0.1
0.01
S
–100
–120
1k
10k
100k
1M
10M
100M
1G
25
35
45
55
65
75
85
95
105 115 125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 14. Off Isolation vs. Frequency, 15 V Dual Supply
Figure 11. Leakage Currents as a Function of Temperature
40
35
30
25
20
15
10
5
260
T
V
V
= 25°C
= +15V
A
240
220
200
180
160
140
120
100
DD
= –15V
tTRANSITION
SS
tON (EN)
DRAIN OFF
tOFF (EN)
SOURCE OFF
0
–15
–10
–5
0
5
10
15
10
11
12
13
14
15
POWER SUPPLY (V)
V
(V)
S
Figure 12. Switching Time vs. Dual Power Supply
Figure 15. Capacitance vs. Source Voltage
300
250
200
150
100
50
30
20
V
V
= +15V
= –15V
DD
SS
V
V
T
= +15V
= –15V
= 25°C
DD
SS
tON (EN)
A
10
tTRANSITION
0
tOFF (EN)
–10
–20
–30
0
–40
–20
0
20
40
60
80
100
120
–15
–10
–5
0
5
10
15
TEMPERATURE (°C)
V
(V)
S
Figure 13. Switching Time vs. Temperature
Figure 16. Charge Injection vs. Source Voltage
Rev. E | Page 8 of 16
ADG438F/ADG439F
TEST CIRCUITS
I
DS
V
V
V
V
DD
SS
V1
DD
SS
S1
S2
A
D
D
S
S8
V
S
EN
0.8V
V
V
D
S
R
= V /I
1 DS
ON
Figure 17. On Resistance
Figure 21. Input Leakage Current (with Overvoltage)
0V
0V
V
V
V
V
DD
SS
V
V
SS
DD
0V
A2
A
V
S
S1
DD
SS
A1ADG438F*
I
(OFF)
A
S
S1
S2
A0
S8
D
EN
D
V
S8
S
EN
0.8V
GND
V
D
*SIMILAR CONNECTION FOR ADG439F.
Figure 18. IS (Off)
Figure 22. Input Leakage Current (with Power Supplies Off)
V
V
DD
DD
V
V
V
V
DD
DD
SS
SS
A2
A1
A0
S1
S8
V
IN
S1
S2
ADG438F*
I
(OFF)
A
D
D
D
V
OUT
R
50Ω
L
S8
V
D
GND
V
V
SS
SS
EN
0.8V
V
S
*SIMILAR CONNECTION FOR ADG439F.
Figure 19. ID (Off)
Figure 23. Off Isolation
V
V
DD
SS
0.1µF
0.1µF
NETWORK
ANALYZER
V
V
DD
SS
V
OUT
S1
R
L
50Ω
D
R
50Ω
S2
V
S
GND
I
(ON)
A
D
S
D
NC
V
OUT
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
V
V
D
S
NC = NO CONNECT
Figure 20. ID (On)
Figure 24. Channel-to-Channel Crosstalk
Rev. E | Page 9 of 16
ADG438F/ADG439F
V
V
V
V
DD
SS
3V
DD
SS
A2
V
V
S1
S2 TO S7
ADDRESS
S1
50%
50%
A1
A0
DRIVE (V
)
V
50Ω
IN
IN
ADG438F*S8
S8
2.4V
EN
D
V
OUT
R
1MΩ
C
L
35pF
L
90%
GND
V
OUT
90%
*SIMILAR CONNECTION FOR ADG439F.
tTRANSITION
tTRANSITION
Figure 25. Switching Time of Multiplexer, tTRANSITION
V
V
V
V
DD
DD
SS
3V
ADDRESS
SS
DRIVE (V
)
IN
A2
A1
A0
V
S1
S2 TO S7
S
V
50Ω
IN
ADG438F*S8
D
V
OUT
80%
2.4V
EN
GND
V
80%
OUT
R
1kΩ
C
L
35pF
L
tOPEN
*
*SIMILAR CONNECTION FOR ADG439F.
Figure 26. Break-Before-Make Delay, tOPEN
V
V
V
V
DD
SS
3V
ENABLE
50%
50%
DRIVE (V
)
DD
SS
IN
A2
V
S1
S2 TO S8
S
0V
A1
A0
ADG438F*
V
OUT
0.9V
OUT
D
V
OUT
EN
GND
OUTPUT
0V
R
1kΩ
C
L
35pF
L
V
50Ω
IN
0.1V
OUT
tOFF (EN)
tON (EN)
*SIMILAR CONNECTION FOR ADG439F.
Figure 27. Enable Delay, tON (EN), tOFF (EN)
Rev. E | Page 10 of 16
ADG438F/ADG439F
V
V
V
V
DD
DD
SS
SS
3V
A2
LOGIC
INPUT (V
)
A1
A0
S
IN
ADG438F*
0V
R
S
D
V
OUT
EN
C
1nF
V
L
S
∆V
V
OUT
OUT
GND
V
IN
Q
= C × ∆V
L OUT
INJ
*SIMILAR CONNECTION FOR ADG439F.
Figure 28. Charge Injection
Rev. E | Page 11 of 16
ADG438F/ADG439F
TERMINOLOGY
CS (Off)
VDD
Channel input capacitance for off condition.
Most positive power supply potential.
CD (Off)
VSS
Channel output capacitance for off condition.
Most negative power supply potential.
CD, CS (On)
On switch capacitance.
GND
Ground (0 V) reference.
CIN
RON
Digital input capacitance.
Ohmic resistance between D and S.
t
ON (EN)
ΔRON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
ΔRON represents the difference between the RON of any two
channels as a percentage of the maximum RON of those two
channels.
t
OFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of the on resistance measured over the specified
tTRANSITION
analog signal range and is represented by RFLAT (ON)
.
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
Flatness is calculated by
((RMAX − RMIN) / RMAX × 100)
RON Drift
Change in RON when temperature changes by one degree Celsius.
tOPEN
Off time measured between 80% points of both switches when
switching from one address state to another.
IS (Off)
VINL
Source leakage current when the switch is off.
Maximum input voltage for Logic 0.
ID (Off)
VINH
Drain leakage current when the switch is off.
Minimum input voltage for Logic 1.
ID, IS (On)
I
INL (IINH)
Channel leakage current when the switch is on.
Input current of the digital input.
VD (VS)
Off Isolation
Analog voltage on Terminal D and Terminal S.
A measure of unwanted signal coupling through an off channel.
IS (Fault—Power Supplies On)
Source leakage current when exposed to an overvoltage
condition.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
ID (Fault—Power Supplies On)
Drain leakage current when exposed to an overvoltage
condition.
IDD
Positive supply current.
ISS
IS (Fault—Power Supplies Off)
Source leakage current with power supplies off.
Negative supply current.
Rev. E | Page 12 of 16
ADG438F/ADG439F
THEORY OF OPERATION
Q1
Q2
Q3
The ADG438F/ADG439F multiplexers are capable of withstanding
overvoltages from −40 V to +55 V, irrespective of whether the
power supplies are present or not. Each channel of the multiplexer
consists of an n-channel MOSFET, a p-channel MOSFET, and
an n-channel MOSFET, connected in series. When the analog
input exceeds the power supplies, one of the MOSFETs saturates,
limiting the current. The current during a fault condition is
determined by the load on the output. Figure 31 illustrates the
channel architecture that enables these multiplexers to with-
stand continuous overvoltages.
+55V
OVERVOLTAGE
n-CHANNEL
MOSFET
SATURATES
V
V
SS
DD
Figure 29. +55 V Overvoltage Input to the On Channel
Q1
Q2
Q3
–40V
OVERVOLTAGE
n-CHANNEL
MOSFET
IS ON
p-CHANNEL
MOSFET
SATURATES
When an analog input of VSS + 2.2 V to VDD – 2.2 V (output loaded,
1 mA) is applied to the ADG438F/ADG439F, the multiplexer
behaves as a standard multiplexer, with specifications similar to
a standard multiplexer, for example, the on-resistance is 270 Ω
typically. However, when an overvoltage is applied to the device,
one of the three MOSFETs saturates.
V
V
DD
SS
Figure 30. −40 V Overvoltage on an Off Channel with Multiplexer Power On
Q1
Q2
Q3
+55V
OVERVOLTAGE
n-CHANNEL
Figure 29 to Figure 32 show the conditions of the three
MOSFETs for the various overvoltage situations. When the
analog input applied to an on channel approaches the positive
power supply line, the n-channel MOSFET saturates because
the voltage on the analog input exceeds the difference between
MOSFET IS
OFF
Figure 31. +55 V Overvoltage with Power Off
Q1
Q2
Q3
V
DD and the n-channel threshold voltage (VTN). When a voltage
–40V
OVERVOLTAGE
more negative than VSS is applied to the multiplexer, the p-channel
MOSFET saturates because the analog input is more negative
than the difference between VSS and the p-channel threshold
voltage (VTP). Because VTN is nominally 1.4 V and VTP − 1.4 V,
the analog input range to the multiplexer is limited to VSS + 1.4 V
to VDD − 1.4 V (output open circuit) when a 15 V power supply
is used.
n-CHANNEL
MOSFET IS
ON
p-CHANNEL
MOSFET IS
OFF
Figure 32. –40 V Overvoltage with Power Off
When the power supplies are present but the channel is off, again
either the p-channel MOSFET or one of the n-channel MOSFETs
remains off when an overvoltage occurs.
Finally, when the power supplies are off, the gate of each MOSFET
is at ground. A negative overvoltage switches on the first n-channel
MOSFET, but the bias produced by the overvoltage causes the
p-channel MOSFET to remain turned off. With a positive over-
voltage, the first MOSFET in the series remains off because the
gate to source voltage applied to this MOSFET is negative.
During fault conditions (power supplies off), the leakage current
into and out of the ADG438F/ADG439F is limited to a few
microamps. This limit protects the multiplexer and succeeding
circuitry from over stresses as well as protects the signal sources
that drive the multiplexer. Also, the other channels of the multi-
plexer are undisturbed by the overvoltage and continue to operate
normally.
Rev. E | Page 13 of 16
ADG438F/ADG439F
OUTLINE DIMENSIONS
0.800 (20.32)
0.790 (20.07)
0.780 (19.81)
16
1
9
8
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 33. 16-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-16)
Dimensions shown in inches and (millimeters)
10.00 (0.3937)
9.80 (0.3858)
9
8
16
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
0.50 (0.0197)
0.25 (0.0098)
45°
BSC
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 34. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
Rev. E | Page 14 of 16
ADG438F/ADG439F
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.
25 (0.0098)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 35. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
Package Option
N-16
N-16
R-16
R-16
R-16
R-16
N-16
N-16
R-16
R-16
RW-16
RW-16
RW-16
R-16
ADG438FBN
ADG438FBNZ
ADG438FBR
ADG438FBR-REEL
ADG438FBRZ
ADG438FBRZ-REEL
ADG439FBN
ADG439FBNZ
ADG439FBR
ADG439FBR-REEL
ADG439FBRW
ADG439FBRWZ
ADG439FBRWZ-REEL
ADG439FBRZ
ADG439FBRZ-REEL
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
R-16
1 Z = RoHS Compliant Part.
Rev. E | Page 15 of 16
ADG438F/ADG439F
NOTES
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00468-0-7/11(E)
Rev. E | Page 16 of 16
相关型号：
ADG439FBRW-REEL
IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, 0.300 INCH, SOIC-16, Multiplexer or Switch
ADI
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