ADG452 [ADI]
LC2MOS 5 ohm RON SPST Switches; LC2MOS 5欧姆RON SPST开关
| 型号： | ADG452 |
| 厂家： | 
ADI |
| 描述： | LC2MOS 5 ohm RON SPST Switches |
| 文件： | 总12页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2
LC MOS
a
5 ⍀ R SPST Switches
ON
ADG451/ADG452/ADG453
FUNCTIO NAL BLO CK D IAGRAMS
FEATURES
Low On Resistance (4 ⍀)
On Resistance Flatness 0.2 ⍀
44 V Supply Maxim um Ratings
؎15 V Analog Signal Range
Fully Specified @ ؎5 V, +12 V, ؎15 V
Ultralow Pow er Dissipation (18 W)
ESD 2 kV
S1
S1
IN1
IN2
IN3
IN4
IN1
IN2
IN3
IN4
D1
S2
D1
S2
D2
S3
D2
S3
ADG451
ADG452
Continuous Current 100 m A
Fast Sw itching Tim es
D3
S4
D3
S4
tO 70 ns
N
tOFF 60 ns
D4
D4
TTL/ CMOS Com patible
Pin Com patible Upgrade for ADG411/ ADG412/ ADG413
and ADG431/ ADG432/ ADG433
S1
IN1
D1
S2
APPLICATIONS
IN2
IN3
IN4
Relay Replacem ent
D2
S3
Audio and Video Sw itching
Autom atic Test Equipm ent
Precision Data Acquisition
Battery Pow ered System s
Sam ple Hold System s
Com m unication System s
PBX, PABX System s
Avionics
ADG453
D3
S4
D4
SWITCHES SHOWN FOR A LOGIC "1" INPUT
T he ADG453 exhibits break-before-make switching action for
use in multiplexer applications. Inherent in the design is low charge
injection for minimum transients when switching the digital inputs.
GENERAL D ESCRIP TIO N
T he ADG451, ADG452 and ADG453 are monolithic CMOS
devices comprising four independently selectable switches. T hey
are designed on an enhanced LC2MOS process that provides
low power dissipation yet gives high switching speed and low on
resistance.
P RO D UCT H IGH LIGH TS
1. Low RON (5 Ω max)
2. Ultralow Power Dissipation
T he on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed coupled with high
signal bandwidth also make the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipa-
tion making the parts ideally suited for portable and battery
powered instruments.
3. Extended Signal Range
T he ADG451, ADG452 and ADG453 are fabricated on an
enhanced LC2MOS process giving an increased signal
range that fully extends to the supply rails.
4. Break-Before-Make Switching
T his prevents channel shorting when the switches are
configured as a multiplexer. (ADG453 only.)
T he ADG451, ADG452 and ADG453 contain four indepen-
dent single-pole/single-throw (SPST ) switches. T he ADG451
and ADG452 differ only in that the digital control logic is in-
verted. T he ADG451 switches are turned on with a logic low on
the appropriate control input, while a logic high is required for
the ADG452. T he ADG453 has two switches with digital con-
trol logic similar to that of the ADG451 while the logic is in-
verted on the other two switches.
5. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG451, ADG452 and ADG453 can be operated from a
single rail power supply. T he parts are fully specified with a
single +12 V power supply and will remain functional with
single supplies as low as +5.0 V.
6. Dual Supply Operation
For applications where the analog signal is bipolar, the
ADG451, ADG452 and ADG453 can be operated from a
dual power supply ranging from ±4.5 V to ±20 V.
Each switch conducts equally well in both directions when ON
and has an input signal range which extends to the supplies. In
the OFF condition, signal levels up to the supplies are blocked.
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 781/ 329-4700
Fax: 781/ 326-8703
World Wide Web Site: http:/ / w w w .analog.com
© Analog Devices, Inc., 1998
1
ADG451/ADG452/ADG453–SPECIFICATIONS
(V = +15 V, V = –15 V, V = +5 V, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
Dual Supply
DD
SS
L
B Version
TMIN to
P aram eter
+25؇C
TMAX
Units
Test Conditions/Com m ents
ANALOG SWIT CH
Analog Signal Range
VSS to VDD
V
On-Resistance (RON
)
4.0
5
0.1
0.5
0.2
0.5
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VD = –10 V to +10 V, IS = –10 mA
VD = ±10 V, IS = –10 mA
7
On-Resistance Match Between
Channels (∆RON
)
0.5
0.5
On-Resistance Flatness (RFLAT (ON)
)
VD = –5 V, 0 V, +5 V, IS = –10 mA
LEAKAGE CURRENT S2
Source OFF Leakage IS (OFF)
±0.02
±0.5
±0.02
±0.5
±0.04
±1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VD = ±10 V, VS = ±10 V;
T est Circuit 2
VD = ±10 V, VS = ±10 V;
T est Circuit 2
VD = VS = ±10 V;
T est Circuit 3
±2.5
±2.5
±5
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGIT AL INPUT S
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
µA typ
µA max
VIN = VINL or VINH, All Others = 2.4 V
or 0.8 V Respectively
±0.5
DYNAMIC CHARACT ERIST ICS3
tON
70
180
60
140
15
5
ns typ
ns max
ns typ
ns max
ns typ
ns min
RL = 300 Ω, CL = 35 pF;
VS = ±10 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS = ±10 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS1 = VS2 = +10 V;
T est Circuit 5
220
180
5
tOFF
Break-Before-Make T ime Delay, tD
(ADG453 Only)
Charge Injection
20
30
65
pC typ
pC max
dB typ
VS = 0 V, RS = 0 Ω, CL = 1.0 nF;
T est Circuit 6
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
T est Circuit 7
OFF Isolation
Channel-to-Channel Crosstalk
–90
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
T est Circuit 8
CS (OFF)
CD (OFF)
CD, CS (ON)
15
15
100
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
POWER REQUIREMENT S
VDD = +16.5 V, VSS = –16.5 V
Digital Inputs = 0 V or 5 V
IDD
ISS
IL
0.0001
0.5
0.0001
0.5
0.0001
0.5
0.0001
0.5
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
5
5
5
5
3
IGND
NOT ES
1T emperature range is as follows: B Version: –40°C to +85°C.
2T MAX = +70°C.
3Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. A
ADG451/ADG452/ADG453
Single Supply (V = +12 V, V = 0 V, V = +5 V, GND = 0 V. All specifications T
MIN to TMAX unless otherwise noted.)
DD
SS
L
B Version
T
MIN to
P aram eter
+25؇C
TMAX
Units
Test Conditions/Com m ents
ANALOG SWIT CH
Analog Signal Range
0 V to VDD
10
V
On-Resistance (RON
)
6
8
0.1
0.5
1.0
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VD = 0 V to 10 V, IS = –10 mA
VD = 10 V, IS = –10 mA
On-Resistance Match Between
Channels (∆RON
)
0.5
1.0
On-Resistance Flatness (RFLAT (ON)
)
VD = 0 V, +5 V, IS = –10 mA
LEAKAGE CURRENT S2, 3
Source OFF Leakage IS (OFF)
±0.02
±0.5
±0.02
±0.5
±0.04
±1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VD = 0 V, 10 V, VS = 0 V, 10 V;
T est Circuit 2
VD = 0 V, 10 V, VS = 0 V, 10 V;
T est Circuit 2
VD = VS = 0 V, 10 V;
T est Circuit 3
±2.5
±2.5
±5
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGIT AL INPUT S
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
µA typ
VIN = VINL or VINH
±0.5
µA max
DYNAMIC CHARACT ERIST ICS4
tON
100
220
80
160
15
ns typ
ns max
ns typ
ns max
ns typ
ns min
RL = 300 Ω, CL = 35 pF;
VS = +8 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS = +8 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS1 = VS2 = +8 V;
260
200
10
tOFF
Break-Before-Make T ime Delay, tD
(ADG453 Only)
10
T est Circuit 5
Charge Injection
10
pC typ
dB typ
VS = 0 V, RS = 0 Ω, CL = 1.0 nF;
T est Circuit 6
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
T est Circuit 8
Channel-to-Channel Crosstalk
–90
CS (OFF)
CD (OFF)
CD, CS (ON)
15
15
100
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
POWER REQUIREMENT S
VDD = +13.2 V
Digital Inputs = 0 V or 5 V
IDD
IL
0.0001
0.5
0.0001
0.5
0.0001
0.5
µA typ
µA max
µA typ
µA max
µA typ
µA max
5
5
5
VL = +5.5 V
VL = +5.5 V
4
IGND
NOT ES
1T emperature range is as follows: B Version: –40 °C to +85°C.
2T MAX = +70°C.
3T ested with dual supplies.
4Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. A
–3–
1
ADG451/ADG452/ADG453–SPECIFICATIONS
(V = +5 V, V = –5 V, V = +5 V, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
Dual Supply
DD
SS
L
B Version
TMIN to
P aram eter
+25؇C
TMAX
Units
Test Conditions/Com m ents
ANALOG SWIT CH
Analog Signal Range
On-Resistance (RON
VSS to VDD
V
)
7
Ω typ
Ω max
Ω typ
Ω max
VD = –3.5 V to +3.5 V, IS = –10 mA
VD = 3.5 V, IS = –10 mA
12
0.3
0.5
15
On-Resistance Match Between
Channels (∆RON
)
0.5
LEAKAGE CURRENT S2, 3
Source OFF Leakage IS (OFF)
±0.02
±0.5
±0.02
±0.5
±0.04
±1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VD = ±4.5, VS = ±4.5;
T est Circuit 2
VD = 0 V, 5 V, VS = 0 V, 5 V;
T est Circuit 2
VD = VS = 0 V, 5 V;
T est Circuit 3
±2.5
±2.5
±5
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGIT AL INPUT S
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
µA typ
VIN = VINL or VINH
±0.5
µA max
DYNAMIC CHARACT ERIST ICS4
tON
160
220
60
140
50
ns typ
ns max
ns typ
ns max
ns typ
ns min
RL = 300 Ω, CL = 35 pF;
VS = 3 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS = 3 V; T est Circuit 4
RL = 300 Ω, CL = 35 pF;
VS1 = VS2 = 3 V;
300
180
5
tOFF
Break-Before-Make T ime Delay, tD
(ADG453 Only)
5
T est Circuit 5
Charge Injection
10
pC typ
dB typ
dB typ
VS = 0 V, RS = 0 Ω, CL = 1.0 nF;
T est Circuit 6
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
T est Circuit 7
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
T est Circuit 8
OFF Isolation
65
Channel-to-Channel Crosstalk
–76
CS (OFF)
CD (OFF)
CD, CS (ON)
15
15
100
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
POWER REQUIREMENT S
VDD = +5.5 V
Digital Inputs = 0 V or 5 V
IDD
ISS
IL
0.0001
0.5
0.0001
0.5
0.0001
0.5
0.0001
0.5
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
5
5
5
5
VL = +5.5 V
VL = +5.5 V
4
IGND
NOT ES
1T emperature range is as follows: B Version: –40°C to +85°C.
2T MAX = +70°C.
3T ested with dual supplies.
4Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–4–
REV. A
ADG451/ADG452/ADG453
Truth Table (AD G451/AD G452)
Truth Table (AD G453)
AD G451 In
AD G452 In
Switch Condition
Logic
Switch 1, 4
Switch 2, 3
0
1
1
0
ON
OFF
0
1
OFF
ON
ON
OFF
P IN CO NFIGURATIO N
(D IP /SO IC)
O RD ERING GUID E
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
IN2
D2
S2
Tem perature
Range
P ackage
O ptions*
Model
ADG451
ADG452
ADG453
TOP VIEW
(Not to Scale)
ADG451BN
ADG451BR
ADG452BN
ADG452BR
ADG453BN
ADG453BR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-16
R-16A
N-16
R-16A
N-16
R-16A
V
V
V
SS
GND
S4
DD
L
S3
D3
IN3
D4
IN4
*N = Plastic DIP; R = Small Outline IC (SOIC).
ABSO LUTE MAXIMUM RATINGS1
(T A = +25°C unless otherwise noted)
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θJA T hermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead T emperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
VL to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Analog, Digital Inputs2 . . . . . . . . . . . VSS –2 V to VDD +2 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
NOT ES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. T his is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
Operating T emperature Range
2Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction T emperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
θ
JA T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead T emperature, Soldering (10 sec) . . . . . . . . . . . +260°C
CAUTIO N
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG451/ADG452/ADG453 feature proprietary ESD protection circuitry, permanent
damagemayoccur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–
ADG451/ADG452/ADG453
TERMINO LO GY
VD (VS)
Analog voltage on terminals D, S.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
VDD
VSS
Most positive power supply potential.
CS (OFF)
CD (OFF)
Most negative power supply potential in dual
supplies. In single supply applications, it may be
connected to GND.
CD, CS (ON) “ON” switch capacitance.
VL
Logic power supply (+5 V).
tON
tOFF
tD
Delay between applying the digital control input
and the output switching on. See T est Circuit 4.
GND
S
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Delay between applying the digital control input
and the output switching off.
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See T est
Circuit 5.
IN
RON
∆RON
Ohmic resistance between D and S.
On resistance match between any two channels
i.e., RONmax – RONmin.
Crosstalk
A measure of unwanted signal coupled through
from one channel to another as a result of para-
sitic capacitance.
RFLAT (ON)
Flatness is defined as the difference between the
maximum and minimum value of on-resistance as
measured over the specified analog signal range.
Off Isolation A measure of unwanted signal coupling through
an “OFF” switch.
IS (OFF)
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
ID (OFF)
ID, IS (ON)
Charge
Injection
A measure of the glitch impulse transferred
from the digital input to the analog output dur-
ing switching.
7
6
9
8
V
V
V
= +15V
= –15V
T
= +25؇C
DD
A
+85؇C
V
= +5V
SS
L
V
V
= +5V
= –5V
= +5V
L
DD
SS
7
5
4
3
2
+25؇C
–40؇C
6
5
4
3
2
V
= +13.5V
= –13.5V
DD
V
SS
V
V
= +15V
= –15V
DD
SS
V
V
= +16.5V
= –16.5V
DD
SS
1
0
1
0
15
0
5
10
–15
–10
–5
V
D
OR V DRAIN OR SOURCE VOLTAGE – V
S
V
OR V DRAIN OR SOURCE VOLTAGE – V
S
D
Figure 1. On Resistance as a Function of VD (VS)
for Various Dual Supplies
Figure 2. On Resistance as a Function of VD (VS)
for Different Tem peratures with Dual Supplies
–6–
REV. A
Typical Performance Characteristics–
ADG451/ADG452/ADG453
12
16
14
T
= +25؇C
A
V
V
V
= +15V
DD
11
10
9
V
V
= +5V
= 0V
V
= +5V
DD
SS
L
= 0V
SS
= +5V
L
12
10
8
+85؇C
8
V
V
= +16.5V
= 0V
DD
SS
7
V
V
= +15V
= 0V
+25؇C
–40؇C
DD
SS
V
= +13.5V
= 0V
DD
6
V
SS
5
6
4
4
2
3
2
1
0
0
3
D
18
0
6
9
12
15
10
OR V DRAIN OR SOURCE VOLTAGE – V
16
12
14
0
2
4
6
8
V
OR V DRAIN OR SOURCE VOLTAGE – V
S
V
D
S
Figure 3. On Resistance as a Function of VD (VS) for
Various Single Supplies
Figure 6. On Resistance as a Function of VD (VS)
for Different Tem peratures with Single Supplies
10
0.5
0.4
V
V
V
V
V
= +15V
= –15V
DD
SS
= +5V
V
V
T
= +15V
= –15V
L
D
S
DD
SS
0.3
0.2
0.1
= +15V
= –15V
= +25؇C
A
1.0
V
= +5V
I
(ON)
L
D
I (OFF)
S
I
(ON)
D
0
I
(OFF)
D
–0.1
0.1
I
(OFF)
–0.2
–0.3
D
–0.4
–0.5
I (OFF)
S
0.01
–9
OR V DRAIN OR SOURCE VOLTAGE – V
–15
–6
–3
0
3
6
9
15
–12
12
25
35
45
55
65
75
85
TEMPERATURE – ؇C
V
D
S
Figure 4. Leakage Currents as a Function of Tem perature
Figure 7. Leakage Currents as a Function of VD (VS)
70
100k
V
V
V
= +15V
= –15V
= +5V
4SW
DD
SS
SS
V
V
V
= +15V
= –15V
60
10k
1k
DD
SS
= +5V
L
50
40
100
10
I , I
+
+
30
20
I
L
1.0
1SW
10
0
0.1
0.01
1
100
10
10
100
1k
10k
100k
1M
10M
FREQUENCY – MHz
FREQUENCY – Hz
Figure 5. Supply Current vs. Input Switching Frequency
Figure 8. Off Isolation vs. Frequency
REV. A
–7–
ADG451/ADG452/ADG453
120
AP P LICATIO N
V
V
V
= ؉15V
DD
Figure 11 illustrates a precise, fast, sample-and-hold circuit.
An AD845 is used as the input buffer while the output
operational amplifier is an AD711. During the track mode,
SW1 is closed and the output VOUT follows the input signal
= –15V
SS
100
= ؉5V
L
R
= 50⍀
LOAD
80
60
VIN . In the hold mode, SW1 is opened and the signal is
held by the hold capacitor CH.
40
20
+5V
+15V
2200pF
+15V
SW2
S
C
D
D
C
+15V
AD845
AD711
–15V
1000pF
R
75⍀
C
0
100
V
OUT
V
IN
S
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
SW1
CH
2200pF
–15V
Figure 9. Crosstalk vs. Frequency
ADG451/
452/453
0
–0.5
–1.0
–15V
V
V
V
= ؉15V
DD
= –15V
SS
Figure 11. Fast, Accurate Sam ple-and-Hold Circuit
= ؉5V
L
Due to switch and capacitor leakage, the voltage on the
hold capacitor will decrease with time. The ADG451/
ADG452/ADG453 minimizes this droop due to its low
leakage specifications. The droop rate is further minimized
by the use of a polystyrene hold capacitor. The droop rate
for the circuit shown is typically 30 µV/µs.
–1.5
–2.0
–2.5
–3.0
–3.5
A second switch, SW2, that operates in parallel with SW1, is
included in this circuit to reduce pedestal error. Since both
switches will be at the same potential, they will have a differ-
ential effect on the op amp AD711, which will minimize
charge injection effects. Pedestal error is also reduced by the
compensation network RC and CC. This compensation net-
work reduces the hold time glitch while optimizing the ac-
quisition time. Using the illustrated op amps and component
values, the pedestal error has a maximum value of 5 mV over
the ±10 V input range. Both the acquisition and settling
times are 850 ns.
10
FREQUENCY – MHz
200
1
100
Figure 10. Frequency Response with Switch On
–8–
REV. A
ADG451/ADG452/ADG453
Test Circuits
I
DS
I (OFF)
I (OFF)
S
S
I
(ON)
D
V
1
V
V
D
S
V
V
D
S
V
S
R
= V /I
1 DS
ON
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
+15V
+5V
0.1F
0.1F
3V
ADG451
V
V
L
DD
50%
50%
50%
50%
V
IN
D
S
V
OUT
3V
R
C
35pF
L
L
V
V
IN
V
S
300⍀
ADG452
IN
90%
90%
OUT
V
GND
SS
V
IN
0.1F
–15V
t
t
OFF
ON
Test Circuit 4. Switching Tim es
+15V
+5V
0.1F
0.1F
3V
0V
V
V
DD
L
V
50%
50%
IN
ADG453
S1
S2
D1
D2
V
V
V
OUT1
S1
S2
90%
90%
C
R
L1
L1
V
V
OUT1
OUT2
35pF
300⍀
V
OUT2
0V
0V
R
C
L2
L2
35pF
300⍀
IN1, IN2
90%
90%
V
GND
SS
V
IN
tD
tD
0.1F
–15V
Test Circuit 5. Break-Before-Make Tim e Delay
REV. A
–9–
ADG451/ADG452/ADG453
+15V
+5V
V
S
V
D
L
3V
R
S
V
V
IN
V
OUT
V
C
L
10nF
S
OUT
⌬V
IN
OUT
V
= C
؋
⌬V L OUT
IN
V
GND
DD
–15V
Test Circuit 6. Charge Injection
+5V
+15V
0.1F
0.1F
V
V
L
DD
S
D
V
OUT
R
L
50⍀
IN
V
S
V
GND
SS
V
IN
0.1F
–15V
Test Circuit 7. Off Isolation
+15V
+5V
0.1F
0.1F
50⍀
S
D
V
IN1
V
S
V
IN2
S
D
V
NC
OUT
R
L
V
SS
GND
50⍀
CHANNEL-TO-CHANNEL
CROSSTALK = 20
؋
LOG|V /V |
OUT
S
0.1F
–15V
Test Circuit 8. Channel-to-Channel Crosstalk
–10–
REV. A
ADG451/ADG452/ADG453
O UTLINE D IMENSIO NS
Dimensions shown in inches and (mm).
16-Lead P lastic D IP
(N-16)
0.840 (21.34)
0.745 (18.92)
16
1
9
0.280 (7.11)
0.240 (6.10)
8
0.325 (8.26)
0.195 (4.95)
0.115 (2.93)
0.300 (7.62)
PIN 1
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.070 (1.77) SEATING
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
PLANE
0.045 (1.15)
16-Lead SO IC
(R-16A)
0.3937 (10.00)
0.3859 (9.80)
16
9
8
0.1574 (4.00)
0.2440 (6.20)
0.2284 (5.80)
1
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0196 (0.50)
x 45؇
0.0099 (0.25)
0.0098 (0.25)
0.0040 (0.10)
8؇
0؇
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
REV. A
–11–
–12–
相关型号：
ADG452BNZ
QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16, LEAD FREE, PLASTIC, MS-001AB, DIP-16
ROCHESTER
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