ADG611YRU [ADI]
1 pC Chanrge Injection, 100 pA Leakage, CMOS +-5 V/+5 V/+3 V Quad SPST Switches; 1 pC的Chanrge注入， 100 pA的泄漏， CMOS ±5 V / + 5V / + 3 V四路SPST开关
| 型号： | ADG611YRU |
| 厂家： | 
ADI |
| 描述： | 1 pC Chanrge Injection, 100 pA Leakage, CMOS +-5 V/+5 V/+3 V Quad SPST Switches |
| 文件： | 总12页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1 pC Charge Injection, 100 pA Leakage,
CMOS ؎5 V/+5 V/+3 V Quad SPST Switches
a
ADG611/ADG612/ADG613
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
1 pC Charge Injection
؎2.7 V to ؎5.5 V Dual Supply
+2.7 V to +5.5 V Single Supply
Automotive Temperature Range –40؇C to +125؇C
100 pA Max @ 25؇C Leakage Currents
85 ⍀ On-Resistance
Rail-to-Rail Switching Operation
Fast Switching Times
16-Lead TSSOP Packages
ADG611
ADG612
ADG613
S1
S1
S1
IN1
IN2
IN3
IN4
IN1
IN2
IN3
IN4
IN1
IN2
D1
S2
D1
S2
D1
S2
D2
S3
D2
S3
D2
S3
IN3
IN4
D3
S4
D3
S4
D3
S4
Typical Power Consumption (<0.1 W)
TTL/CMOS-Compatible Inputs
D4
D4
D4
APPLICATIONS
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Systems
Communication Systems
Sample and Hold Systems
Audio Signal Routing
Relay Replacement
SWITCHES SHOWN FOR A LOGIC “1” INPUT
Avionics
PRODUCT HIGHLIGHTS
GENERAL DESCRIPTION
1. Ultralow Charge Injection (1 pC typically)
2. Dual 2.7 V to 5.5 V or Single +2.7 V to +5.5 V
Operation.
The ADG611, ADG612, and ADG613 are monolithic CMOS
devices containing four independently selectable switches. These
switches offer ultralow charge injection of 1 pC over full input
signal range and typical leakage currents of 10 pA at 25°C.
3. Automotive Temperature Range, –40°C to +125°C
They are fully specified for 5 V, +5 V, and +3 V supplies.
They contain four independent single-pole/single-throw (SPST)
switches. The ADG611 and ADG612 differ only in that the
digital control logic is inverted. The ADG611 switches are turned
on with a logic low on the appropriate control input, while a logic
high is required to turn on the switches of the ADG612. The
ADG613 contains two switches whose digital control logic is
similar to the ADG611, while the logic is inverted on the other
two switches.
4. Small 16-lead TSSOP package.
Each switch conducts equally well in both directions when ON
and has an input signal range that extends to the supplies. The
ADG613 exhibits break-before-make switching action. The
ADG611/ADG612/ADG613 are available in small 16-lead
TSSOP packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
ADG611/ADG612/ADG613–SPECIFICATIONS
1
(V = +5 V ؎ 10%, V = –5 V ؎ 10%, GND = 0 V, unless otherwise noted.)
DUAL SUPPLY
DD
SS
Y Version
–40؇C
–40؇C
Parameter
25؇C
to +85؇C
to +125؇C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
VSS to VDD
V
On-Resistance (RON
)
85
115
2
4
25
40
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = 3 V, IS = –1 mA
Test Circuit 1
140
160
On-Resistance Match Between
Channels (∆RON
)
5.5
6.5
VS = 3 V, IS = –1 mA
VS = 3 V, IS = –1 mA
On-Resistance Flatness (RFLAT(ON)
)
55
60
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
VDD = +5.5 V, VSS = –5.5 V
VD = 4.5 V, VS = ϯ4.5 V;
Test Circuit 2
VD = 4.5 V, VS = ϯ4.5 V;
Test Circuit 2
0.01
0.1
0.01
0.1
0.01
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.25
0.25
0.25
2
2
6
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
VD = VS = 4.5 V, Test Circuit 3
0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
2
µA typ
µA max
pF typ
VIN = VINL or VINH
0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
45
65
25
40
15
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 300 Ω, CL = 35 pF
VS = 3.0 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 3.0 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
75
45
90
50
10
tOFF
Break-Before-Make Time Delay, tD
Charge Injection
V
S1 = VS2 = 3.0 V, Test Circuit 5
–0.5
–65
–90
680
VS = 0 V, RS = 0 Ω,
CL = 1 nF, Test Circuit 6
RL = 50 Ω, CL = 5 pF,
f = 10 MHz, Test Circuit 7
RL = 50 Ω, CL = 5 pF,
f = 10 MHz, Test Circuit 8
RL = 50 Ω, CL = 5 pF,
Test Circuit 9
Off Isolation
dB typ
Channel-to-Channel Crosstalk
–3 dB Bandwidth
dB typ
MHz typ
CS (OFF)
CD (OFF)
CD, CS (ON)
5
5
5
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
POWER REQUIREMENTS
IDD
VDD = +5.5 V, VSS = –5.5 V
Digital Inputs = 0 V or 5.5 V
0.001
0.001
µA typ
µA max
µA typ
µA max
1.0
1.0
ISS
Digital Inputs = 0 V or 5.5 V
NOTES
1Temperature range is as follows. Y Version: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
ADG611/ADG612/ADG613
SINGLE SUPPLY1
(VDD = 5 V ؎ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Y Version
–40
to +85
؇
C
–40
to +125
؇C
Parameter
25
؇C
؇C
؇C Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
380
V
On-Resistance (RON
)
210
290
3
Ω typ
Ω max
Ω typ
Ω max
VS = 3.5 V, IS = –1 mA;
Test Circuit 1
VS = 3.5 V , IS = –1 mA
350
12
On-Resistance Match Between
Channels (∆RON
)
10
13
LEAKAGE CURRENTS
VDD = 5.5 V
Source OFF Leakage IS (OFF)
0.01
0.1
0.01
0.1
0.01
0.1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 1 V/4.5 V, VD = 4.5 V/1 V;
Test Circuit 2
VS = 1 V/4.5 V, VD = 4.5 V/1 V;
Test Circuit 2
VS = VD = 1 V or 4.5 V, Test Circuit 3
0.25
0.25
0.25
2
2
6
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
2
µA typ
µA max
pF typ
VIN = VINL or VINH
0.1
CIN, Digital Input Capacitance2
DYNAMIC CHARACTERISTICS2
tON
70
100
25
40
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 300 Ω, CL = 35 pF
VS = 3.0 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 3.0 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 3.0 V, Test Circuit 5
VS = 0 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 6
130
45
150
50
tOFF
Break-Before-Make Time Delay, tD
Charge Injection
25
10
1
Off Isolation
–62
–90
dB typ
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz
Test Circuit 7
Channel-to-Channel Crosstalk
RL = 50 Ω, CL = 5 pF, f = 10 MHz
Test Circuit 8
–3 dB Bandwidth
CS (OFF)
CD (OFF)
680
5
5
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
CD, CS (ON)
5
POWER REQUIREMENTS
IDD
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
0.001
µA typ
µA max
1.0
NOTES
1Temperature ranges are as follows. Y Version: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–3–
REV. 0
ADG611/ADG612/ADG613–SPECIFICATIONS
SINGLE SUPPLY1
(VDD = 3 V ؎ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Y Version
–40
to +85
؇
C
–40
to +125
؇C
Parameter
25
؇C
؇C
؇C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
V
On-Resistance (RON
)
380
420
460
Ω typ
VS = 1.5 V, IS = –1 mA;
Test Circuit 1
LEAKAGE CURRENTS
VDD = 3.3 V
Source OFF Leakage IS (OFF)
0.01
0.1
0.01
0.1
0.01
0.1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 1 V/3 V, VD = 3 V/1 V;
Test Circuit 2
VS = 1 V/3 V, VD = 3 V/1 V;
Test Circuit 2
VS = VD = 1 V or 3 V, Test Circuit 3
0.25
0.25
0.25
2
2
6
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.0
0.8
V min
V max
IINL or IINH
0.005
2
µA typ
µA max
pF typ
VIN = VINL or VINH
0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
130
185
40
55
50
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 300 Ω, CL = 35 pF
VS = 2 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 2 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 2 V, Test Circuit 5
VS = 0 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 6
RL = 50 Ω, CL = 5 pF, f = 10 MHz
Test Circuit 7
RL = 50 Ω, CL = 5 pF, f = 10 MHz
Test Circuit 8
230
60
260
65
tOFF
Break-Before-Make Time Delay, tD
Charge Injection
10
1.5
–62
–90
Off Isolation
dB typ
dB typ
Channel-to-Channel Crosstalk
–3 dB Bandwidth
CS (OFF)
CD (OFF)
680
5
5
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9
pF typ
pF typ
pF typ
f = 1 MHz
f = 1 MHz
f = 1 MHz
CD, CS (ON)
5
POWER REQUIREMENTS
IDD
VDD = 3.3 V
Digital Inputs = 0 V or 3.3 V
0.001
µA typ
µA max
1.0
NOTES
1Temperature ranges are as follows. Y Version: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–4–
REV. 0
ADG611/ADG612/ADG613
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
16-Lead TSSOP, θJA Thermal Impedance . . . . . . . 150.4°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
NOTES
ABSOLUTE MAXIMUM RATINGS1
(TA = 25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V
V
SS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V
Analog Inputs2 . . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V
Digital Inputs2 . . . . . . . . . . . . . GND – 0.3 V to VDD + 0.3 V
or 30 mA, Whichever Occurs First
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 10 mA
3 V operation 85°C to 125°C . . . . . . . . . . . . . . . . . 7.5 mA
Operating Temperature Range
2Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +125°C
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG611YRU
ADG612YRU
ADG613YRU
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Thin Shrink Small Outline Package (TSSOP)
Thin Shrink Small Outline Package (TSSOP)
Thin Shrink Small Outline Package (TSSOP)
RU-16
RU-16
RU-16
PIN CONFIGURATIONS
Table I. ADG611/ADG612 Truth Table
ADG611 In
ADG612 In
Switch Condition
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
IN2
D2
S2
0
1
1
0
ON
OFF
ADG611
ADG612
ADG613
V
V
DD
SS
TOP VIEW
GND
NC
S3
(Not to Scale)
Table II. ADG613 Truth Table
S4
D4
D3
IN3
Logic
Switch 1, 4
Switch 2, 3
IN4
0
1
OFF
ON
ON
OFF
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG611/ADG612/ADG613 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–5–
REV. 0
ADG611/ADG612/ADG613
TERMINOLOGY
VDD
VSS
Most Positive Power Supply Potential
Most Negative Power Supply Potential
Positive Supply Current
IDD
ISS
Negative Supply Current
GND
S
Ground (0 V) Reference
Source Terminal. May be an input or output
Drain Terminal. May be an input or output
Logic Control Input
D
IN
VD (VS)
RON
∆RON
RFLAT(ON)
Analog Voltage on Terminals D, S
Ohmic Resistance between D and S
On Resistance match between any two channels, i.e., RONMAX – RONMIN
.
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured
over the specified analog signal range.
IS (OFF)
Source Leakage Current with the Switch “OFF”
I
D (OFF)
Drain Leakage Current with the Switch “OFF”
ID, IS (ON)
VINL
Channel Leakage Current with the Switch “ON”
Maximum Input Voltage for Logic “0”
VINH
Minimum Input Voltage for Logic “1”
I
INL(IINH
)
Input Current of the Digital Input.
CS (OFF)
CD (OFF)
CD, CS(ON)
CIN
“OFF” Switch Source Capacitance. Measured with reference to ground.
“OFF” Switch Drain Capacitance. Measured with reference to ground.
“ON” Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance
tON
Delay between applying the digital control input and the output switching on. See Test Circuit 4.
Delay between applying the digital control input and the output switching off.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
tOFF
Charge
Injection
Off Isolation
Crosstalk
A measure of unwanted signal coupling through an “OFF” switch.
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance.
On Response
Frequency Response of the “ON” Switch
Insertion
Loss
Loss Due to the ON Resistance of the Switch
–6–
REV. 0
Typical Performance Characteristics–ADG611/ADG612/ADG613
250
200
150
100
50
600
500
400
300
200
100
0
250
200
150
100
50
T
V
= 25؇C
T
= 25؇C
A
V
= +5V
= –5V
A
DD
= 0V
V
= 2.7V
SS
V
DD
SS
؎3.3V
V
= 3V
DD
V
= 3.3V
DD
؎4.5V
+125؇C
؎3V
؎2.7V
+85؇C
V
= 4.5V
DD
+25؇C
؎5.5V
؎5V
V
= 5V
DD
–40؇C
0
0
–5 –4 –3 –2 –1
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, V –V
–5 –4 –3 –2 –1
0
1
2
3
4
5
V
V
, V –V
S
V
, V –V
D
S
D
D
S
TPC 2. On Resistance vs. VD(VS),
Single Supply
TPC 1. On Resistance vs. VD(VS),
Dual Supply
TPC 3. On Resistance vs. VD(VS) for
Different Temperatures, Dual Supply
2
600
2
V
= 5V
= 0V
I
(OFF)
DD
I (OFF)
S
S
V
1
0
SS
1
0
500
400
300
200
100
0
I
(OFF)
–1
–2
–3
–4
–5
–6
–1
–2
–3
–4
–5
–6
D
I
(OFF)
D
I
, I (ON)
D
+125؇C
+25؇C
I
, I (ON)
D
S
S
+85؇C
V
= 5V
= 0V
V
= +5V
= –5V
DD
DD
–40؇C
V
V
SS
SS
0
20
40
60
80
100
120
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, V –V
0
20
40
60
80
100
120
TEMPERATURE – ؇C
V
D
S
TEMPERATURE – ؇C
TPC 5. Leakage Currents vs.
Temperature, Dual Supply
TPC 4. On Resistance vs. VD(VS)
for Different Temperatures,
Single Supply
TPC 6. Leakage Currents vs.
Temperature, Single Supply
0
120
2.0
T
= 25؇C
T
= 25؇C
A
A
V
= +3V
= 0V
V
= –5V
= +5V
DD
DD
–2
–4
1.5
1.0
V
V
tON,
V
= +5V
DD
SS
100
SS
V
= 0V
SS
V
DD
= 5V
= 0V
V
= +5V
–6
80
60
40
20
0
DD
V
0.5
V
= 0V
SS
SS
–8
tON,
V
V
= +5V
= –5V
DD
0
SS
–10
–12
–14
–0.5
–1.0
–1.5
–2.0
tOFF,
V
= +5V
DD
V
V
= +5V
DD
= 0V
SS
V
= –5V
SS
tOFF,
V
= +5V
= –5V
DD
–16
–18
V
SS
0.3
1
10
100
1000
–40 –20
0
20 40 60 80 100 120
–5 –4 –3 –2 –1
0
1
2
3
4
5
FREQUENCY – MHz
TEMPERATURE – ؇C
V
–V
S
TPC 8. tON/tOFF Times vs.
Temperature
TPC 7. Charge Injection vs.
Source Voltage
TPC 9. On Response vs. Frequency
–7–
REV. 0
ADG611/ADG612/ADG613
0
–10
–20
–30
–40
–50
–60
–70
APPLICATIONS
Figure 1 illustrates a photodetector circuit with programmable
gain. With the resistor values shown in the circuits, and using
different combinations of switches, gains in the range of 2 to 16
can be achieved.
C1
R1
33k⍀
5V
V
= –5V
= +5V
= +25؇C
DD
–80
–90
V
SS
T
A
D1
V
2.5V
OUT
0.3
1
10
100
1k
R2
510k⍀
FREQUENCY – MHz
TPC 10. Off Isolation vs. Frequency
5V
R4
R5
240k⍀ 240k⍀
S1
D1
0
–10
–20
–30
–40
–50
–60
–70
(LSB) IN1
IN2
R6
R7
120k⍀ 120k⍀
S2
S3
S4
D2
R3
510k⍀
R8
120k⍀
D3
D4
IN3
R9
120k⍀
2.5V
(MSB) IN4
R9
120k⍀
GND
–80
V
= +5V
= –5V
DD
GAIN RANGE 2 TO 16
–90
V
SS
T
= 25؇C
A
–100
Figure 1. Photodetector Circuit with Programmable Gain
0.3
1
10
100
1k
FREQUENCY – MHz
TPC 11. Crosstalk vs. Frequency
–8–
REV. 0
ADG611/ADG612/ADG613
Test Circuits
I
DS
V1
I
I
(OFF)
A
I
(OFF)
A
D (ON)
S
D
S
D
S
D
S
D
A
NC
V
V
R
= V1/I
DS
V
V
D
D
S
ON
S
NC = NO CONNECT
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
V
V
SS
DD
0.1F
0.1F
V
ADG611
ADG612
50%
50%
50%
IN
V
V
SS
DD
V
OUT
S
D
V
50%
90%
IN
R
300⍀
C
L
35pF
L
V
S
IN
90%
V
OUT
GND
tOFF
tON
Test Circuit 4. Switching Times
V
V
SS
DD
V
IN
0.1F
0.1F
50%
50%
0V
0V
V
V
DD
SS
90%
90%
V
S1
S2
D1
OUT1
V
V
OUT1
S1
R
C
L
35pF
L1
300⍀
D2
V
V
OUT2
S2
R
C
L2
300⍀
L2
35pF
90%
90%
IN1,
IN2
V
OUT2
V
IN
0V
ADG613
GND
tD
tD
Test Circuit 5. Break-Before-Make Time Delay
V
V
SS
DD
V
V
SS
DD
V
IN ADG611
V
R
S
OUT
S
D
OFF
ON
ADG612
C
1nF
V
L
S
V
IN
IN
V
OUT
⌬V
OUT
GND
Q
= C
؋
⌬V L OUT
INJ
Test Circuit 6. Charge Injection
REV. 0
–9–
ADG611/ADG612/ADG613
V
V
V
V
SS
SS
DD
DD
F
0.1F
0.1F
F
0.1
0.1
NETWORK
ANALYZER
V
V
V
DD
V
DD
SS
SS
50⍀
S
D
D
S
50⍀
IN
50⍀
VIN1
V
S
V
S
D
VIN2
V
OUT
V
IN
R
L
S
50⍀
V
NC
GND
OUT
R
50⍀
L
GND
V
OUT
OFF ISOLATION = 20 LOG
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG |V /V
|
V
S
OUT
S
Test Circuit 7. Off Isolation
Test Circuit 8. Channel-to-Channel Crosstalk
V
V
SS
DD
0.1
F
0.1F
NETWORK
ANALYZER
V
V
SS
DD
S
50⍀
IN
V
S
D
V
OUT
V
IN
R
L
50⍀
GND
V
WITH SWITCH
OUT
INSERTION LOSS = 20 LOG
V
WITHOUT SWITCH
OUT
Test Circuit 9. Bandwidth
–10–
REV. 0
ADG611/ADG612/ADG613
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead TSSOP
(RU-16)
0.201 (5.10)
0.193 (4.90)
16
9
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
8
1
PIN 1
0.0433 (1.10)
MAX
0.006 (0.15)
0.002 (0.05)
8؇
0؇
0.0256 (0.65) 0.0118 (0.30)
0.028 (0.70)
0.020 (0.50)
0.0079 (0.20)
0.0035 (0.090)
SEATING
PLANE
BSC
0.0075 (0.19)
REV. 0
–11–
–12–
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