ADG707BRU [ADI]

CMOS, 2.5ohm Low-Voltage, 8-/16-Channel Multiplexers; CMOS , 2.5ohm低电压, 8 / 16通道多路复用器
ADG707BRU
型号: ADG707BRU
厂家: ADI    ADI
描述:

CMOS, 2.5ohm Low-Voltage, 8-/16-Channel Multiplexers
CMOS , 2.5ohm低电压, 8 / 16通道多路复用器

复用器
文件: 总11页 (文件大小:155K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CMOS, 2.5 Low-Voltage,  
8-/16-Channel Multiplexers  
a
ADG706/ADG707  
FEATURES  
1.8 V to 5.5 V Single Supply  
؎3 V Dual Supply  
FUNCTIONAL BLOCK DIAGRAMS  
ADG706  
ADG707  
2.5 On Resistance  
0.5 On-Resistance Flatness  
100 pA Leakage Currents  
40 ns Switching Times  
Single 16-to-1 Multiplexer ADG706  
Differential 8-to-1 Multiplexer ADG707  
28-Lead TSSOP Package  
Low-Power Consumption  
TTL/CMOS-Compatible Inputs  
S1  
S1A  
S8A  
DA  
DB  
D
S1B  
S8B  
S16  
1-OF-16  
DECODER  
1-OF-8  
DECODER  
APPLICATIONS  
Data Acquisition Systems  
Communication Systems  
Relay Replacement  
A1  
A0  
A2 A3 EN  
A2  
A1 EN  
A0  
Audio and Video Switching  
Battery-Powered Systems  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The ADG706 and ADG707 are low-voltage, CMOS analog  
multiplexers comprising 16 single channels and eight differential  
channels respectively. The ADG706 switches one of 16 inputs  
(S1–S16) to a common output, D, as determined by the 4-bit  
binary address lines A0, A1, A2, and A3. The ADG707 switches  
one of eight differential inputs to a common differential output as  
determined by the 3-bit binary address lines A0, A1, and A2.  
An EN input on both devices is used to enable or disable the  
device. When disabled, all channels are switched OFF.  
1. Single/Dual Supply Operation. The ADG706 and ADG707  
are fully specified and guaranteed with 3 V and 5 V single  
supply and 3 V dual supply rails.  
2. Low On Resistance (2.5 typical).  
3. Low-Power Consumption (<0.01 µW).  
4. Guaranteed Break-Before-Make Switching Action.  
5. Small 28-Lead TSSOP Package.  
Low-power consumption and operating supply range of 1.8 V to  
5.5 V make the ADG706 and ADG707 ideal for battery-powered,  
portable instruments. All channels exhibit break-before-make  
switching action preventing momentary shorting when switch-  
ing channels. These devices are also designed to operate from a  
dual supply of 3 V.  
These multiplexers are designed on an enhanced submicron  
process that provides low-power dissipation yet gives high-  
switching speed, very low on resistance and leakage currents.  
On resistance is in the region of a few ohms and is closely  
matched between switches and very flat over the full signal  
range. These parts can operate equally well as either multiplexers  
or demultiplexers and have an input signal range which extends  
to the supplies.  
The ADG706 and ADG707 are available in small 28-lead TSSOP  
packages.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  
ADG706/ADG707–SPECIFICATIONS1  
(VDD = 5 V ؎ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)  
B Version  
–40؇C  
to +85؇C  
Parameter  
25؇C  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
0 V to VDD  
V
On Resistance (RON  
)
2.5  
4.5  
typ  
max  
typ  
max  
typ  
max  
VS = 0 V to VDD, IDS = 10 mA;  
Test Circuit 1  
VS = 0 V to VDD, IDS = 10 mA  
5
0.3  
0.8  
On Resistance Match Between  
Channels (RON  
)
On-Resistance Flatness (RFLAT(ON)  
)
0.5  
VS = 0 V to VDD, IDS = 10 mA  
1.2  
LEAKAGE CURRENTS  
VDD = 5.5 V  
Source OFF Leakage IS (OFF)  
0.01  
0.1  
0.01  
0.4  
0.1  
0.01  
0.4  
nA typ  
nA max  
nA typ  
nA max  
nA max  
nA typ  
nA max  
nA max  
VD = 4.5 V/1 V, VS = 1 V/4.5 V;  
Test Circuit 2  
VD = 4.5 V/1 V, VS = 1 V/4.5 V;  
Test Circuit 3  
0.3  
Drain OFF Leakage ID (OFF)  
ADG706  
ADG707  
Channel ON Leakage ID, IS (ON)  
ADG706  
ADG707  
1.5  
1
VD = VS = 1 V, or 4.5 V;  
Test Circuit 4  
1.5  
1
0.1  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.4  
0.8  
V min  
V max  
I
INL or IINH  
0.005  
5
µA typ  
µA max  
pF typ  
VIN = VINL or VINH  
0.1  
CIN, Digital Input Capacitance  
DYNAMIC CHARACTERISTICS2  
tTRANSITION  
40  
30  
32  
10  
5
ns typ  
ns max  
ns typ  
ns min  
ns typ  
ns max  
ns typ  
ns max  
pC typ  
RL = 300 , CL = 35 pF, Test Circuit 5;  
60  
1
VS1 = 3 V/0 V, VS16 = 0 V/3 V  
Break-Before-Make Time Delay, tD  
RL = 300 , CL = 35 pF;  
VS = 3 V, Test Circuit 6  
RL = 300 , CL = 35 pF;  
VS = 3 V, Test Circuit 7  
RL = 300 , CL = 35 pF;  
VS = 3 V, Test Circuit 7  
VS = 1 V, RS = 0 , CL = 1 nF;  
Test Circuit 8  
t
t
ON (EN)  
OFF (EN)  
50  
14  
Charge Injection  
Off Isolation  
–60  
–80  
dB typ  
dB typ  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 9  
Channel-to-Channel Crosstalk  
–60  
–80  
dB typ  
dB typ  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 10  
–3 dB Bandwidth  
ADG706  
ADG707  
CS (OFF)  
CD (OFF)  
ADG706  
25  
36  
13  
MHz typ  
MHz typ  
pF typ  
RL = 50 , CL = 5 pF, Test Circuit 9  
RL = 50 , CL = 5 pF, Test Circuit 9  
180  
90  
pF typ  
pF typ  
ADG707  
CD, CS (ON)  
ADG706  
ADG707  
200  
100  
pF typ  
pF typ  
POWER REQUIREMENTS  
IDD  
VDD = 5.5 V  
Digital Inputs = 0 V or 5.5 V  
0.001  
µA typ  
µA max  
1.0  
NOTES  
1Temperature range is as follows: B Version: –40°C to +85°C.  
2Guaranteed by design, not subject to production test.  
Specifications subject to change without notice.  
–2–  
REV. 0  
ADG706/ADG707  
SPECIFICATIONS1  
(VDD = 3 V ؎ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted)  
B Version  
–40؇C  
Parameter  
25؇C  
to +85؇C  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
0 V to VDD  
V
On Resistance (RON  
)
6
11  
typ  
max  
typ  
max  
typ  
VS = 0 V to VDD, IDS = 10 mA;  
Test Circuit 1  
VS = 0 V to VDD, IDS = 10 mA  
12  
0.4  
1.2  
3
On-Resistance Match Between  
Channels (RON  
)
On-Resistance Flatness (RFLAT(ON)  
)
VS = 0 V to VDD, IDS = 10 mA  
LEAKAGE CURRENTS  
VDD = 3.3 V  
Source OFF Leakage IS (OFF)  
0.01  
0.1  
0.01  
0.4  
0.1  
0.01  
0.4  
nA typ  
nA max  
nA typ  
nA max  
nA max  
nA typ  
nA max  
nA max  
VS = 3 V/1 V, VD = 1 V/3 V;  
Test Circuit 2  
VS = 3 V/1 V, VD = 1 V/3 V;  
Test Circuit 3  
0.3  
Drain OFF Leakage ID (OFF)  
ADG706  
ADG707  
Channel ON Leakage ID, IS (ON)  
ADG706  
ADG707  
1.5  
1
VS = VD = 1 V or 3 V;  
Test Circuit 4  
1.5  
1
0.1  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.0  
0.4  
V min  
V max  
IINL or IINH  
0.005  
5
µA typ  
µA max  
pF typ  
VIN = VINL or VINH  
0.1  
CIN, Digital Input Capacitance  
DYNAMIC CHARACTERISTICS2  
tTRANSITION  
45  
30  
40  
20  
5
ns typ  
ns max  
ns typ  
ns min  
ns typ  
ns max  
ns typ  
ns max  
pC typ  
RL = 300 , CL = 35 pF, Test Circuit 5  
75  
1
VS1 = 2 V/0 V, VS16 = 0 V/2 V  
Break-Before-Make Time Delay, tD  
RL = 300 , CL = 35 pF;  
VS = 2 V, Test Circuit 6  
RL = 300 , CL = 35 pF;  
VS = 2 V, Test Circuit 7  
RL = 300 , CL = 35 pF;  
VS = 2 V, Test Circuit 7  
VS = 1 V, RS = 0 , CL = 1 nF;  
Test Circuit 8  
t
t
ON (EN)  
OFF (EN)  
70  
28  
Charge Injection  
Off Isolation  
–60  
–80  
dB typ  
dB typ  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 9  
Channel-to-Channel Crosstalk  
–60  
–80  
dB typ  
dB typ  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 10  
–3 dB Bandwidth  
ADG706  
ADG707  
CS (OFF)  
CD (OFF)  
ADG706  
25  
36  
13  
MHz typ  
MHz typ  
pF typ  
RL = 50 , CL = 5 pF, Test Circuit 9  
RL = 50 , CL = 5 pF, Test Circuit 9  
180  
90  
pF typ  
pF typ  
ADG707  
CD, CS (ON)  
ADG706  
ADG707  
200  
100  
pF typ  
pF typ  
POWER REQUIREMENTS  
IDD  
VDD = 3.3 V  
Digital Inputs = 0 V or 3.3 V  
0.001  
µA typ  
µA max  
1.0  
NOTES  
1Temperature ranges are as follows: B Versions: –40°C to +85°C.  
2Guaranteed by design, not subject to production test.  
Specifications subject to change without notice.  
REV. 0  
–3–  
ADG706/ADG707  
Dual Supply1  
(VDD = +3 V ؎ 10%, VSS = –3 V ؎ 10%, GND = 0 V, unless otherwise noted.)  
B Version  
–40؇C  
to +85؇C  
Parameter  
25؇C  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
V
5
0.3  
0.8  
SS to VDD  
V
On Resistance (RON  
)
2.5  
4.5  
typ  
max  
typ  
max  
typ  
max  
VS = VSS to VDD, IDS = 10 mA;  
Test Circuit 1  
On-Resistance Match Between  
VS = VSS to VDD, IDS = 10 mA  
Channels (RON  
)
On-Resistance Flatness (RFLAT(ON)  
)
0.5  
VS = VSS to VDD, IDS = 10 mA  
1.2  
LEAKAGE CURRENTS  
VDD = +3.3 V, VSS = –3.3 V  
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;  
Test Circuit 2  
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;  
Test Circuit 3  
Source OFF Leakage IS (OFF)  
0.01  
0.1  
0.01  
0.4  
0.1  
0.01  
0.4  
0.1  
nA typ  
nA max  
nA typ  
nA max  
nA max  
nA typ  
nA max  
nA max  
0.3  
Drain OFF Leakage ID (OFF)  
ADG706  
ADG707  
Channel ON Leakage ID, IS (ON)  
ADG706  
ADG707  
1.5  
1
VS = VD = +2.25 V/–1.25 V, Test Circuit 4  
1.5  
1
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.0  
0.4  
V min  
V max  
I
INL or IINH  
0.005  
5
µA typ  
µA max  
pF typ  
VIN = VINL or VINH  
0.1  
CIN, Digital Input Capacitance  
DYNAMIC CHARACTERISTICS2  
tTRANSITION  
40  
15  
32  
16  
8
ns typ  
ns max  
ns typ  
ns min  
ns typ  
ns max  
ns typ  
ns max  
pC typ  
RL = 300 , CL = 35 pF, Test Circuit 5  
60  
1
VS1 = 1.5 V/0 V, VS16 = 0 V/1.5 V  
Break-Before-Make Time Delay, tD  
RL = 300 , CL = 35 pF;  
VS = 1.5 V, Test Circuit 6  
RL = 300 , CL = 35 pF;  
VS = 1.5 V, Test Circuit 7  
RL = 300 , CL = 35 pF;  
VS = 1.5 V, Test Circuit 7  
VS = 0 V, RS = 0 , CL = 1 nF;  
Test Circuit 8  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 9  
RL = 50 , CL = 5 pF, f = 10 MHz;  
RL = 50 , CL = 5 pF, f = 1 MHz;  
Test Circuit 10  
t
t
ON (EN)  
OFF (EN)  
50  
26  
Charge Injection  
Off Isolation  
–60  
–80  
dB typ  
dB typ  
Channel-to-Channel Crosstalk  
–60  
–80  
dB typ  
dB typ  
–3 dB Bandwidth  
ADG706  
25  
36  
13  
MHz typ  
MHz typ  
pF typ  
RL = 50 , CL = 5 pF, Test Circuit 9  
RL = 50 , CL = 5 pF, Test Circuit 9  
ADG707  
CS (OFF)  
CD (OFF)  
ADG706  
180  
90  
pF typ  
pF typ  
ADG707  
CD, CS (ON)  
ADG706  
ADG707  
200  
100  
pF typ  
pF typ  
POWER REQUIREMENTS  
IDD  
0.001  
0.001  
µA typ  
µA max  
µA typ  
µA max  
VDD = +3.3 V  
1.0  
1.0  
Digital Inputs = 0 V or 3.3 V  
VSS = –3.3 V  
ISS  
Digital Inputs = 0 V or 3.3 V  
NOTES  
1Temperature range is as follows: B Version: –40°C to +85°C.  
2Guaranteed by design, not subject to production test.  
Specifications subject to change without notice.  
–4–  
REV. 0  
ADG706/ADG707  
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C  
TSSOP Package  
ABSOLUTE MAXIMUM RATINGS1  
(TA = 25°C unless otherwise noted)  
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 97.9°C/W  
V
DD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V  
θ
JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 14°C/W  
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –3.5 V  
Analog Inputs2 . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V or  
30 mA, Whichever Occurs First  
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . 300°C  
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . . 220°C  
Digital Inputs2 . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or  
30 mA, Whichever Occurs First  
NOTES  
1Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only, functional operation of the  
device at these or any other conditions above those listed in the operational sections  
of this specification is not implied. Exposure to absolute maximum rating condi-  
tionsforextendedperiodsmayaffectdevicereliability. Onlyoneabsolutemaximum  
rating may be applied at any one time.  
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA  
(Pulsed at 1 ms, 10% Duty Cycle max)  
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA  
Operating Temperature Range  
2Overvoltages at IN, S or D will be clamped by internal diodes. Current should be  
limited to the maximum ratings given.  
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the ADG706/ADG707 features proprietary ESD protection circuitry, permanent damage may  
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
ORDERING GUIDE  
Model  
Temperature Range  
Package Description  
Package Option  
ADG706BRU  
ADG707BRU  
–40°C to +85°C  
–40°C to +85°C  
Thin Shrink Small Outline Package (TSSOP)  
Thin Shrink Small Outline Package (TSSOP)  
RU-28  
RU-28  
PIN CONFIGURATIONS  
28-Lead TSSOP  
DA  
V
1
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
D
V
V
DD  
DD  
NC  
NC  
2
3
4
5
6
7
8
9
DB  
NC  
SS  
SS  
S8A  
S7A  
S6A  
S5A  
S4A  
S3A  
S2A  
S1A  
EN  
S8  
S7  
S16  
S15  
S14  
S13  
S12  
S11  
S8B  
S7B  
S6B  
S5B  
S4B  
S3B  
24 S6  
23  
22  
21  
S5  
S4  
S3  
ADG706  
TOP VIEW  
(Not to Scale)  
ADG707  
TOP VIEW  
(Not to Scale)  
20 S2  
S10 10  
19  
18  
S1  
S2B 10  
11  
11  
S9  
EN  
S1B  
A0  
12  
12  
17 A0  
16 A1  
15 A2  
GND  
GND  
A1  
13  
14  
13  
14  
NC  
A3  
NC  
NC  
A2  
NC = NO CONNECT  
NC = NO CONNECT  
REV. 0  
–5–  
ADG706/ADG707  
Table I. ADG706 Truth Table  
Table II. ADG707 Truth Table  
A3  
A2  
A1  
A0  
EN  
ON Switch  
A2  
A1  
A0  
EN  
ON Switch Pair  
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NONE  
1
2
3
4
5
6
7
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE  
1
2
3
4
5
6
7
8
8
9
X = Don’t Care.  
10  
11  
12  
13  
14  
15  
16  
X = Don’t Care.  
TERMINOLOGY  
VDD  
VSS  
Most Positive Power Supply Potential.  
CD (OFF)  
“OFF” Switch Drain Capacitance. Measured  
with reference to ground.  
Most Negative Power Supply in a Dual Sup-  
ply Application. In single supply applications,  
this should be tied to ground at the device.  
CD, CS (ON)  
“ON” Switch Capacitance. Measured with  
reference to ground.  
IDD  
ISS  
Positive Supply Current.  
CIN  
Digital Input Capacitance.  
Negative Supply Current.  
tTRANSITION  
Delay Time Measured Between the 50% and  
90% Points of the Digital Inputs and the Switch  
“ON” Condition when Switching from One  
Address State to Another.  
GND  
S
Ground (0 V) Reference.  
Source Terminal. May be an input or output.  
Drain Terminal. May be an input or output.  
Logic Control Input.  
D
t
t
ON (EN)  
OFF (EN)  
Delay Time Between the 50% and 90% Points  
of the EN Digital Input and the Switch “ON”  
Condition.  
IN  
VD (VS)  
Analog Voltage on Terminals D, S.  
Ohmic Resistance Between D and S.  
Delay Time Between the 50% and 90% Points  
of the EN Digital Input and the Switch “OFF”  
Condition.  
RON  
RON  
On Resistance Match Between any Two Chan-  
nels, i.e., RONmax – RONmin.  
tOPEN  
“OFF” Time Measured Between the 80%  
Points of Both Switches when Switching from  
One Address State to Another.  
RFLAT(ON)  
Flatness is defined as the difference between  
the maximum and minimum value of on  
resistance as measured over the specified analog  
signal range.  
Charge  
Injection  
A Measure of the Glitch Impulse Transferred  
from the Digital Input to the Analog Output  
During Switching.  
IS (OFF)  
D (OFF)  
Source Leakage Current with the Switch  
“OFF.”  
Off Isolation  
Crosstalk  
A Measure of Unwanted Signal Coupling  
through an “OFF” Switch.  
I
Drain Leakage Current with the Switch “OFF.”  
ID, IS (ON)  
Channel Leakage Current with the Switch  
“ON.”  
A Measure of Unwanted Signal which is  
Coupled through from One Channel to  
Another as a Result of Parasitic Capacitance.  
VINL  
VINH  
Maximum Input Voltage for Logic “0.”  
Minimum Input Voltage for Logic “1.”  
Input Current of the Digital Input.  
Bandwidth  
The Frequency at which the Output Is  
Attenuated by 3 dBs.  
I
INL(IINH  
)
On Response  
The Frequency Response of the “ON” Switch.  
CS (OFF)  
“OFF” Switch Source Capacitance. Measured  
with reference to ground.  
Insertion  
Loss  
The Loss Due to the ON Resistance of the  
Switch.  
–6–  
REV. 0  
Typical Performance CharacteristicsADG706/ADG707  
8
7
6
5
4
3
2
8
8
7
6
5
T
V
= 25؇C  
V
V
= 5V  
= 0V  
V
V
= +3.0V  
A
DD  
SS  
DD  
= GND  
7
6
SS  
= 3.0V  
SS  
V
= 2.7V  
DD  
5
4
3
2
1
V
= 3.3V  
V
DD  
4
+25؇C  
= 4.5V  
+25؇C  
DD  
+85؇C  
40؇C  
0
3
2
+85؇C  
40؇C  
V
= 5.5V  
DD  
1
0
1
0
0
3  
V
0
0
1
2
3
4
5
2  
1  
1
2
3
1
2
3
4
5
V
OR V /DRAIN OR SOURCE VOLTAGE V  
OR V /DRAIN OR SOURCE VOLTAGE V  
V
, V , DRAIN OR SOURCE VOLTAGE – V  
D
S
D S  
D
S
Figure 3. On Resistance as a Function  
of VD (VS) for Different Temperatures,  
Single Supply  
Figure 2. On Resistance as a Function  
of VD (VS) for Different Temperatures,  
Dual Supply  
Figure 1. On Resistance as a Function  
of VD (VS) for Single Supply  
0.3  
8
8
T
= 25؇C  
V
V
= 3V  
= 0V  
A
DD  
SS  
V
V
= 5V  
= 0V  
= 25؇C  
DD  
7
6
7
6
5
SS  
I
(OFF)  
D
0.2  
T
A
V
= +2.7V  
DD  
I
, I (ON)  
S
D
+85؇C  
V
= 2.7V  
V
= +3.0V  
SS  
DD  
5
4
3
2
0.1  
0
V
= 3.0V  
SS  
4
40؇C  
3
2
1
I
(OFF)  
S
+25؇C  
0.1  
0.2  
V
= +3.3V  
1
0
DD  
V
= 3.3V  
SS  
0
3  
0
1
2
3
4
5
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
2  
1  
0
1
2
3
V
(V ) Volts  
S
D
V
OR V /DRAIN OR SOURCE VOLTAGE V  
V OR V DRAIN OR SOURCE VOLTAGE V  
D S  
D
S
Figure 4. On Resistance as a Function  
of VD (VS) for Dual Supply  
Figure 6. Leakage Currents as a Func-  
tion of VD (VS)  
Figure 5. On Resistance as a Function  
of VD (VS) for Different Temperatures,  
Single Supply  
0.3  
0.8  
0.3  
V
V
T
= +3V  
V
V
V
V
= 5V  
V
V
V
V
= +3V  
DD  
DD  
DD  
V
V
= 3V  
= 0V  
DD  
I
(OFF)  
0.7  
0.6  
0.5  
D
= 3V  
I
(OFF)  
= GND  
= 3V  
SS  
0.2  
0.1  
D
SS  
SS  
0.2  
0.1  
SS  
= 25؇C  
= 4.5V/1V  
= 1V/4.5V  
= +2.25V/1.25V  
= 1.25V/+2.25V  
A
D
S
D
S
T
= 25؇C  
A
0.4  
0.3  
0.2  
0.1  
0
I
(OFF)  
D
0
0
0.1  
0.2  
0.3  
I
, I (ON)  
S
D
I
, I (ON)  
S
I (OFF)  
S
D
0.1  
0.2  
0.3  
I (OFF)  
S
I
, I (ON)  
S
D
I
(OFF)  
S
0.1  
3  
2  
1  
0
1
2
3
0
1
2
3
4
5
5
15  
25  
35 45  
55  
65 75  
85  
VOLTAGE Volts  
V
(V ) Volts  
S
TEMPERATURE ؇C  
D
Figure 7. Leakage Currents as a Func-  
tion of VD (VS)  
Figure 9. Leakage Currents as a Func-  
tion of Temperature  
Figure 8. Leakage Currents as a Func-  
tion of VD (VS)  
REV. 0  
–7–  
ADG706/ADG707  
10m  
1m  
0
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
T
= 25؇C  
A
V
V
V
V
= 3V  
DD  
= GND  
SS  
2  
4  
6  
8  
ADG706  
ADG707  
= 3V/1V  
= 1V/3V  
D
S
V
= +3.0V  
100␮  
10␮  
DD  
V
= 3.0V  
SS  
V
= +5V  
DD  
I
(OFF)  
1␮  
100n  
10n  
1n  
D
I
(OFF)  
S
V
= +3V  
DD  
0.2  
0.1  
0
I
, I (ON)  
S
D
0.1  
10  
10  
100  
1k  
10k  
100k  
1M  
10M  
10k  
100k  
1M  
10M  
100M  
5
15  
25  
35 45  
55  
65 75  
85  
TEMPERATURE ؇C  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 12. Supply Currents vs. Input  
Switching Frequency  
Figure 11. On Response vs.  
Frequency  
Figure 10. Leakage Currents as a  
Function of Temperature  
20  
10  
0
0
V
V
= +3.0V  
= 3.0V  
DD  
SS  
V
T
= 5V  
= 25؇C  
V
T
= 5V  
= 25؇C  
DD  
DD  
A
A
20  
40  
20  
40  
V
V
= 5V  
= GND  
DD  
SS  
0
60  
80  
60  
80  
10  
20  
30  
40  
V
V
= 3V  
= GND  
DD  
SS  
100  
120  
100  
120  
100k  
1M  
10M  
100M  
30k  
100k  
1M  
10M  
100M  
30k  
3  
2  
1  
0
1
2
3
4
5
VOLTAGE V  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 14. Charge Injection vs.  
Source Voltage  
Figure 15. Crosstalk vs. Frequency  
Figure 13. Off Isolation vs. Frequency  
–8–  
REV. 0  
ADG706/ADG707  
TEST CIRCUITS  
I
DS  
V
V
V
V
SS  
DD  
DD  
V1  
SS  
S1  
S2  
I
OFF  
A
D
D
S
D
V
DD  
S16  
V
S
0.8V  
EN  
V
S
GND  
R
= V /V  
1 DS  
ON  
Test Circuit 1. On Resistance  
Test Circuit 3. ID (OFF)  
V
V
SS  
DD  
V
V
SS  
SS  
DD  
DD  
V
V
SS  
DD  
V
V
I OFF  
S
I
ON  
A
D
S1  
S2  
D
S1  
A
V
D
D
S16  
V
S
S16  
2.4V  
EN  
0.8V  
V
S
GND  
EN  
V
D
GND  
Test Circuit 4. ID (ON)  
Test Circuit 2. IS (OFF)  
V
V
V
V
SS  
DD  
3V  
0V  
SS  
DD  
ADDRESS  
DRIVE (V  
50%  
50%  
)
V
V
S1  
IN  
S1  
A3  
A2  
A1  
A0  
D
S1 THRU S15  
V
50  
IN  
ADG706*  
S16  
D
S16  
V
S1  
90%  
V
OUT  
V
OUT  
R
C
L
2.4V  
EN  
L
90%  
GND  
300⍀  
35pF  
V
S16  
tTRANSITION  
tTRANSITION  
*SIMILAR CONNECTION FOR ADG707  
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION  
V
V
V
V
DD  
SS  
SS  
DD  
3V  
V
S1  
S
A3  
A2  
A1  
A0  
ADDRESS  
DRIVE (V  
D
)
S1 THRU S15  
V
50  
IN  
IN  
0V  
V
ADG706*  
S16  
D
V
S
OUT  
R
300⍀  
C
L
35pF  
2.4V  
EN  
L
80%  
80%  
V
GND  
OUT  
tOPEN  
*SIMILAR CONNECTION FOR ADG707  
Test Circuit 6. Break-Before-Make Delay, tOPEN  
REV. 0  
–9–  
ADG706/ADG707  
V
V
V
V
SS  
DD  
3V  
0V  
SS  
DD  
ENABLE  
DRIVE (V  
50%  
50%  
)
IN  
V
S1  
S2 THRU S16  
S
A3  
A2  
A1  
A0  
EN  
tOFF(EN)  
0.9V  
ADG706*  
V
O
0.9V  
O
O
OUTPUT  
D
V
OUT  
R
300⍀  
C
L
35pF  
L
V
0V  
GND  
IN  
50⍀  
tON(EN)  
*SIMILAR CONNECTION FOR ADG707  
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)  
V
V
V
SS  
DD  
V
SS  
DD  
A3  
A2  
A1  
3V  
LOGIC  
INPUT (V  
)
ADG706*  
IN  
0V  
A0  
S
D
V
OUT  
R
S
C
1nF  
V
L
OUT  
V  
OUT  
EN  
V
Q
= C 
؋
 V  
S
INJ  
L
OUT  
V
GND  
IN  
*SIMILAR CONNECTION FOR ADG707  
Test Circuit 8. Charge Injection  
V
V
DD  
DD  
V
V
DD  
A3  
A2  
A1  
A0  
S1  
DD  
2.4V  
S1  
EN  
A3  
A2  
S16  
V
S
ADG706*  
ADG706*  
A1  
50  
D
A0  
V
OUT  
D
V
R
L
EN**  
OUT  
S2  
R
50⍀  
50⍀  
L
V
GND  
SS  
S16  
V
S
V
SS  
V
GND  
SS  
*SIMILAR CONNECTION FOR ADG707  
**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS  
OFF ISOLATION = 20LOG (V /V )  
V
SS  
10 OUT  
S
*SIMILAR CONNECTION FOR ADG707  
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG (V  
OFF ISOLATION = 20LOG  
V
WITH SWITCH  
10  
OUT  
/V )  
S
(
V
)
10 OUT  
WITHOUT SWITCH  
OUT  
Test Circuit 10. Channel-to-Channel Crosstalk  
Test Circuit 9. OFF Isolation and Bandwidth  
–10–  
REV. 0  
ADG706/ADG707  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
28-Lead TSSOP  
(RU-28)  
0.386 (9.80)  
0.378 (9.60)  
28  
15  
0.177 (4.50)  
0.169 (4.30)  
0.256 (6.50)  
0.246 (6.25)  
1
14  
PIN 1  
0.006 (0.15)  
0.002 (0.05)  
0.0433 (1.10)  
MAX  
8؇  
0؇  
0.0256 (0.65) 0.0118 (0.30)  
0.028 (0.70)  
0.020 (0.50)  
SEATING  
PLANE  
0.0079 (0.20)  
0.0035 (0.090)  
BSC  
0.0075 (0.19)  
REV. 0  
–11–  

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