ADG712BRU [ADI]
CMOS Low Voltage 4 ohm Quad SPST Switches; CMOS低压4欧姆四通道SPST开关型号: | ADG712BRU |
厂家: | ADI |
描述: | CMOS Low Voltage 4 ohm Quad SPST Switches |
文件: | 总8页 (文件大小:122K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CMOS
a
Low Voltage 4 ⍀ Quad SPST Switches
ADG711/ADG712/ADG713
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
+1.8 V to +5.5 V Single Supply
Low On Resistance (2.5 ⍀ Typ)
Low On-Resistance Flatness
–3 dB Bandwidth > 200 MHz
Rail-to-Rail Operation
16-Lead TSSOP and SOIC Packages
Fast Switching Times
tON 16 ns
S1
S1
S1
IN1
IN2
IN3
IN4
IN1
IN2
IN3
IN4
IN1
IN2
IN3
IN4
D1
S2
D1
S2
D1
S2
D2
S3
D2
S3
D2
S3
ADG711
ADG712
ADG713
tOFF 10 ns
D3
S4
D3
S4
D3
S4
Typical Power Consumption (< 0.01 W)
TTL/CMOS Compatible
D4
D4
D4
APPLICATIONS
SWITCHES SHOWN FOR A LOGIC "1" INPUT
Battery Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG711, ADG712 and ADG713 are monolithic CMOS
devices containing four independently selectable switches. These
switches are designed on an advanced submicron process that
provides low power dissipation yet gives high switching speed,
low on resistance, low leakage currents and high bandwidth.
1. +1.8 V to +5.5 V Single Supply Operation. The ADG711,
ADG712 and ADG713 offer high performance and are
fully specified and guaranteed with +3 V and +5 V supply
rails.
2. Very Low RON (4.5 Ω max at +5 V, 8 Ω max at +3 V). At
supply voltage of +1.8 V, RON is typically 35 Ω over the
temperature range.
They are designed to operate from a single +1.8 V to +5.5 V
supply, making them ideal for use in battery powered instru-
ments and with the new generation of DACs and ADCs from
Analog Devices. Fast switching times and high bandwidth
make the part suitable for video signal switching.
3. Low On-Resistance Flatness.
4. –3 dB Bandwidth >200 MHz.
5. Low Power Dissipation.
The ADG711, ADG712 and ADG713 contain four independent
single-pole/single throw (SPST) switches. The ADG711 and
ADG712 differ only in that the digital control logic is inverted.
The ADG711 switches are turned on with a logic low on the
appropriate control input, while a logic high is required to turn
on the switches of the ADG712. The ADG713 contains two
switches whose digital control logic is similar to the ADG711,
while the logic is inverted on the other two switches.
CMOS construction ensures low power dissipation.
6. Fast tON/tOFF.
7. Break-Before-Make Switching.
This prevents channel shorting when the switches are con-
figured as a multiplexer (ADG713 only).
8. 16-Lead TSSOP and 16-Lead SOIC Packages.
Each switch conducts equally well in both directions when ON.
The ADG713 exhibits break-before-make switching action.
The ADG711/ADG712/ADG713 are available in 16-lead TSSOP
and 16-lead SOIC packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1998
(VDD = +5 V ؎ 10%, GND = 0 V. All specifications
–40؇C to +85؇C unless otherwise noted.)
ADG711/ADG712/ADG713–SPECIFICATIONS1
B Version
–40؇C to
+85؇C
Parameter
+25؇C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
V
On-Resistance (RON
)
2.5
4
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
4.5
0.05
0.3
On-Resistance Match Between
Channels (∆RON
)
On-Resistance Flatness (RFLAT(ON)
)
0.5
VS = 0 V to VDD, IS = –10 mA
1.0
LEAKAGE CURRENTS
VDD = +5.5 V;
Source OFF Leakage IS (OFF)
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = VD = 1 V, or 4.5 V;
Test Circuit 3
±0.2
±0.2
±0.2
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
µA typ
VIN = VINL or VINH
±0.1
µA max
DYNAMIC CHARACTERISTICS2
tON
11
6
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 300 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
16
10
1
tOFF
Break-Before-Make Time Delay, tD
(ADG713 Only)
Charge Injection
6
VS1 = VS2 = 3 V; Test Circuit 5
3
VS = 2 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
Off Isolation
–58
–78
dB typ
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk
–90
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
Test Circuit 8
Bandwidth –3 dB
CS (OFF)
CD (OFF)
200
10
10
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 5 pF; Test Circuit 9
CD, CS (ON)
22
POWER REQUIREMENTS
IDD
VDD = +5.5 V
Digital Inputs = 0 V or 5 V
0.001
µA typ
1.0
µA max
NOTES
1Temperature ranges are as follows: B Version: –40°C to +85°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
ADG711/ADG712/ADG713
(VDD = +3 V ؎ 10%, GND = 0 V. All specifications –40؇C to +85؇C unless otherwise noted.)
SPECIFICATIONS1
B Version
–40؇C to
Parameter
+25؇C
+85؇C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
5.5
8
V
On-Resistance (RON
)
5
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
On-Resistance Match Between
Channels (∆RON
0.1
)
0.3
2.5
On-Resistance Flatness (RFLAT(ON)
)
VS = 0 V to VDD, IS = –10 mA
LEAKAGE CURRENTS
VDD = +3.3 V;
Source OFF Leakage IS (OFF)
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = VD = 1 V, or 3 V;
Test Circuit 3
±0.2
±0.2
±0.2
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.0
0.4
V min
V max
IINL or IINH
0.005
µA typ
VIN = VINL or VINH
±0.1
µA max
DYNAMIC CHARACTERISTICS2
tON
13
7
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 300 Ω, CL = 35 pF,
VS = 2 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS = 2 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
20
12
1
tOFF
Break-Before-Make Time Delay, tD
(ADG713 Only)
Charge Injection
7
VS1 = VS2 = 2 V; Test Circuit 5
3
VS = 1.5 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
Off Isolation
–58
–78
dB typ
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk
–90
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
Test Circuit 8
Bandwidth –3 dB
CS (OFF)
200
10
10
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 5 pF; Test Circuit 9
C
D (OFF)
CD, CS (ON)
22
POWER REQUIREMENTS
IDD
V
DD = +3.3 V
0.001
µA typ
Digital Inputs = 0 V or 3 V
1.0
µA max
NOTES
1Temperature ranges are as follows: B Version: –40°C to +85°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–3–
ADG711/ADG712/ADG713
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted)
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 520 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 125°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 42°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
Analog, Digital Inputs2 . . . . . . . . . . . –0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 430 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 150°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 27°C/W
2Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG711/ADG712/ADG713 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG711BR
ADG712BR
ADG713BR
ADG711BRU
ADG712BRU
ADG713BRU
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0.15" Small Outline (SOIC)
0.15" Small Outline (SOIC)
0.15" Small Outline (SOIC)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
R-16A
R-16A
R-16A
RU-16
RU-16
RU-16
Table I. Truth Table (ADG711/ADG712)
ADG711 In ADG712 In Switch Condition
PIN CONFIGURATION
(TSSOP/SOIC)
0
1
1
0
ON
OFF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
IN2
D2
S2
S1
ADG711
ADG712
ADG713
Table II. Truth Table (ADG713)
NC
GND
S4
V
DD
NC
S3
TOP VIEW
(Not to Scale)
Logic
Switch 1, 4
Switch 2, 3
0
1
OFF
ON
ON
OFF
D4
D3
IN3
IN4
NC = NO CONNECT
–4–
REV. 0
ADG711/ADG712/ADG713
TERMINOLOGY
VDD
Most positive power supply potential.
tOFF
Delay between applying the digital control
input and the output switching off.
“OFF” time or “ON” time measured
between the 90% points of both switches,
when switching from one address state to
another. (ADG713 only).
A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
The frequency at which the output is attenu-
ated by 3 dB.
GND
S
D
IN
RON
∆RON
Ground (0 V) reference.
tD
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
On resistance match between any two chan-
nels i.e., RONmax–RONmin.
Flatness is defined as the difference between
the maximum and minimum value of on-
resistance as measured over the specified
analog signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D, S.
Crosstalk
RFLAT(ON)
Off Isolation
Charge
Injection
IS (OFF)
D (OFF)
I
Bandwidth
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
On Response
On Loss
The frequency response of the “ON” switch.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on.
The voltage drop across the “ON” switch,
seen on the On Response vs. Frequency plot
as how many dBs the signal is away from
0 dB at very low frequencies.
Typical Performance Characteristics
6
5.5
5
6
V
= +3V
5.5
5
DD
T
= +25؇C
A
+85؇C
V
= +2.7V
DD
4.5
4
4.5
4
+25؇C
3.5
3
3.5
3
V
= +4.5V
DD
V
= +3V
DD
2.5
2
2.5
2
–40؇C
V
= +5V
DD
1.5
1
1.5
1
0.5
0.5
0
0
0
0.5
1
1.5
2
2.5
3
0
0.5
V
1
1.5
2
2.5
3
3.5
4
4.5
5
V
OR V – DRAIN OR SOURCE VOLTAGE – Volts
S
OR V – DRAIN OR SOURCE VOLTAGE – Volts
D
D
S
Figure 1. On Resistance as a Function of VD (VS)
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 3 V
REV. 0
–5–
ADG711/ADG712/ADG713–Typical Performance Characteristics
–30
6
5.5
5
V
= +5V
–40
DD
V
= +5V, +3V
DD
–50
4.5
4
–60
+85؇C
–70
3.5
3
+25؇C
–80
2.5
2
–90
–100
–110
–120
–130
1.5
1
–40؇C
0.5
0
10k
100k
1M
FREQUENCY – Hz
10M
100M
0
0.5
V
1
1.5
2
2.5
3
3.5
4
4.5
5
OR V – DRAIN OR SOURCE VOLTAGE – Volts
D
S
Figure 6. Crosstalk vs. Frequency
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 5 V
10m
0
–2
–4
–6
V
= +5V
DD
1m
V
= +5V
DD
100
4 SW
10
1
1 SW
100n
10n
1n
100
1k
10k
100k
1M
10M
10k
100k
1M
10M
100M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 4. Supply Current vs. Input Switching Frequency
Figure 7. On Response vs. Frequency
25
–30
–40
T
= +25؇C
A
20
15
10
5
V
= +5V, +3V
DD
–50
–60
–70
V
= +5V
DD
V
= +3V
DD
–80
–90
–100
–110
–120
–130
0
–5
–10
10k
100k
1M
FREQUENCY – Hz
10M
100M
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
SOURCE VOLTAGE – Volts
Figure 5. Off Isolation vs. Frequency
Figure 8. Charge Injection vs. Source Voltage
–6–
REV. 0
ADG711/ADG712/ADG713
APPLICATIONS
Figure 9 illustrates a photodetector circuit with programmable
gain. An AD820 is used as the output operational amplifier.
With the resistor values shown in the circuit, and using different
combinations of the switches, gain in the range of 2 to 16 can be
achieved.
C1
R1
33k⍀
+5V
AD820
D1
V
+2.5V
OUT
R2
510k⍀
+5V
R4
R5
240k⍀ 240k⍀
S1
D1
D2
D3
D4
R3
510k⍀
(LSB) IN1
R6
R7
120k⍀ 120k⍀
S2
S3
S4
IN2
IN3
R8
120k⍀
R9
120k⍀
+2.5V
R10
(MSB) IN4
120k⍀
GND
GAIN RANGE 2 TO 16
Figure 9. Photodetector Circuit with Programmable Gain
Test Circuits
I
DS
V1
I
(ON)
A
I
(OFF)
A
I
(OFF)
A
D
S
D
S
D
S
D
S
R
D
V
V
D
V
V
V
D
S
S
S
= V1/I
ON
DS
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
Test Circuit 1. On Resistance
V
DD
0.1F
V
50%
50%
50%
ADG711
ADG712
IN
V
DD
V
IN
50%
90%
D
S
V
OUT
R
300⍀
V
C
35pF
IN
L
S
L
V
S
90%
V
OUT
GND
tON
tOFF
Test Circuit 4. Switching Times
V
DD
V
0.1F
IN
50%
50%
0V
V
DD
90%
90%
V
S1
S2
D1
D2
OUT1
V
V
0V
0V
S1
OUT1
C
R
L1
35pF
L1
300⍀
V
V
OUT2
S2
C
R
300⍀
IN1, IN2
L2
35pF
L2
90%
90%
V
OUT2
V
ADG713
GND
IN
tD
tD
Test Circuit 5. Break-Before-Make Time Delay, tD
–7–
REV. 0
ADG711/ADG712/ADG713
V
SW ON
SW OFF
DD
V
V
IN
DD
R
S
D
S
V
OUT
C
1nF
V
L
IN
S
V
OUT
V
OUT
GND
Q
= C
؋
V L OUT
INJ
Test Circuit 6. Charge Injection
V
DD
0.1F
V
DD
0.1F
V
DD
S
D
V
DD
V
OUT
S
D
R
50⍀
L
V
OUT
IN
R
L
V
IN
V
S
50⍀
IN
GND
V
IN
V
S
GND
Test Circuit 7. Off Isolation
Test Circuit 9. Bandwidth
V
DD
0.1F
V
DD
50⍀
S
S
D
D
V
IN1
V
S
V
IN2
V
NC
OUT
R
50⍀
L
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20
؋
LOG |
V
/V
|
S
OUT
Test Circuit 8. Channel-to-Channel Crosstalk
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Narrow Body SOIC
(R-16A)
16-Lead TSSOP
(RU-16)
0.3937 (10.00)
0.3859 (9.80)
0.201 (5.10)
0.193 (4.90)
9
16
1
16
9
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
8
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0196 (0.50)
0.0099 (0.25)
؋
45؇ 1
0.0098 (0.25)
0.0040 (0.10)
8
0.006 (0.15)
0.002 (0.05)
8؇
0؇
PIN 1
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0433
(1.10)
MAX
SEATING
PLANE
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
0.028 (0.70)
0.020 (0.50)
8؇
0؇
0.0256 0.0118 (0.30)
SEATING
PLANE
0.0079 (0.20)
0.0035 (0.090)
(0.65)
0.0075 (0.19)
BSC
–8–
REV. 0
相关型号:
ADG713BR-REEL7
IC QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO16, MS-012AC, SOIC-16, Multiplexer or Switch
ADI
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