ADL5513-ACPZ-R2 [ADI]
1 MHz to 4 GHz, 80 dB Logarithmic Detector/Controller; 1 MHz至4 GHz的， 80分贝对数检测器/控制器
| 型号： | ADL5513-ACPZ-R2 |
| 厂家： | 
ADI |
| 描述： | 1 MHz to 4 GHz, 80 dB Logarithmic Detector/Controller |
| 文件： | 总12页 (文件大小：1570K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1 MHz to 4 GHz, 80 dB
Logarithmic Detector/Controller
Preliminary Technical Data
ADL5513
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Wide bandwidth: 1 MHz to 4 GHz
80 dB dynamic range ( 3 dBꢀ
15
14
16
13
Stability over temperature: < 0.5 dB
Low noise measurement/controller output (VOUTꢀ
Pulse response time: 10 ns
Small footprint package: 3 mm x 3 mm LFCSP
Supply operation: 2.7 to 5.5 V at 30 mA
Fabricated using high speed SiGe process
DET
DET
DET
Σ
DET
DET
I
V
12
11
VOUT
VSET
1
VPOS
2
3
INHI
I
V
INLO
ADL5513
10 COMM
APPLICATIONS
RF transmitter PA setpoint control and level monitoring
Power monitoring in radiolink transmitters
RSSI measurement in base stations, WLAN, WiMAX, radar
4
VPOS
BAND GAP
REFERENCE
SLOPE
CONTROL
GAIN
BIAS
9
TADJ
8
5
6
7
Figure 1.
GENERAL DESCRIPTION
pin. Because the output can be used for controller applications,
special attention has been paid to minimize wideband noise. In
this mode, the setpoint control voltage is applied to the VSET
pin.
The ADL5513 is a demodulating logarithmic amplifier, capable
of accurately converting an RF input signal to a corresponding
decibel-scaled output. It employs the progressive compression
technique over a cascaded amplifier chain, each stage of which
is equipped with a detector cell. The device can be used in
either measurement or controller modes. The ADL5513
maintains accurate log conformance for signals greater than 4
GHz. The input dynamic range is typically 80 dB (re: 50 Ω)
with error less than 3 dB. The ADL5513 has 10 ns response
time which enables RF burst detection to a pulse rate of beyond
50 MHz. The device provides unprecedented logarithmic
intercept stability vs. ambient temperature conditions. A supply
of 2.7 V to 5.5 V is required to power the device. Current
consumption is less than 30 mA, and decreases to TBD μA
when the device is disabled.
The feedback loop through an RF amplifier is closed via VOUT,
the output of which regulates the amplifier’s output to a
magnitude corresponding to VSET. The ADL5513 provides 0 V
to (VPOS − 0.1 V) output capability at the VOUT pin, suitable for
controller applications. As a measurement device, VOUT is
externally connected to VSET to produce an output voltage
VOUT that increases linear-in-dB with RF input signal amplitude.
The logarithmic slope is 20 mV/dB, determined by the VSET
interface. The intercept is -95 dBm (re: 50 Ω, CW input, 900
MHz) using the INHI input. These parameters are very stable
against supply and temperature variations.
The ADL5513 can be configured to provide a control voltage to
a power amplifier or a measurement output from the VOUT
Rev. PrA 6/08
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADL5513
Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Evaluation Board Configuration Options................................... 10
Outline Dimensions....................................................................... 12
Ordering Guide............................................................................... 12
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
REVISION HISTORY
Rev. PrA | Page 2 of 12
Preliminary Technical Data
SPECIFICATIONS
ADL5513
VS = 5 V, T = 25°C, ZO = 50 ꢀ, Pins INHI, INLO, ac-coupled , Single-ended drive, VOUT tied to VSET, Error referred to best-fit line (linear
regression), unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max Unit
OVERALL FUNCTION
Maximum Input Frequency
100 MHz
0.001
4
GHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.578
0.589
75
67
58
V
V
dB
dB
dB
9
-66
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.421
dB
dB
dB
dB
dB
dB
0.467
0.496
0.63
0.696
0.0.556
Logarithmic Slope
Logarithmic Intercept
Input Impedance
21
-88.18
1500/TBD
mV/dB
dBm
Ω/pF
900 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.59
0.59
78
71
68
V
V
dB
dB
dB
8
-68
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.45
0.40
0.515
0.525
0.62
dB
dB
dB
dB
dB
dB
0.67
Logarithmic Slope
Logarithmic Intercept
Input Impedance
21
mV/dB
dBm
Ω/pF
-89.07
1500/TBD
Rev. PrA | Page 3 of 12
ADL5513
Preliminary Technical Data
Parameter
Conditions
Min
Typ
Max Unit
1900 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.61
0.6
78
71
68
V
V
dB
dB
dB
7
-64
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.46
0.515
0.66
0.41
0.73
dB
dB
dB
dB
dB
dB
0.785
Logarithmic Slope
21
mV/dB
Logarithmic Intercept
Input Impedance
-89.87
1500/TBD
dBm
Ω/pF
2140 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.61
0.61
78
70
66
V
V
dB
dB
dB
7
-63
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.43
0.497
0.598
0.635
0.727
0.676
21
dB
dB
dB
dB
dB
dB
mV/dB
dBm
Ω/pF
Logarithmic Slope
Logarithmic Intercept
Input Impedance
-90.01
1500/TBD
2600 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.62
0.61
80
74
72
V
V
dB
dB
dB
7
-60
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.47
0.605
0.715
0.575
0.8
0.853
21
-90.56
1500/TBD
dB
dB
dB
dB
dB
dB
mV/dB
dBm
Ω/pF
Logarithmic Slope
Logarithmic Intercept
Input Impedance
Rev. PrA | Page 4 of 12
Preliminary Technical Data
ADL5513
Parameter
Conditions
Min
Typ
Max Unit
3.6 GHz
Output Voltage: High Power in
Output Voltage: Low Power in
3.0 dB Dynamic Range
1.0 dB Dynamic Range
0.5 dB Dynamic Range
Maximum Input Level, 1.0 dB
Minimum Input Level, 1.0 dB
Deviation vs. Temperature
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
1.6
0.6
78
71
66
5
V
V
dB
dB
dB
-66
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
0.64
0.64
0.62
0.856
0.926
0.937
dB
dB
dB
dB
dB
dB
Logarithmic Slope
Logarithmic Intercept
Input Impedance
SETPOINT INPUT
Voltage Range
21
-90.57
TBD
mV/dB
dBm
Ω/pF
Pin VSET
Log conformance error ≤1 dB Min
Log conformance error ≤1 dB Max
1% change
TBD
TBD
TBD
V
Current Limit Source/Sink
OUTPUT INTERFACE
Rise Time
mA
Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF
Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF
Pin VPOS
10
20
nS
nS
Fall Time
POWER SUPPLY INTERFACE
Supply Voltage
2.7
5
5.5
V
Quiescent Current
Supply Current
25C RF in =-55 dBm
When disabled
30
TBD
mA
μA
POWER-DOWN INTERFACE
Logic Level Threshold
Enable Time
Pin PWDN
Logic LO enables Logic HI disables
PWDN LO to OUT at 100% final value,
CLPF = 10pF, RF in = −10 dBm
VPOS − 0.7 V
143
V
ns
Disable Time
PWDN HI to OUT at 10% final value,
CLPF = 10pF, RF in = −10 dBm
100
ns
Rev. PrA | Page 5 of 12
ADL5513
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Supply Voltage: VPOS
VSET Voltage
5.5V
0 V to VPOS
TBD dBm
TBD W
TBD°C/W
TBD°C
−40°C to +125°C
−65°C to +150°C
260°C
Input Power (Single-Ended, Re: 50 Ω)
Internal Power Dissipation
θJA
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrA | Page 6 of 12
Preliminary Technical Data
ADL5513
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
12 VOUT
1
2
3
VPOS
INHI
11 VSET
ADL5513
TOP VIEW
INLO
10 COMM
(Not to Scale)
VPOS 4
9
TADJ
Figure 2.
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 4
2
VPOS
INHI
Positive supply Voltage (VPOS), 2.7 V to 5.5 V
RF input. AC –coupled RF input.
3
10
9
INLO
COMM
TADJ
RF common for INHI. AC- coupled RF common.
Device Common.
Temperature Compensation Adjustment. Frequency Dependant Temperature Compensation is set by
connecting a ground referenced resistor to this pin.
11
12
VSET
VOUT
NC
Setpoint Input for Operation in Controller Mode. To operate in RSSI mode short VSET to VOUT.
Logarithmic/ Error Output.
No Connect. These pins may be left open or soldered to a low impedance ground plane.
5, 6, 7, 8, 13,
15, 16
14
CLPF
Loop Filter Capacitor. In measurement mode, this capacitor sets the pulse response time and video
bandwidth.
In controller mode, the capacitance on this node sets the response time of the error amplifier/integrator.
Exposed
Paddle
Internally connected to COMM; solder to a low impedance ground plane.
Rev. PrA | Page 7 of 12
ADL5513
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5 V; TA = +25°C, −40°C, +85°C; +125°C, unless otherwise noted. Black: +25°C, Blue: −40°C; Red: +85°C, Orange: +125°C. Error is
calculated by using the best-fit line between PIN = −40 dBm and PIN = −10 dBm at the specified input frequency, unless otherwise noted.
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Figure 3 VOUT and Log Conformance vs. Input Amplitude at 100 MHz,
Multiple Devices, VTADJ = 1.0 V
Figure 6 VOUT and Log Conformance vs. Input Amplitude at 100 MHz,
VTADJ = 1.0 V
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Figure 4 VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
Multiple Devices, VTADJ = 0.975 V
Figure 7 VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
VTADJ = 0.975 V
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Figure 5 VOUT and Log Conformance vs. Input Amplitude at 1900 MHz,
Multiple Devices, VTADJ = 0.925 V
Figure 8. VOUT and Log Conformance vs. Input Amplitude at 1900 MHz,
TADJ = 0.925 V
V
Rev. PrA | Page 8 of 12
Preliminary Technical Data
ADL5513
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.8
0.6
0.4
0.2
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Pin (dBm)
Figure 9. VOUT and Log Conformance vs. Input Amplitude at 2140 MHz,
Multiple Devices, VTADJ = 0.925 V
Figure 12. VOUT and Log Conformance vs. Input Amplitude at 2140 MHz,
TADJ = 0.925 V
V
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Figure 10. VOUT and Log Conformance vs. Input Amplitude at 2600 MHz,
Multiple Devices, VTADJ = 0.9 V
Figure 13. VOUT and Log Conformance vs. Input Amplitude at 2600 MHz,
VTADJ = 0.9 V
2.6
2.4
2.2
2
3.0
2.6
2.4
2.2
2
3.0
2.5
2.5
2.0
2.0
1.5
1.5
1.8
1.6
1.4
1.2
1
1.0
1.8
1.6
1.4
1.2
1
1.0
0.5
0.5
0.0
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
-70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
Pin (dBm)
0
5
10
Figure 11. VOUT and Log Conformance vs. Input Amplitude at 3600 MHz,
Multiple Devices, VTADJ = 0.9 V
Figure 14. VOUT and Log Conformance vs. Input Amplitude at 3600 MHz,
VTADJ = 0.9 V
Rev. PrA | Page 9 of 12
ADL5513
Preliminary Technical Data
EVALUATION BOARD CONFIGURATION OPTIONS
Table 4. Evaluation Board Configuration Options
Component
Function
Default Value
C1, C2, R1
Input Interface.
R1 = 52.3 Ω (Size 0402)
The 52.3 Ω resistor in Position R1 combines with the internal input impedance of the
ADL5513 to give a broadband input impedance of about 50 Ω. C1 and C2 are dc-
blocking capacitors. A reactive impedance match can be implemented by replacing
R1 with an inductor and C1 and C2 with appropriately valued capacitors.
C1 = 47 nF (Size 0402)
C2 = 47 nF (Size 0402)
C3, C4, C5, C6,
R11, R12
Power Supply Decoupling
The nominal supply decoupling consists of a 100 pF filter capacitor placed physically
close to the ADL5513 and a 0.1 ꢀF capacitor placed nearer to the power supply input
C3 = 0.1 ꢀF (Size 0402)
C4 = 100 pF (Size 0402)
C5 = 100 pF (Size 0402)
pin. If additional isolation from the power supply is required, a small resistance maybe C6 = 0.1 ꢀF (Size 0402)
installed in between the power supply and the ADL5513. (R11, R12)
R11 = 0 Ω (Size 0402)
R12 = 0 Ω (Size 0402)
C7
Filter Capacitor
C7= 1000 pF (Size 0402)
The low-pass corner frequency of the circuit that drives the VOUT pin can be lowered
by placing a capacitor between CLPF and ground. Increasing this capacitor increases
the overall rise/fall time of the ADL5513 for pulsed input signals.
R2, R3 R4, R5, R10,
RL, CL
Output Interface—Measurement Mode.
In measurement mode, a portion of the output voltage is fed back to the VSET pin via R4.
The magnitude of the slope of the VOUT output voltage response can be increased by R4 = 0 Ω (Size 0402)
R2 = open (Size 0402)
R3 = 1 kΩ (Size 0402)
reducing the portion of VOUT that is fed back to VSET. R3 can be used as a back-
terminating resistor or as part of a single-pole, low-pass filter.
R5 = open (Size 0402)
R10 = open (Size 0402)
RL = CL = open (Size 0402)
R4, R5, R10
Output Interface—Controller Mode.
R4 = open (Size 0402)
R5 = open (Size 0402)
R10 = 0 Ω (Size 0402)
In this mode, R4 must be open. In controller mode, the ADL5513 can control the gain of
an external component. A setpoint voltage is applied to Pin VSET, the value of which
corresponds to the desired RF input signal level applied to the ADL5513 RF input. A
sample of the RF output signal from this variable gain component is selected, typically
via a directional coupler, and applied to ADL5513 RF input. The voltage at the VOUT
pin is applied to the gain control of the variable gain element. A control voltage is
applied to the VSET pin. The magnitude of the control voltage can optionally be
attenuated via the voltage divider comprising R4 and R5, or a capacitor can be
installed in Position R5 to form a low-pass filter along with R4.
R6, R7, R8, R9
VPOS, GND
Temperature Compensation Interface.
A voltage source can be used to optimize the temperature performance for various
input frequencies. The pads for R8/R9 can be used for a voltage divider from the VPOS R8 = open (Size 0402)
node to set the TADJ voltage at different frequencies. The ADL5513 may be disabled by
by applying a voltage of VPOS −0.7 V to this node.
R6 = open (Size 0402)
R7= 0 Ω (Size 0402)
R9 = open Ω (Size 0402)
Supply and Ground Connections
Not Applicable
Rev. PrA | Page 10 of 12
Preliminary Technical Data
ADL5513
VPOS
GND
VPOS
C3
0.1 uF
VOUT_ALT
R11
0 ohms
C7
1000 pF
R2
open
C4
R3
1 k
100 pF
VOUT
C1
VPOS
VOUT
47nF
RFIN
1
12
11
R4
CL
RL
open
VSET
ADL5513
2INHI
0 ohms
open
3 INLO
4
COMM`
10
9
R1
52.3 ohms
TADJ
VPOS
R10
R5
0 ohms
C2
47nF
open
VSET
VPOS
Z1
TADJ
R6
open
R8
open
C5
100 pF
R12
TADJ
0 ohms
R9
open
R7
0 ohms
C6
0.1 uF
EXT_ PWDN - TADJ
VPOS
Figure 15. Evaluation Board Schematic
Figure 17. Component Side Silkscreen
Figure 16.Component Side Layout
Rev. PrA | Page 11 of 12
ADL5513
Preliminary Technical Data
OUTLINE DIMENSIONS
a
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ ]
3 x 3 mm Body, Very Thin Quad
(CP-16-3)
Dimensions shown in millimeters
0.50
0.40
0.30
3.00
BSC SQ
0.60 MAX
PIN 1
INDICATOR
*
1.65
13
12
16
0.45
1
4
1.50 SQ
1.35
PIN 1
INDICATOR
2.75
BSC SQ
TOP
VIEW
EXPOSED
PAD
9 (BOTTOM VIEW)
8
5
0.50
BSC
0.25 MIN
1.50 REF
0.80 MAX
12° MAX
0.65 TYP
0.90
0.85
0.80
0.05 MAX
0.02 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
*
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 18. -Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-16-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
16-Lead LFCSP_VQ, Reel
16-Lead LFCSP_VQ, Reel
16-Lead LFCSP_VQ, Waffle Pack
Evaluation Board
Package Option
CP-16-3
CP-16-3
Branding
TBD
TBD
ADL5513-ACPZ-R71
ADL5513-ACPZ-R21
ADL5513-ACPZ-WP12
ADL5513-EVALZ1
CP-16-3
TBD
1 Z = RoHS Compliant Part.
2
WP = waffle pack
© 2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR07514-0-6/08(PrA)
Rev. PrA | Page 12 of 12
相关型号：
©2020 ICPDF网 联系我们和版权申明