ADL5531-EVALZ [ADI]
20 MHz to 500 MHz IF Gain Block;型号: | ADL5531-EVALZ |
厂家: | ADI |
描述: | 20 MHz to 500 MHz IF Gain Block |
文件: | 总12页 (文件大小:371K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
20 MHz to 500 MHz
IF Gain Block
ADL5531
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Fixed gain of 20 dB
ADL5531
8 NC
NC 1
Operation up to 500 MHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
RFIN 2
7 RFOUT
6 NC
BIAS
NC 3
NC 4
CONTROL
5 CLIN
LINEARIZER
41 dBm at 70 MHz
39 dBm at 190 MHz
NC = NO CONNECT
Output 1 dB compression: 20.6 dB at 190 MHz
Noise figure: 2.5 dB at 190 MHz
Single 5 V power supply
Figure 1.
Small footprint 8-lead LFCSP
ADL5534 20 dB gain dual-channel version
2 kV ESD (Class 2)
GENERAL DESCRIPTION
The ADL5531 is a broadband, fixed-gain, linear amplifier
that operates at frequencies up to 500 MHz. The device can be
used in a wide variety of equipment, including cellular, satellite,
broadband, and instrumentation equipment.
The ADL5531 is fabricated on a GaAs HBT process and has
an ESD rating of 2 ꢀk ꢁ(lass 2). The device is pacꢀaged in an
8-lead 3 mm × 3 mm LF(SP that uses an exposed paddle for
excellent thermal impedance.
The ADL5531 provides a gain of 20 dB, which is stable over
frequency, temperature, power supply, and from device to device.
This amplifier is single ended and internally matched to 50 Ω.
Only input/output ac coupling capacitors, power supply decoupling
capacitors, and external inductors are required for operation.
The ADL5531 consumes 100 mA on a single 5 k supply and is
fully specified for operation from −40°( to +85°(.
The dual-channel 20 dB gain version, ADL5534, is also available
from Analog Devices, Inc.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject tochange without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADL5531
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Basic Connections.............................................................................9
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Typical Scattering Parameters..................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Soldering Information and Recommended PCB Land
Pattern.............................................................................................9
Evaluation Board ............................................................................ 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
8/2017—Rev. B to Rev. C
Changed CP-8-2 to CP-8-13 ........................................ Throughout
Updated Outline Dimensions....................................................... 11
Changes to Ordering Guide .......................................................... 11
11/2013—Rev. A to Rev. B
Changes to Figure 2.......................................................................... 6
Added Figure 14, Renumbered Sequentially ................................ 8
8/2008—Rev. 0 to Rev. A
Changes to Features Section and General Description
Section................................................................................................ 1
Added Exposed Pad Notation to Outline Dimensions ............. 11
8/2007—Revision 0: Initial Version
Rev. C | Page 2 of 12
Data Sheet
ADL5531
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
OVERALL FUNCTION
Frequency Range
Gain (S21)
20
500
MHz
dB
190 MHz
190 MHz
190 MHz
190 MHz
20.3
Input Return Loss (S11)
Output Return Loss (S22)
Reverse Isolation (S12)
FREQUENCY = 70 MHz
Gain
−19.5
−26.5
−23.0
dB
dB
dB
20.9
0.03
0.22
0.19
20.4
41.0
2.5
dB
vs. Frequency
5 MHz
dB
vs. Temperature
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
dB
vs. Supply
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
dBm
dBm
dB
∆f = 1 MHz, output power (POUT) = 0 dBm per tone
FREQUENCY = 190 MHz
Gain
19.7
19.2
4.75
20.3
0.12
0.22
0.17
20.6
39.0
2.5
21.0
dB
vs. Frequency
50 MHz
dB
vs. Temperature
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
dB
vs. Supply
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
dBm
dBm
dB
∆f = 1 MHz, output power (POUT) = 0 dBm per tone
FREQUENCY = 380 MHz
Gain
19.7
0.15
0.24
0.15
20.4
36.0
3.0
20.5
dB
vs. Frequency
50 MHz
dB
vs. Temperature
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
dB
vs. Supply
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
dBm
dBm
dB
∆f = 1 MHz, output power (POUT) = 0 dBm per tone
Pin RFOUT
POWER INTERFACE
Supply Voltage
5
5.25
110
V
Supply Current
100
15
0.5
mA
mA
W
vs. Temperature
−40°C ≤ TA ≤ +85°C
VPOS = 5 V
Power Dissipation
Rev. C | Page 3 of 12
ADL5531
Data Sheet
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C. The effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
S11
S21
S12
S22
Frequency
(MHz)
Magnitude (dB) Angle (°)
Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)
20
−19.9933
−19.6622
−17.9244
−18.4041
−18.6386
−19.2303
−19.4456
−20.1783
−20.2409
−20.7266
−20.6064
−132.614
−151.093
−166.031
−177.116
21.99753
21.20511
20.83152
20.67117
173.7349 −24.2574
170.3258 −23.4894
167.5595 −23.22
4.854191 −19.1444
5.603544 −21.4752
6.119636 −23.0386
6.631844 −23.335
7.784913 −22.8555
8.763143 −21.6619
9.908631 −20.2707
11.21706 −18.7007
12.36953 −17.1242
13.57857 −15.726
14.73385 −14.41
−46.7161
−89.9497
−115.741
−119.722
−115.855
−111.307
−106.681
−104.369
−103.565
−103.863
−105.079
50
100
150
200
250
300
350
400
450
500
164.1871 −23.0914
160.4721 −22.9921
156.5272 −22.9219
152.4398 −22.8475
148.3008 −22.7662
144.2311 −22.665
140.0789 −22.5569
135.9952 −22.4519
+179.6269 20.56097
+175.3384 20.45422
+175.0622 20.34563
+173.422
20.21365
+174.1593 20.07116
+175.6233 19.90932
+175.853
19.72779
Rev. C | Page 4 of 12
Data Sheet
ADL5531
ABSOLUTE MAXIMUM RATINGS
ESD CAUTION
Table 3.
Parameter
Rating
Supply Voltage on RFOUT
Input Power on RFIN
5.5 V
10 dBm
Internal Power Dissipation (Paddle Soldered)
θJA (Junction to Air)
600 mW
103°C/W
150°C
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Rating—Human Body Model
−40°C to +85°C
−65°C to +150°C
2 kV
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. C | Page 5 of 12
ADL5531
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
RFIN
NC
1
2
3
4
8
7
6
5
NC
RFOUT
NC
ADL5531
TOP VIEW
(Not to Scale)
CLIN
NC
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD. SOLDER THIS
PAD TO A LOW IMPEDANCE
GROUND PLANE.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 3, 4, 6, 8 NC
No Connect.
2
5
7
RFIN
RF Input. Requires a 10 nF dc blocking capacitor.
CLIN
A 1 nF capacitor connected between Pin 5 and ground provides decoupling for the on-board linearizer.
RFOUT
RF Output and Bias. DC bias is provided to this pin through a 470 nH inductor (Coilcraft 1008CS-471XJLC or
equivalent). The RF path requires a 10 nF dc blocking capacitor.
EP
Exposed Pad
GND. Solder this pad to a low impedance ground plane.
Rev. C | Page 6 of 12
Data Sheet
ADL5531
TYPICAL PERFORMANCE CHARACTERISTICS
22
20
18
16
14
12
10
8
23.0
22.5
22.0
21.5
21.0
20.5
20.0
19.5
19.0
45
42
39
36
33
30
27
24
21
18
15
12
42
40
38
36
34
32
30
28
26
+25°C
GAIN
–40°C
OIP3
+85°C
+85°C
+25°C
P1dB
–40°C
6
NOISE
FIGURE
4
2
0
0
50
100 150 200 250 300 350 400 450 500
0
50
100 150 200 250 300 350 400 450 500
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 3. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
Figure 6. P1dB and OIP3 vs. Frequency and Temperature
42
40
38
36
34
32
30
28
26
24
21.4
21.2
21.0
20.8
20.6
20.4
20.2
20.0
19.8
19.6
19.4
19.2
19.0
70MHz
20MHz
190MHz
380MHz
–40°C
500MHz
+25°C
+85°C
–8 –6 –4 –2
0
2
4
6
8
10 12 14 16 18 20
0
50
100 150 200 250 300 350 400 450 500
FREQUENCY (MHz)
P
PER TONE (dBm)
OUT
Figure 4. Gain vs. Frequency and Temperature
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
0
–5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
–10
–15
–20
–25
–30
–35
–40
S11 (dB)
S12 (dB)
+85°C
+25°C
–40°C
S22 (dB)
50
0
100 150 200 250 300 350 400 450 500
FREQUENCY (MHz)
0
50
100 150 200 250 300 350 400 450 500
FREQUENCY (MHz)
Figure 5. Input Return Loss (S11), Reverse Isolation (S12), and
Output Return Loss (S22) vs. Frequency
Figure 8. Noise Figure vs. Frequency and Temperature
Rev. C | Page 7 of 12
ADL5531
Data Sheet
45
40
35
30
25
20
15
10
5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0
37.5
37.9
38.3
38.7
39.1
39.5
39.9
40.3
0
50
100 150 200 250 300 350 400 450 500
FREQUENCY (MHz)
OIP3 (dBm)
Figure 9. OIP3 Distribution at 190 MHz
Figure 12. Noise Figure vs. Frequency at 25°C, Multiple Devices Shown
60
50
40
30
20
10
150
140
130
5.25V
120
110
100
5V
90
80
4.75V
70
60
0
20.0
50
20.2
20.4
20.6
20.8
21.0
21.2
21.4
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
P1dB (dBm)
Figure 13. Supply Current vs. Supply Voltage and Temperature
Figure 10. P1dB Distribution at 190 MHz
115
50
45
40
35
30
25
20
15
10
5
+85°C
+25°C
110
105
100
95
90
85
80
–40°C
75
70
65
60
55
0
–6 –4 –2
0
2
4
6
8
10 12 14 16 18 20 22
19.7
19.9
20.1
20.3
20.5
20.7
20.9
19.8
20.0
20.2
20.4
20.6
20.8
21.0
P
(dBm)
OUT
GAIN (dB)
Figure 14. Supply Current vs. POUT and Temperature
Figure 11. Gain Distribution at 190 MHz
Rev. C | Page 8 of 12
Data Sheet
ADL5531
BASIC CONNECTIONS
2.03mm
The basic connections for operating the ADL5531 are shown
in Figure 16. The input and output are ac-coupled with 10 nF
(0402) capacitors. DC bias is provided to the amplifier via an
inductor (Coilcraft 1008CS-471XJLC or equivalent) connected
to the RFOUT pin. The bias voltage should be decoupled using
10 nF and 1 μF capacitors.
8
1
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
4
5
1.53mm
0.71mm
Figure 15 shows the recommended land pattern for ADL5531.
To minimize thermal impedance, the exposed pad on the
package underside is soldered down to a ground plane. If
multiple ground layers exist, they are stitched together using
vias (a minimum of five vias is recommended). Pin 1, Pin 3,
Pin 4, Pin 6, and Pin 8 can be left unconnected or can be connected
to ground. Connecting these pins to ground slightly enhances
thermal impedance. For more information on land pattern design
and layout, refer to AN-772 Application Note, A Design and
Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP).
Figure 15. Recommended Land Pattern
VPOS
(TESTLOOP RED)
C5
10nF
C6
1µF
L1
470nH
W1
GND
(TESTLOOP BLACK)
ADL5531
NC
RFOUT
NC
8
7
6
1 NC
RFIN
RFOUT
C1
C2
2 RFIN
10nF
10nF
3 NC
4 NC
CLIN 5
C3
1nF
NC = NO CONNECT
Figure 16. Basic Connections
Rev. C | Page 9 of 12
ADL5531
Data Sheet
EVALUATION BOARD
Figure 19 shows the schematic for the ADL5531 evaluation
board. The board is powered by a single 5 V supply.
The components used on the board are listed in Table 5. Power
can be applied to the board through clip-on leads or through
Jumper W1. Note that C4, C7, C8, L3, L4, L5, R1, and R2 have
no function.
Figure 18. Evaluation Board Layout (Top)
Figure 17. Evaluation Board Layout (Bottom)
L5
OPEN
VPOS
(TESTLOOP RED)
C4
C5
10nF
C6
1µF
L1
470nH
OPEN
W1
GND
(TESTLOOP BLACK)
ADL5531
L2
NC
RFOUT
NC
8
7
6
1 NC
RFIN
RFOUT
0Ω
C1
C2
10nF
2 RFIN
C8
OPEN
10nF
R1
R2
L4
OPEN
3 NC
4 NC
OPEN
OPEN
CLIN 5
C3
1nF
L3
OPEN
Z1
C7
OPEN
NC = NO CONNECT
Figure 19. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component
Z1
Function
Default Value
DUT
ADL5531
10 nF, 0402
1 nF, 0603
10 nF, 0603
1 µF, 0603
Open
C1, C2
C3
AC coupling capacitors
Linearizer capacitor
Power supply decoupling capacitor
Power supply decoupling capacitor
C5
C6
C4, C7, C8
R1, R2
L1
Open
DC bias inductor
470 nH, 1008 (Coilcraft 1008CS-471XJLC or equivalent)
L2
0 Ω, 0402
Open
L3, L4, L5
VPOS, GND
W1
Clip-on terminals for power supply
VPOS, GND
W1
2-pin jumper for connection of ground and supply via cable
50 Ω SMA female connectors
RFIN, RFOUT
RFIN, RFOUT
Rev. C | Page 10 of 12
Data Sheet
ADL5531
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
1.84
1.74
1.64
3.10
3.00 SQ
2.90
0.50
BSC
8
5
PIN 1 INDEX
EXPOSED
PAD
1.55
1.45
1.35
AREA
0.50
0.40
0.30
4
1
TOP VIEW
SIDE VIEW
BOTTOM VIEW
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.80
0.75
0.70
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
0.30
0.25
0.20
SEATING
PLANE
0.203 REF
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
Figure 20. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
CP-8-13
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
8-Lead LFCSP, 7” Tape and Reel
Evaluation Board
Package Option
Branding
ADL5531ACPZ-R7
ADL5531-EVALZ
−40°C to +85°C
CP-8-13
Q16
1 Z = RoHS Compliant Part.
Rev. C | Page 11 of 12
ADL5531
NOTES
Data Sheet
©2007–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06833-0-8/17(C)
Rev. C | Page 12 of 12
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