ADM1087AKS-R7 [ADI]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, MO-203AB, PLASTIC, SC70-6, Power Management Circuit;
| 型号： | ADM1087AKS-R7 |
| 厂家： | 
ADI |
| 描述： | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, MO-203AB, PLASTIC, SC70-6, Power Management Circuit 光电二极管 |
| 文件： | 总15页 (文件大小：302K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Simple Sequencers™
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
V
CC
Provide time delays between enabling of regulators
Can be cascaded with regulators for multiple supply
sequencing
ADM1085/ADM1086
V
Power supply monitoring from 0.6 V
Output stages
CAPACITOR
ADJUSTABLE
DELAY
IN
ENOUT
0.6V
High voltage (up to 22 V) open-drain output
(ADM1085/ADM1087)
Push-pull output (ADM1086/ADM1088)
Capacitor adjustable time delays
High voltage (up to 22 V) enable input
Low power consumption (15 µA)
GND
CEXT
ENIN
V
CC
Specified over –40°C to +125°C temperature range
6-lead SC70 package
ADM1087/ADM1088
V
CAPACITOR
ADJUSTABLE
DELAY
IN
ENOUT
0.6V
APPLICATIONS
Desktop/notebook computers
Routers
GND
CEXT
ENIN
GSM basestations
Optical line cards
Figure 1.
GENERAL DESCRIPTION
The ADM1085/ADM1086/ADM1087/ADM1088 are simple
sequencing circuits that provide a time delay between the
enabling of voltage regulators at power-up in multiple supply
systems. When the output voltage of the first regulator reaches a
preset threshold, a time delay is initiated before an enable signal
allows subsequent regulators to power up. Any number of these
devices can be cascaded with regulators to allow sequencing of
multiple power supplies.
All four models have a dedicated enable input pin that allows
the output signal to the regulator to be controlled externally.
This is an active high input (ENIN) for the ADM1085 and
ENIN
ADM1086, and an active low input (
and ADM1088.
) for the ADM1087
The simple sequencers are specified over the extended –40°C to
+125°C temperature range .With low current consumption of
15 µA (typ) and 6-lead SC70 packaging, the parts are suitable
for low power portable applications.
Threshold levels can be set with a pair of external resistors in a
voltage divider configuration. By choosing appropriate resistor
values, the threshold can be adjusted to monitor voltages as low
as 0.6 V.
Table 1. Selection Table
Output Stage
Part No.
Enable Input
ENOUT
ENOUT
Open-Drain
Push-Pull
The ADM1086 and ADM1088 have push-pull output stages,
ADM1085
ADM1086
ADM1087
ADM1088
ENIN
ENIN
ENIN
ENIN
ENOUT
with active high (ENOUT) and active low (
) logic
outputs, respectively. Similarly, the ADM1085 has an active high
(ENOUT) logic output and the ADM1087 has an active low
Open-Drain
Push-Pull
ENOUT
(
) output. Both the ADM1085 and ADM1087 have
open-drain output stages that can be pulled up to voltage levels
as high as 22 V through an external resistor. This level shifting
property of the ADM0185 and ADM1087 ensures compatibility
with enable input logic levels of different regulators and
converters.
Rev. PrG
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
TABLE OF CONTENTS
Application Information................................................................ 11
Specifications..................................................................................... 3
ADM1085/ADM1086/ADM1087/ADM1088 Sequencing
Circuits .................................................................................... 11
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configurations And Function Descriptions .......................... 5
Typical Performance Characteristics ............................................. 6
Circuit Information.......................................................................... 9
Timing Characteristics and Truth Tables.................................. 9
Capacitor Adjustable Delay Circuit ........................................... 9
Open-Drain and Push-Pull Outputs ....................................... 10
Dual LOFO Sequencing ............................................................ 13
Simultaneous Enabling.............................................................. 13
Power Good Signal Delays........................................................ 13
Quad Supply Power Good Indicator ....................................... 14
Sequencing with FET Switches................................................. 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
REVISION HISTORY
Revision PrG—Preliminary Version
Rev. PrG | Page 2 of 15
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
SPECIFICATIONS
VCC = Full Operating Range, TA=-–40°C to +125°C, unless otherwise noted.
Table 2.
Parameter
Min
Typ Max
Unit
Test Conditions/Comments
Supply
VCC Operating Voltage Range
VIN Operating Voltage Range
Supply Current
2.25
0
3.6
22
20
V
V
µA
V
15
0.6
20
VIN Rising Threshold, VTH_RISING
VIN Hysteresis
0.56
125
0.64
VCC = 3.3 V
mV
ENOUT
VIN to ENOUT/
Delay
VIN Rising (CEXT Floating)
VIN Falling
35
20
µs
µs
C = 20 pF
VIN = VTH_FALLING to (VTH_FALLING – 100 mV)
CEXT Charge Current
250 375
nA
Threshold Temperature Coefficient
30
ppm/°C
µs
ENIN
ENIN
ENIN
ENOUT
TO ENOUT/
0.5
VIN > VTH_RISING
ENIN/
ENIN/
ENIN/
Propagation Delay
0.25VCC − 0.2
0.3
V
V
V
Voltage Low
Voltage High
0.25VCC + 0.2
0.8VCC
ENOUT
ENOUT/
VIN < VTH_FALLING (ENOUT),
Voltage Low
ENOUT
VIN > VTH_RISING
SINK = 1.2 mA
VIN > VTH_FALLING (ENOUT),
ENOUT
( ),
I
ENOUT
ENOUT/
V
Voltage High
(ADM1086/ADM1088)
VIN < VTH_RISING
(
),
I
SOURCE = 500 µA
ENOUT
ENOUT/ Open-Drain Output Leakage
Current (ADM1085/ADM1087)
1
µA
ENOUT
ENOUT/ = 22 V
Rev. PrG | Page 3 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
VCC
VIN
CEXT
–0.3 V to +6 V
–0.3 V to +25 V
–0.3 V to +6 V
–0.3 V to +25 V
–0.3 V to +25 V
–0.3 V to +6 V
–40°C to +125°C
–65°C to +150°C
146°C/W
ENIN
ENIN,
ENOUT
ENOUT,
ENOUT,
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SC70
Lead Temperature
(ADM1085, ADM1087)
(ADM1086, ADM1088)
ENOUT
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
300°C
215°C
220°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrG | Page 4 of 15
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1085/
ENIN/ENIN
1
2
3
6
5
4
V
CC
ADM1086/
ADM1087/
ADM1088
GND
CEXT
V
ENOUT/ENOUT
TOP VIEW
IN
(Not to Scale)
Figure 2. ADM1085/ADM1086/ADM1087/ADM1088 Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
Enable Input. Used to Control the Status of the Enable Output. Active high for ADM1085/ADM1086. Active low
for ADM1087/ADM1088.
Ground.
ENIN
1
2
ENIN,
GND
Input for Voltage Signal Being Monitored. The voltage applied at this pin is compared with a 0.6 V on-chip
reference. This input can be biased via a voltage divider resistor network to customize the effective input
threshold. Can be used to precisely monitor, for example, an analog power supply output signal and detect
when it has powered up. With the 0.6 V reference, digital signals with various logic level thresholds can also be
detected.
Enable Output. This output is asserted when the voltage at VIN is above VTH_RISING and the time delay has
elapsed, provided the enable input is asserted. Active high for the ADM1085/ADM1086. Active low for the
ADM1087/ADM1088.
3
4
VIN
ENOUT
ENOUT,
External Capacitor Pin. The time delay on the enable output is determined by the capacitance on this pin. The
5
6
CEXT
VCC
delay is only seen when the voltage at VIN rises past VTH_RISING, and not when it falls below VTH_FALLING
.
Power Supply.
Rev. PrG | Page 5 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
200
180
160
140
120
100
80
700
680
660
640
T
= +85°C
A
V
TH_RISING
T
= +25°C
A
620
600
580
560
540
520
500
V
TH_FALLING
T
= –40°C
A
60
40
20
0
0
2
4
6
8
10
V
12
(V)
14
16
18
20
22
3.60
10
–40
25
85
TEMPERATURE (°C)
IN
Figure 3. VIN Threshold vs. Temperature
Figure 6. VIN Leakage Current vs. VIN Voltage
12.0
11.5
11.0
10.5
10.0
9.5
200
190
180
170
160
150
140
130
120
T
= +85°C
A
T
T
= +85°C
= +25°C
A
A
T
T
= +25°C
= –40°C
A
9.0
A
T
= –40°C
A
8.5
8.0
2.25
2.40
2.70
3.00
3.30
3.60
2.25
2.40
2.70
3.00
3.30
V
(V)
V
(V)
CC
CC
Figure 4. Supply Current vs. Supply Voltage
Figure 7. VIN Leakage Current vs. VCC Voltage
20
18
16
14
12
10
8
10000
1000
100
10
T
= +85°C
A
T
= +25°C
A
T
= –40°C
A
6
4
1
2
0
0.1
0
2
4
6
8
10
V
12
(V)
14
16
18
20
22
0.01
0.1
1
OUTPUT SINK CURRENT (mA)
IN
Figure 5. Supply Current vs. VIN Voltage
Figure 8. Output Voltage vs. Output Sink Current
Rev. PrG | Page 6 of 15
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
100
90
120
T
= +85°C
A
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
T
= +25°C
A
T
= –40°C
A
2.25
2.40
2.70
3.00
3.30
3.60
0
2
4
6
8
10
12
14
16
18
20
22
SUPPLY VOLTAGE (V)
ENIN (V)
Figure 9. Output Low Voltage vs. Supply Voltage
ENIN
ENIN
Voltage
Figure 12. ENIN/
Leakage Current vs. ENIN/
110
105
100
95
100
90
80
70
60
50
40
30
20
10
0
T
T
= +85°C
= +25°C
A
A
1mV/µs
90
10mV/µs
T
= –40°C
A
85
80
2.25
2.40
2.70
3.00
3.30
3.60
–50
–35
–20
–5
10
25
40
55
70
85
V
(V)
TEMPERATURE (°C)
CC
Figure 10. VCC Falling Propagation Delay vs. Temperature
ENIN
Figure 13. ENIN/
Leakage Current vs. VCC Voltage
10000
1000
100
10
500
450
400
350
300
250
200
150
100
50
1
0.1
0
2.25
0.562 2.390 5.02 22.9 53.2
241
520 2350 4480 26200
2.40
2.70
3.00
3.30
3.60
TIMEOUT DELAY (ms)
SUPPLY VOLTAGE (V)
Figure 14. CEXT Capacitance vs. Timeout Period
Figure 11. Output Fall Time vs. Supply Voltage
Rev. PrG | Page 7 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
300
290
280
270
260
250
240
230
220
210
200
100
90
80
70
60
50
40
30
20
10
0
–50
–35
–20
–5
10
25
40
55
70
85
1
10
100
1000
TEMPERATURE (°C)
COMPARATOR OVERDRIVE (mV)
Figure 15. CEXT Charge Current vs. Temperature
Figure 17. Maximum VIN Transient Duration vs. Comparator Overdrive
100
90
80
70
60
50
40
30
20
10
0
–50
–35
–20
–5
10
25
40
55
70
85
TEMPERATURE (°C)
ENOUT
Figure 16. VIN to ENOUT/
Propagation Delay (CEXT Floating) vs.
Temperature
Rev. PrG | Page 8 of 15
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
CIRCUIT INFORMATION
When VIN reaches the upper threshold voltage, VTH_RISING, an
internal circuit generates a delay, tEN, before the enable output is
asserted. If VIN drops below the lower threshold voltage,
TIMING CHARACTERISTICS AND TRUTH TABLES
The enable outputs of the ADM1085/ADM1086/ADM1087/
ADM1088 are related to the VIN and enable inputs by a simple
AND function. The enable output is asserted only if the enable
input is asserted and the voltage at VIN is above VTH_RISING, with
the time delay elapsed. Table 5 and Table 6 show the enable
output logic states for different VIN/enable input combinations
when the capacitor delay has elapsed. The timing diagrams in
Figure 18 and Figure 19 give a graphical representation of how
the enable outputs of the ADM1085/ADM1086/ADM1087/
ADM1088 respond to VIN and enable input signals.
VTH_FALLING, the enable output is deasserted immediately.
Similarly, if the enable input is disabled while VIN is above the
threshold, the enable output deasserts immediately. Unlike VIN, a
ENIN
low-to-high transition on ENIN (or high-to-low on
not yield a time delay on ENOUT.
) does
CAPACITOR ADJUSTABLE DELAY CIRCUIT
Figure 4 shows the internal circuitry used to generate the time
delay on the enable output. A 250 nA current source charges a
small internal parasitic capacitance, CINT. When the capacitor
voltage reaches 1.2 V, the enable output is asserted. The time
taken for the capacitor to reach 1.2 V, in addition to the
propagation delay of the comparator, constitutes the enable
timeout, which is typically 35 µs.
Table 5. ADM1085/ADM1086 Truth Table
VIN
ENIN
ENOUT
<VTH_FALLING
<VTH_FALLING
>VTH_RISING
>VTH_RISING
0
1
0
1
0
0
0
1
To minimize the delay between VIN falling below VTH_FALLING and
the enable output deasserting, an NMOS transistor is connected
in parallel with CINT. The output of the voltage detector is
connected to the gate of this transistor so that when VIN falls
below VTH_FALLING, the transistor switches on and CINT discharges
quickly.
Table 6. ADM1087/ADM1088 Truth Table
ENIN
ENOUT
VIN
<VTH_FALLING
<VTH_FALLING
>VTH_RISING
>VTH_RISING
1
0
1
0
1
1
1
0
V
CC
250nA
SIGNAL FROM
VOLTAGE
DETECTOR
V
V
V
TH_FALLING
IN
TH_RISING
TO AND GATE
AND OUTPUT
STAGE
C
1.2V
INT
ENIN
CEXT
C
tEN
ENOUT
Figure 20. Capacitor Adjustable Delay Circuit
Figure 18. ADM1085/ADM1086 Timing Diagram
Connecting an external capacitor to the CEXT pin delays the
rise time, and therefore the enable timeout, further. The
relationship between the value of the external capacitor and the
resulting timeout is characterized by the following equation:
V
V
V
TH_FALLING
IN
TH_RISING
ENIN
t
EN = (C × 4.8 ×106) + 35 µs
tEN
ENOUT
Figure 19. ADM1087/ADM1088 Timing Diagram
Rev. PrG | Page 9 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
V
(≤22V)
CC
OPEN-DRAIN AND PUSH-PULL OUTPUTS
ADM1085/ADM1087
The ADM1085 and ADM1087 have open-drain output stages
that require an external pull-up resistor in order to provide a
logic high voltage level. The geometry of the NMOS transistor is
such that the output can be pulled up to voltage levels as high as
22 V.
LOGIC
Figure 21. Open-Drain Output Stage
The ADM1086 and ADM1088 have push-pull (CMOS) output
stages that require no external components to drive other logic
circuits. An internal PMOS pull-up transistor provides the logic
high voltage level.
ADM1086/ADM1088
V
CC
LOGIC
Figure 22. Push-Pull Output Stage
Rev. PrG | Page 10 of 15
Preliminary Technical Data
APPLICATION INFORMATION
ADM1085/ADM1086/ADM1087/ADM1088
In Figure 23, three ADM1085s are used to sequence four
supplies on power-up. Separate capacitors on the CEXT pins of
the ADM1085s determine the time delays between enabling of
the 3.3 V, 2.5 V, 1.8 V, and 1.2 V supplies. Because the dc/dc
converters and ADM1085s are connected in cascade, and
because the output of any converter is dependant on that of the
previous one, an external controller can disable all four supplies
simultaneously by simply disabling the first dc/dc converter in
the chain.
ADM1085/ADM1086/ADM1087/ADM1088
SEQUENCING CIRCUITS
The ADM1085/ADM1086/ADM1087/ADM1088 are
compatible with voltage regulators and dc-to-dc converters that
have active high or active low enable or shutdown inputs, with a
choice of open-drain or push-pull output stages. Figure 23 to
Figure 25 illustrate how each of the ADM1085/ADM1086/
ADM1087/ADM1088 simple sequencers can be used in
multiple-supply systems, depending on which regulators are
used and which output stage is preferred.
For power-down sequencing, an external controller can dictate
when the supplies are switched off by accessing the ENIN
inputs individually.
12V
3.3V
3.3V
3.3V
IN
IN
IN
IN
EN
OUT
EN
OUT
EN
OUT
EN
OUT
DC/DC
3.3V
DC/DC
2.5V
DC/DC
1.8V
DC/DC
1.2V
3.3V
3.3V
3.3V
V
V
V
CC
CC
CC
ENABLE
CONTROL
V
V
V
ENOUT
ENOUT
ENOUT
IN
IN
IN
ADM1085
ADM1085
ADM1085
ENIN
CEXT
ENIN
CEXT
ENIN
CEXT
12V
3.3V
2.5V
1.8V
1.2V
tEN1
tEN2
tEN3
EXTERNAL
DISABLE
Figure 23. Typical ADM1085 Applications Circuit
Rev. PrG | Page 11 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
12V
IN
IN
IN
IN
EN
OUT
EN
OUT
EN
OUT
EN
OUT
DC/DC
3.3V
DC/DC
2.5V
DC/DC
1.8V
DC/DC
1.2V
3.3V
3.3V
3.3V
V
V
V
CC
CC
CC
V
V
V
ENOUT
ENOUT
ENOUT
IN
IN
IN
ADM1086
ADM1086
ADM1086
ENIN
CEXT
ENIN
CEXT
ENIN
CEXT
ENABLE
CONTROL
12V
3.3V
2.5V
1.8V
1.2V
tEN1
tEN2
tEN3
EXTERNAL
DISABLE
Figure 24. Typical ADM1086 Applications Circuit
12V
12V
IN
ADP3334
IN
IN
IN
SD
OUT
SD
OUT
SD
OUT
SD
OUT
3.3V
ADP3334
2.5V
ADP3334
3.3V
ADP3334
2.5V
3.3V
3.3V
V
V
CC
ENOUT
CC
ENOUT
V
V
IN
IN
ADM1087
ADM1088
ENIN
CEXT
ENIN
CEXT
Figure 25. Typical ADM1087 Application Circuit Using ADP3334 Voltage
Regulators
Figure 26. Typical ADM1088 Application Circuit using ADP3334 Voltage
Regulators
Rev. PrG | Page 12 of 15
Preliminary Technical Data
ADM1085/ADM1086/ADM1087/ADM1088
DUAL LOFO SEQUENCING
SIMULTANEOUS ENABLING
A power sequencing solution for a portable device, such as a
PDA, is shown in Figure 29. The requirement is for the micro-
processor’s power supply to turn on before the LCD displays,
and for the display to power-down before the microprocessor.
That is to say, the last power supply to turn on is the first one to
turn off (LOFO).
The enable output can drive multiple enable or shutdown
regulator inputs simultaneously.
12V
3.3V
IN
IN
SD
OUT
SD
OUT
ADP3333
ADP3333
3.3V
2.5V
3.3V
SD
An RC network connected between the battery and the
input of the ADP3333 voltage regulator causes power-up and
SD
V
CC
ENOUT
power-down transients to appear at the
input when the
V
IN
12V
battery is connected and disconnected. Because capacitor C1
charges up to 9 V on power-up and charges down from 9 V on
ADM1085
IN
ENIN
CEXT
SD
OUT
ADP3333
SD
power-down, and because the
pin has logic high and logic
1.8V
low input levels of 2 V and 0.4 V, this causes the 3.3 V micro-
processor supply to turn on quickly on power-up and turn off
slowly on power-down.
ENABLE
CONTROL
Figure 28. Enabling a Pair of Regulators from a Single ADM1085
For the display power sequencing, the ADM1085 is equipped
with capacitor C2, which creates the delay between the micro-
processor and display power turning on. When the system is
powered down, the ADM1085 turns off the display power
immediately, while the 3.3 V regulator waits for C1 to discharge
to 0.4 V before switching off.
POWER GOOD SIGNAL DELAYS
For scenarios where sequencing is performed by asserting
power good signals when the voltage regulators are already on,
rather than sequencing the power supplies directly, a simple
sequencer IC can provide variable delays so that enabling
separate circuit blocks can be staggered in time.
9V
SYSTEM
POWER SWITCH
For example, in a notebook PC application, a dedicated
microcomputer asserts a power good signal for North Bridge™
and South Bridge™ ICs. The ADM1086 delays the south bridge’s
signal so it is enabled after the north bridge.
SD
2.5V
MICROPROCESSOR
POWER
ADP3333
C1
3.3V
9V
9V
9V
V
IN
SD
5V
DISPLAY
POWER
ADP3333
ENOUT
ADM1085
5V
5V
ENIN
CEXT
POWER_GOOD
EN
MICROCOMPUTER
C2
NORTH
BRIDGE
IC
9V
SYSTEM
POWER
3.3V
5V
0V
9V
V
V
C1
ENOUT
EN
IN
SOUTH
BRIDGE
IC
0V
ADM1088
2.5V
ENIN
CEXT
MICROPROCESSOR
POWER
0V
5V
DISPLAY
POWER
Figure 29. Power Good Delays
0V
Figure 27. Dual Last-On First-Off Power Supply Sequencing
Rev. PrG | Page 13 of 15
ADM1085/ADM1086/ADM1087/ADM1088
Preliminary Technical Data
QUAD SUPPLY POWER GOOD INDICATOR
SEQUENCING WITH FET SWITCHES
The enable output of the simple sequencers is equivalent to an
AND function of VIN and ENIN. Only when the voltage at VIN is
above the threshold and the enable input (ENIN) is high will
ENOUT be high. Although ENIN is a digital input, it can
tolerate voltages as high as 22 V and can serve to detect if a
supply is present. Therefore, a simple sequencer can monitor
two supplies and assert what can be interpreted as a power good
signal when both supplies are present. The outputs of two
ADM1085’s can be wire-AND’ed together to make a quad
supply power-good indicator.
The open-drain outputs of the ADM1085 and ADM1087 can be
used to drive external FET transistors, which can be used to
switch on power supply rails. All that is needed is a pull-up
resistor to a voltage source that is high enough to turn on
the FET.
12V
3.3V
V
ENOUT
IN
3.3V
3.3V
ADM1085
ENIN
CEXT
9V
5V
POWER_GOOD
V
ENOUT
IN
ADM1085
2.5V
ENIN
Figure 31. Sequencing with FET Switch
3.3V
2.5V
1.8V
V
ENOUT
IN
ADM1085
ENIN
Figure 30. Quad Supply Power Good Indicator
Rev. PrG | Page 14 of 15
Preliminary Technical Data
OUTLINE DIMENSIONS
ADM1085/ADM1086/ADM1087/ADM1088
2.00 BSC
6
5
2
4
3
2.10 BSC
1.25 BSC
1
PIN 1
1.30 BSC
0.65 BSC
1.00
0.90
0.70
1.10 MAX
0.22
0.08
0.46
0.36
0.26
8°
4°
0°
0.30
0.15
0.10 MAX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AB
Figure 32. 6-Lead Plastic Surface-Mount Package [SC70]
(KS-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Quantity
3k
Package Type
SC70-6
Branding
M0V
ADM1085AKS-R7
ADM1085AKS-RL
ADM1086AKS-R7
ADM1086AKS-RL
ADM1087AKS-R7
ADM1087AKS-RL
ADM1088AKS-R7
ADM1088AKS-RL
10k
3k
10k
3k
10k
3k
10k
SC70-6
SC70-6
SC70-6
SC70-6
SC70-6
SC70-6
SC70-6
M0V
M0W
M0W
M0X
M0X
M0Y
M0Y
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR04591–0–2/04(PrG)
Rev. PrG | Page 15 of 15
相关型号：
ADM1087AKS-RL
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, MO-203AB, PLASTIC, SC70-6, Power Management Circuit
ADI
ADM1088AKS-RL
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, MO-203AB, PLASTIC, SC70-6, Power Management Circuit
ADI
©2020 ICPDF网 联系我们和版权申明