ADM1490EBRZ [ADI]
16 Mbps, ESD Protected, Full-Duplex RS-485 Transceivers; 16 Mbps的ESD保护，全双工RS - 485收发器
| 型号： | ADM1490EBRZ |
| 厂家： | 
ADI |
| 描述： | 16 Mbps, ESD Protected, Full-Duplex RS-485 Transceivers |
| 文件： | 总16页 (文件大小：343K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
16 Mbps, ESD Protected,
Full-Duplex RS-485 Transceivers
ADM1490E/ADM1491E
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
V
CC
RS-485/RS-422 full-duplex transceiver for high speed motor
control applications
16 Mbps data rate
ADM1490E
A
B
8 ꢀV ESD protection on RS-485 input/output pins
Complies with ANSI/TIA/EIA-485-A-1998
Open circuit fail-safe
Suitable for 5 V power supply applications
32 nodes on the bus (1 unit load)
Thermal shutdown protection
Operating temperature range: −40°C to +85°C
ADM1490E pacꢀages
RO
DI
R
Z
Y
D
GND
Narrow body, 8-lead SOIC
8-lead MSOP
ADM1491E pacꢀages
Figure 1.
V
CC
Narrow-body, 14-lead SOIC
10-lead MSOP
ADM1491E
A
B
RO
R
APPLICATIONS
RE
DE
RS-485/RS-422 interfaces
Industrial field networꢀs
High data rate motor control
Multipoint data transmission systems
Single-ended-to-differential signal conversion
Z
Y
D
DI
GND
Figure 2.
GENERAL DESCRIPTION
The ADM1490E/ADM1491E are RS-485/RS-422 transceivers
with 8 ꢀk ESD protection and are suitable for high speed, full-
duplex communication on multipoint transmission lines. In
particular, the ADM1490E/ADM1491E are designed for use in
motor control applications requiring communications at data rates
up to 16 Mbps.
maximum output current to 250 mA during fault conditions.
A thermal shutdown circuit senses if the die temperature rises
above 150°C and forces the driver outputs into a high impedance
state under this condition.
The receiver of the ADM1490E/ADM1491E contains a fail-safe
feature that results in a logic high output state if the inputs are
unconnected (floating).
The ADM1490E/ADM1491E are designed for balanced trans-
mission lines and comply with TIA/EIA-485-A-98. The devices
each have a 12 ꢀΩ receiver input impedance for unit load RS-
485 operation, allowing up to 32 nodes on the bus.
The ADM1490E/ADM1491E feature extremely fast and closely
matched switching times. Minimal driver propagation delays
permit transmission at data rates up to 16 Mbps, and low sꢀew
minimizes EMI interference.
The differential transmitter outputs and receiver inputs feature
electrostatic discharge circuitry that provides protection to 8 ꢀk
using the human body model (HBM).
The ADM1490E/ADM1491E are fully specified over the
commercial and industrial temperature ranges. The ADM1490E
is available in two pacꢀages: a narrow body, 8-lead SOIC and an
8-lead MSOP. The ADM1491E is also available in two pacꢀages:
a narrow body, 14-lead SOIC and a 10-lead MSOP.
The ADM1490E/ADM1491E operate from a single 5 k power
supply. Excessive power dissipation caused by bus contention or
output shorting is prevented by short-circuit protection and
thermal circuitry. Short-circuit protection circuits limit the
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarꢀs and registeredtrademarꢀs arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.
ADM1490E/ADM1491E
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Test Circuits........................................................................................9
Theory of Operation ...................................................................... 10
Truth Tables................................................................................. 10
ESD Transient Protection Scheme ........................................... 10
Applications Information.............................................................. 12
Differential Data......................................................................... 12
Cable and Data Rate................................................................... 12
Typical Applications................................................................... 12
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
Functional Blocꢀ Diagrams............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
7/09—Rev. A to Rev. B
Added ADM1490E, 8-Lead SOIC, and 8-Lead MSOP.......Universal
Changes to Table 4.....................................................................................5
Added Figure 8; Renumbered Sequentially..........................................6
Changes to Table 5.....................................................................................6
Changes to Typical Applications Section ............................................12
Changes to Figure 28...............................................................................12
Added Figure 29.......................................................................................13
Updated Outline Dimensions ...............................................................14
Changes to Ordering Guide...................................................................15
2/09—Rev. 0 to Rev. A
Change to Table 9 ........................................................................... 11
12/08—Revision 0: Initial Version
Rev. B | Page 2 of 16
ADM1490E/ADM1491E
SPECIFICATIONS
4.75 k ≤ kCC ≤ 5.25 k; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise
noted. All typical specifications are at TA = 25°C, kCC = 5.0 k, unless otherwise noted.
Table 1.
Parameter
Symbol Min
Typ Max Unit Test Conditions
SUPPLY CURRENT
Outputs Enabled
Outputs Disabled
DRIVER
ICC1
ICC2
1.2
0.8
2.0
1.5
mA
mA
Outputs unloaded, digital inputs = VCC or GND
Outputs unloaded, digital inputs = VCC or GND
Differential Outputs
Differential Output Voltage, Loaded
|VOD2
|
|
2.0
1.5
1.5
5.0
5.0
5.0
0.2
3.0
0.2
100
V
V
V
V
V
V
μA
μA
mA
RL = 100 Ω (RS-422), see Figure 21
RL = 54 Ω (RS-485), see Figure 21
−7 V ≤ VTEST ≤ +12 V, see Figure 22
RL = 54 Ω or 100 Ω, see Figure 21
RL = 54 Ω or 100 Ω, see Figure 21
RL = 54 Ω or 100 Ω, see Figure 21
DE = 0 V, VDD = 0 V or 5 V, VIN = 12 V
DE = 0 V, VDD = 0 V or 5 V, VIN = −7 V
−7 V < VOUT < +12 V
|VOD3
∆|VOD| for Complementary Output States
Common-Mode Output Voltage
∆|VOC| for Complementary Output States
Output Leakage Current (Y, Z)
∆|VOD2
VOC
∆|VOC|
IO
IO
IOS
|
−100
Output Short-Circuit Current
Logic Inputs DE, RE, DI
Input Low Voltage
250
0.8
VIL
VIH
II
V
DE, RE, DI
DE, RE, DI
DE, RE, DI
Input High Voltage
Input Current
2.0
−1
V
+1
μA
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
Input Voltage Hysteresis
Input Current (A, B)
VTH
VHYS
II
−0.2
+0.2
1.0
V
−7 V < VCM < +12 V
VCM = 0 V
VCM = 12 V
VCM = −7 V
−7 V ≤ VCM ≤ +12 V
30
30
mV
mA
mA
kΩ
−0.8
12
Line Input Resistance
Logic Outputs
RIN
Output Voltage Low
VOL
VOH
0.4
V
V
mA
μA
IOUT = +4.0 mA, VA − VB = −0.2 V
IOUT = −4.0 mA, VA − VB = +0.2 V
Output Voltage High
Short-Circuit Current
Three-State Output Leakage Current
4.0
85
1
IOZR
VCC = 5.25 V, 0.4 V < VOUT < 2.4 V
Rev. B | Page 3 of 16
ADM1490E/ADM1491E
TIMING SPECIFICATIONS
TA = −40°C to +85°C.
Table 2.
Parameter
Symbol
Min Typ
Max Unit
Test Conditions
DRIVER
Maximum Data Rate
Propagation Delay
Driver Output Skew
16
11
0.5
Mbps
ns
ns
tDPLH, tDPHL
tSKEW
17
2
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3,
t
SKEW = |tDPLH − tDPHL|
Rise Time/Fall Time
Enable Time
Disable Time
tDR, tDF
tZH, tZL
tHZ, tLZ
8
15
20
20
ns
ns
ns
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3
RL = 110 Ω, CL = 50 pF, see Figure 24 and Figure 5
RL = 110 Ω, CL = 50 pF, see Figure 24 and Figure 5
RECEIVER
Propagation Delay
tPLH, tPHL
tSKEW
tZH, tZL
tHZ, tLZ
12
0.4
20
2
13
13
ns
ns
ns
ns
CL = 15 pF, see Figure 25 and Figure 4
CL = 15 pF, see Figure 25 and Figure 4
RL = 1 kΩ, CL = 15 pF, see Figure 26 and Figure 6
RL = 1 kΩ, CL = 15 pF, see Figure 26 and Figure 6
Skew |tPLH − tPHL
|
Enable Time
Disable Time
Timing Diagrams
Switching Characteristics
CC
V
V
CC
0.5V
tZL
0.5V
CC
V
/2
V
/2
CC
CC
CC
DE
0V
0V
Z
tLZ
tDPLH
tDPHL
2.3V
2.3V
1/2V
O
Y, Z
Y, Z
V
V
+ 0.5V
– 0.5V
OL
V
O
V
V
OL
OH
tZH
tHZ
Y
OH
+V
O
90% POINT
90% POINT
V
= V – V
(Y) (Z)
DIFF
0V
V
DIFF
–V
10% POINT
10% POINT
O
tDR
tDF
Figure 5. Driver Enable/Disable Timing
Figure 3. Driver Propagation Delay Rise/Fall Timing
0.7V
CC
CC
A – B
0.5V
0.5V
CC
CC
0V
0V
RE
0.3V
tZL
tLZ
tPLH
tPHL
V
V
OH
1.5V
1.5V
RO
V
V
+ 0.5V
OL
OH
OUTPUT LOW
OUTPUT HIGH
V
V
OL
OH
RO
1.5V
1.5V
tSKEW = |tPLH
– tPHL|
tZH
tHZ
OL
– 0.5V
RO
0V
Figure 6. Receiver Enable/Disable Timing
Figure 4. Receiver Propagation Delay Timing
Rev. B | Page 4 of 16
ADM1490E/ADM1491E
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
TA = 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount pacꢀages.
Table 3.
Parameter
Rating
Table 4. Thermal Resistance
VCC to GND
−0.3 V to +7 V
Digital I/O Voltage (DE, RE)
Driver Input Voltage (DI)
Receiver Output Voltage (RO)
Driver Output/Receiver Input Voltage
(A, B, Y, Z)
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
−9 V to +14 V
Pacꢀage Type
θJA
Unit
°C/W
°C/W
°C/W
°C/W
8-Lead SOIC
121
86
133
133
14-Lead SOIC
8-Lead MSOP
10-Lead MSOP
Operating Temperature Range
Storage Temperature Range
ESD (HBM) on A, B, Y, and Z
−40°C to +85°C
−55°C to +150°C
8 kV
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 5 of 16
ADM1490E/ADM1491E
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1491E
1
2
3
4
5
6
7
14
13
12
11
10
9
V
V
NC
RO
CC
CC
ADM1490E
ADM1491E
A
RE
TOP VIEW
(Not to Scale)
B
DE
RO
RE
1
2
3
4
5
10
9
V
CC
V
1
2
3
4
8
7
6
5
A
B
Z
CC
Z
DI
1
A
B
Z
RO
DI
TOP VIEW
(Not to Scale)
Y
GND
GND
DE
8
TOP VIEW
(Not to Scale)
8
NC
DI
7
GND
Y
GND
6
Y
NC = NO CONNECT
Figure 8. 14-Lead, Narrow Body SOIC
Pin Configuration
Figure 7. 8-Lead MSOP and 8-Lead SOIC
Pin Configuration
Figure 9. 10-Lead MSOP
Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
8-Lead SOIC,
8-Lead MSOP 14-Lead SOIC 10-Lead MSOP Mnemonic Description
N/A1
2
N/A1
1
2
3
N/A1
1
2
NC
RO
RE
No Connect. This pin is available on the 14-lead SOIC only.
Receiver Output.
Receiver Output Enable. A low level enables the receiver output, whereas
a high level places the receiver output in a high impedance state.
Driver Output Enable. A logic high enables the differential driver outputs,
A and B, whereas a logic low places the differential driver outputs in a
high impedance state.
Driver Input. When the driver is enabled, a logic low on DI forces Pin A low
and Pin B high, whereas a logic high on DI forces Pin A high and Pin B low.
N/A1
4
5
3
4
DE
DI
3
4
6
7
8
9
5
GND
GND
NC
Y
Ground.
N/A1
N/A1
N/A1
6
Ground. This pin is available on the 14-lead SOIC only.
No Connect. This pin is available on the 14-lead SOIC only.
Noninverting Driver Output Y.
N/A1
5
6
7
8
1
10
11
12
13
14
7
8
9
10
N/A1
Z
B
A
VCC
VCC
Inverting Driver Output Z.
Inverting Receiver Input B.
Noninverting Receiver Input A.
Power Supply (5 V 5ꢀ).
N/A1
Power Supply (5 V 5ꢀ). This pin is available on the 14-lead SOIC only.
1 N/A indicates not applicable.
Rev. B | Page 6 of 16
ADM1490E/ADM1491E
TYPICAL PERFORMANCE CHARACTERISTICS
35
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
30
25
20
15
10
5
0
0
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
–50
–25
0
25
50
75 85
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 10. Output Current vs. Receiver Output Low Voltage
Figure 13. Receiver Output Low Voltage vs. Temperature (IOUT = 8 mA)
0
80
70
60
50
–5
–10
40
30
20
–15
–20
10
–25
–30
0
–10
3.50
3.75
4.00
4.25
4.50
4.75
5.00
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 11. Output Current vs. Receiver Output High Voltage
Figure 14. Output Current vs. Driver Differential Output Voltage
4.75
3.00
2.95
2.90
2.85
2.80
2.75
2.70
2.65
2.60
4.70
4.65
4.60
4.55
4.50
–50
–25
0
25
50
75 85
–50
–25
0
25
50
75 85
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 12. Receiver Output High Voltage vs. Temperature (IOUT = 8 mA)
Figure 15. Driver Differential Output Voltage vs. Temperature (RL = 56.3 Ω)
Rev. B | Page 7 of 16
ADM1490E/ADM1491E
80
70
60
50
40
30
1
3
20
10
0
CH1 5V
CH3 2V
CH2 2V
M200ns
A CH1
1.6V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
OUTPUT VOLTAGE (V)
Figure 19. Unloaded Driver Differential Outputs
Figure 16. Output Current vs. Driver Output Low Voltage
0
–10
1
–20
–30
–40
–50
3
–60
–70
–80
CH1 5V
CH3 2V
CH2 2V
M200ns
A CH1
1.6V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
OUTPUT VOLTAGE (V)
Figure 17. Output Current vs. Driver Output High Voltage
Figure 20. Loaded Driver Differential Outputs
(RL Differential = 54 Ω, CL = 100 pF)
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
DRIVER ENABLED
DRIVER DISABLED
–50
–25
0
25
50
75 85
TEMPERATURE (°C)
Figure 18. Output Current vs. Temperature
Rev. B | Page 8 of 16
ADM1490E/ADM1491E
TEST CIRCUITS
Y
R
L
2
DI
V
OD2
V
V
CC
OUT
R
2
L
Y
Z
R
110Ω
L
Z
V
OC
DI
S1
S2
C
L
50pF
DE
Figure 21. Driver Voltage Measurements
Figure 24. Driver Enable/Disable Timing
Y
375Ω
A
DI
V
60Ω
OD3
V
375Ω
OUT
V
TEST
Z
RE
B
C
L
Figure 22. Driver Voltage Measurements
Figure 25. Receiver Propagation Delay
+1.5V
–1.5V
V
CC
S1
Y
R
L
C
C
L
S2
RE
DI
R
L
C
V
L
OUT
L
Z
RE
Figure 23. Driver Propagation Delay
Figure 26. Receiver Enable/Disable Timing
Rev. B | Page 9 of 16
ADM1490E/ADM1491E
THEORY OF OPERATION
The ADM1490E/ADM1491E are RS-422/RS-485 transceivers that
operate from a single 5 k 5% power supply. The ADM1490E/
ADM1491E are intended for balanced data transmission and
comply with both TIA/EIA-485-A and TIA/EIA-422-B. Each
device contains a differential line driver and a differential line
receiver and is suitable for full-duplex data transmission.
ESD TRANSIENT PROTECTION SCHEME
The ADM1490E/ADM1491E use protective clamping
structures on their inputs and outputs to clamp the voltage to a
safe level and dissipate the energy present in ESD (electrostatic).
The protection structure achieves ESD protection up to 8 ꢀk
human body model (HBM).
The input impedance of the ADM1490E/ADM1491E is 12 ꢀΩ,
allowing up to 32 transceivers on the differential bus. A thermal
shutdown circuit prevents excessive power dissipation caused by
bus contention or by output shorting. This feature forces the driver
output into a high impedance state if, during fault conditions, a
significant temperature increase is detected in the internal
driver circuitry.
ESD Testing
Two coupling methods are used for ESD testing: contact dis-
charge and air gap discharge. Contact discharge calls for a direct
connection to the unit being tested; air gap discharge uses a higher
test voltage but does not maꢀe direct contact with the unit under
test. With air discharge, the discharge gun is moved toward the
unit under test, developing an arc across the air gap; therefore,
the term air discharge. This method is influenced by humidity,
temperature, barometric pressure, distance, and rate of closure
of the discharge gun. The contact discharge method, though
less realistic, is more repeatable and is gaining acceptance and
preference over the air gap method.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1490E/ADM1491E feature very low propagation
delay, ensuring maximum baud rate operation. The balanced
driver ensures distortion-free transmission.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can cause
failures in unprotected semiconductors. Catastrophic destruction
can occur immediately because of arcing or heating. Even if cata-
strophic failure does not occur immediately, the device can suffer
from parametric degradation, resulting in degraded performance.
The cumulative effects of continuous exposure can eventually
lead to complete failure.
Another important specification is a measure of the sꢀew
between the complementary outputs. Excessive sꢀew impairs
the noise immunity of the system and increases the amount
of electromagnetic interference (EMI).
TRUTH TABLES
Table 6. Abbreviations in Truth Tables
Letter
Description
H
I
L
X
Z
High level
Indeterminate
Low level
Irrelevant
High impedance (off)
HIGH
R2
VOLTAGE
GENERATOR
DEVICE
C1
UNDER TEST
NOTES
1. THE ESD TEST METHOD USED IS THE
HUMAN BODY MODEL (±8kV) WITH
R2 = 1500Ω AND C1 = 100pF.
Table 7. Transmitting
Figure 27. ESD Generator
Inputs
Outputs
DE
H
H
DI
H
L
Z
L
H
Z
Y
H
L
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable may result in a static dis-
charge that can damage or destroy the interface product connected
to the I/O port. It is, therefore, extremely important to have high
levels of ESD protection on the I/O lines.
L
X
Z
Table 8. Receiving
The ESD discharge can induce latch-up in the device under test.
Therefore, it is important to conduct ESD testing on the I/O pins
while power is applied to the device. This type of testing is more
representative of a real-world I/O discharge in which the equip-
ment is operating normally when the discharge occurs.
Inputs
Output
RE
A − B
RO
L
L
L
L
H
≥ +0.2 V
≤ −0.2 V
−0.2 V ≤ A − B ≤ +0.2 V
Inputs open
X
H
L
I
H
Z
Rev. B | Page 10 of 16
ADM1490E/ADM1491E
100%
90%
36.8%
10%
TIME (t)
tDL
tRL
Figure 28. Human Body Model ESD Current Waveform
Table 9. ADM1490E/ADM1491E ESD Test Results
ESD Test Method
Input/Output Pins
Other Pins
Human Body Model
8 kV
4 kV
Rev. B | Page 11 of 16
ADM1490E/ADM1491E
APPLICATIONS INFORMATION
DIFFERENTIAL DATA
CABLE AND DATA RATE
Differential data transmission reliably transmits data at high
rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals that appear as common-mode voltages on the
line. There are two main standards approved by the Electronics
Industries Association (EIA) that specify the electrical char-
acteristics of transceivers used in differential data transmission.
Twisted pair is the transmission line of choice for RS-485
communications. Twisted pair cable tends to cancel common-
mode noise and causes cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.
An RS-485 transmission line can have as many as 32 trans-
ceivers on the bus. Only one driver can transmit at a time, but
multiple receivers may be enabled simultaneously.
The RS-422 standard specifies data rates of up to 10 MBaud and
line lengths of up to 4000 feet. A single driver can drive a trans-
mission line with as many as 10 receivers.
As with any transmission line, it is important to minimize
reflections. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic
impedance of the line. Keep stub lengths of the main line as
short as possible. A properly terminated transmission line
appears purely resistive to the driver.
The RS-485 standard addresses true multipoint communications.
This standard meets or exceeds all of the requirements of RS-422,
and it allows as many as 32 drivers and 32 receivers to connect
to a single bus. An extended common-mode range of −7 k to
+12 k is defined. The most significant difference between the
RS-422 and the RS-485 is that the drivers with RS-485 can be
disabled, allowing more than one driver to be connected to a
single line, with as many as 32 drivers connected to a single line.
Only one driver should be enabled at a time, but the RS-485
standard contains additional specifications to guarantee device
safety in the event of line contention.
TYPICAL APPLICATIONS
Figure 29 shows a typical configuration for a full-duplex point-
to-point application using the ADM1490E. Figure 30 shows a
typical configuration for a full-duplex multipoint application
using the ADM1491E. To minimize reflections, the lines must
be terminated at the receiving end in its characteristic impedance,
and stub lengths off the main line must be ꢀept as short as possible.
V
V
CC
CC
V
CC
ADM1490E
ADM1490E
A
B
Z
Y
Z
R
RO
DI
D
R
T
V
CC
B
A
R
T
D
DI
R
RO
Y
GND
GND
NOTES
1. MAXIMUM NUMBER OF NODES = 32.
Figure 29. Typical Point-to-Point Full-Duplex Application
Rev. B | Page 12 of 16
ADM1490E/ADM1491E
MAXIMUM NUMBER OF NODES = 32
V
T
CC
MASTER
R
SLAVE
A
B
Z
Y
RO
RE
DE
DI
D
DI
R
Z
DE
RE
RO
V
CC
B
A
R
T
D
R
Y
ADM1491E
ADM1491E
A
B
Z
Y
A
B
Z
Y
SLAVE
SLAVE
ADM1491E
ADM1491E
R
R
D
D
RO RE DE DI
RO RE DE DI
NOTES
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
T
Figure 30. Typical RS-485 Full-Duplex Application
Rev. B | Page 13 of 16
ADM1490E/ADM1491E
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
45°
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 31. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
3.10
3.00
2.90
10
6
5.15
4.90
4.65
3.10
3.00
2.90
1
5
PIN 1
0.50 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.05
0.33
0.17
SEATING
PLANE
0.23
0.08
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 32. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
Rev. B | Page 14 of 16
ADM1490E/ADM1491E
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 33. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 34. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Pacꢀage
Option
Model
ADM1490EBRZ1
Pacꢀage Description
Branding
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
8-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
8-Lead Mini Small Outline Package [MSOP]
R-8
R-8
RM-8
RM-8
ADM1490EBRZ-REEL71
ADM1490EBRMZ1
ADM1490EBRMZ-REEL71
ADM1491EBRZ1
ADM1491EBRZ-REEL71
ADM1491EBRMZ1
ADM1491EBRMZ-REEL71
F0E
F0E
8-Lead Mini Small Outline Package [MSOP]
14-Lead Standard Small Outline Package, Narrow Body [SOIC_N] R-14
14-Lead Standard Small Outline Package, Narrow Body [SOIC_N] R-14
10-Lead Mini Small Outline Package [MSOP]
10-Lead Mini Small Outline Package [MSOP]
RM-10
RM-10
F0D
F0D
1 Z = RoHS Compliant Part.
Rev. B | Page 15 of 16
ADM1490E/ADM1491E
NOTES
©2008–2009 Analog Devices, Inc. All rights reserved. Trademarꢀs and
registered trademarꢀs are the property of their respective owners.
D07430-0-7/09(B)
Rev. B | Page 16 of 16
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