ADM203JN [ADI]
High Speed, +5 V, 0.1 uF CMOS RS-232 Driver/Receivers; 高速，+ 5 V， 0.1 uF的CMOS RS - 232驱动器/接收器
| 型号： | ADM203JN |
| 厂家： | 
ADI |
| 描述： | High Speed, +5 V, 0.1 uF CMOS RS-232 Driver/Receivers |
| 文件： | 总6页 (文件大小：308K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Speed, +5 V, 0.1 F
CMOS RS-232 Driver/Receivers
a
ADM202/ADM203
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
120 kB Transmission Rate
ADM202: Small (0.1 F) Charge Pump Capacitors
ADM203: No External Capacitors Required
Single 5 V Power Supply
Meets EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters
؎9 V Output Swing with +5 V Supply
Low Power BiCMOS: 2.0 mA ICC
؎30 V Receiver Input Levels
+5V INPUT
0.1µF
6.3V
C1+
C1–
C2+
1
3
V
16
2
+5V TO +10V
VOLTAGE
DOUBLER
CC
0.1µF
6.3V
0.1µF
6.3V
V+
4
5
+10V TO –10V
VOLTAGE
INVERTER
V–
0.1µF
16V
6
0.1µF
16V
C2–
11
10
14
7
T1
T2
T1
T2
R1
T1
IN
OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
*
T2
IN
OUT
12
9
R1
R1
13
8
OUT
IN
IN
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
R2
R2
R2
OUT
GND
15
ADM202
+5V INPUT
GENERAL DESCRIPTION
7
The ADM202/ADM203 is a two-channel RS-232 line driver/
receiver pair designed to operate from a single +5 V power sup-
ply. A highly efficient on-chip charge pump design permits
RS-232 levels to be developed using charge pump capacitors as
small as 0.1 µF. The capacitors are internal to the package on
the ADM203 so no external capacitors are required. These con-
verters generate ±10 V RS-232 output levels.
V
CC
2
1
5
T1
T1
T2
T1
T2
IN
OUT
TTL/CMOS
RS-232
OUTPUTS
INPUTS
*
18
T2
IN
OUT
R1
R1
R1
4
3
OUT
IN
IN
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
R2
20
19
R2
R2
OUT
The ADM202/ADM203 meets or exceeds the EIA-232-E and
V.28 specifications. Fast driver slew rates permit operation up to
120 kB while high drive currents allows for extended cable
lengths.
DO NOT MAKE
CONNECTIONS TO
THESE PINS
8
C1+
11
15
10
16
C2+
C2+
C1–
V–
13
12
INTERNAL
–10V POWER
SUPPLY
An epitaxial BiCMOS construction minimizes power consump-
tion to 10 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
continuous voltages in excess of ±30 V. In addition, all pins
contain ESD protection to levels greater than 2 kV.
C2–
C2–
ADM203
V–
17
14
INTERNAL
+10V POWER
SUPPLY
V+
GND
6
GND
9
The ADM202 is available in 16-lead DIP and both narrow and
wide SOIC packages. The ADM203 is available in a 20-pin DIP
package.
*
INTERNAL 400k PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5k PULL-DOWN RESISTOR ON EACH RS-232 INPUT
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
(VCC = +5 V ؎ 10%, (ADM202 C1–C4 = 0.1 F. All Specifications
MIN to TMAX, unless otherwise noted)
T
ADM202/ADM203–SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Conditions/Comments
Output Voltage Swing
±5
±9
V
VCC = 5 V ± 5%, T1OUT, T2OUT Loaded with
3 kΩ to GND
Output Voltage Swing
±5
±9
V
VCC = 5 V ± 10%, TA = +25°C, T1OUT, T2OUT
Loaded with 3 kΩ to GND
V
CC Power Supply Current.
1.5
3.0
2
4
0.8
mA
mA
V
V
µA
V
V
V
V
kΩ
V
No Load, T1IN, T2lN = VCC
No Load, T1IN, T2IN = GND
TIN
TIN
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
RS-232 Input Voltage Range
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
2.0
10
25
+30
TIN = 0 V
–30
0.8
1.2
1.7
0.5
5
2.4
1.0
7
0.2
3
RS-232 Input Resistance
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
Propagation Delay
0.4
IOUT = 1.6 mA
IOUT = –1.0 mA
RS-232 to TTL
CL = 10 pF, RL = 3–7 kΩ, TA = +25°C
RL = 3 kΩ, CL= 2500 pF
Measured from +3 V to –3 V or –3 V to +3 V
RL = 3 kΩ, CL = 1 nF
3.5
V
µs
V/µs
V/µs
0.5
25
5
5
30
Instantaneous Slew Rate1
Transition Region Slew Rate
Baud Rate
Output Resistance
120
300
kB
Ω
VCC = V+ = V– = 0 V, VOUT = ±2 V
RS-232 Output Short Circuit Current
±10
±60
mA
NOTE
1Sample tested to ensure compliance.
Specifications subject to change without notice.
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . .0°C to +70°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2000 V
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±30 V
Output Voltages
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
TOUT . . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, – 0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation
ORDERING GUIDE
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890 mW
Thermal Impedance
Model
Temperature Range
Package Option
ADM202JN
ADM202JRN
ADM202JRW
ADM203JN
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
N-16
R-16N
R-16W
N-20
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
–2–
REV. 0
ADM202/ADM203
PIN CONFIGURATIONS
DIP/SOIC
+5V INPUT
0.1µF
6.3V
C1+
C1–
C2+
1
3
V
16
2
+5V TO +10V
VOLTAGE
DOUBLER
CC
0.1µF
6.3V
0.1µF
6.3V
V+
C1+
V+
16
15
V
1
2
3
4
5
6
7
8
CC
4
5
+10V TO –10V
VOLTAGE
INVERTER
GND
V–
0.1µF
16V
6
0.1µF
16V
C1–
14 T1
13 R1
12 R1
C2–
OUT
C2+
C2–
V–
ADM202
Top View
(Not to Scale)
IN
11
10
14
7
T1
T2
T1
T2
R1
T1
IN
OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
OUT
*
11
10
9
T1
T2
T2
IN
IN
OUT
T2
OUT
IN
12
9
R1
R1
13
8
OUT
IN
IN
RS-232
INPUTS**
R2
R2
TTL/CMOS
OUTPUTS
IN
OUT
R2
R2
R2
OUT
GND
15
ADM202
DIP
+5V INPUT
T2
1
2
20
19
R2
IN
OUT
7
T1
R1
R2
V
IN
IN
CC
2
1
5
3
18 T2
T1
IN
T1
T2
T1
T2
OUT
OUT
OUT
TTL/CMOS
RS-232
OUTPUTS
INPUTS
*
V–
R1
4
17
16
15
14
13
12
11
IN
18
T2
IN
OUT
ADM203
Top View
(Not to Scale)
T1
5
C2–
C2+
V+
OUT
R1
R1
R1
4
6
3
GND
OUT
IN
IN
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
V
7
CC
R2
20
19
R2
R2
OUT
8
C1+
C1–
V–
DO NOT MAKE
CONNECTIONS TO
THESE PINS
8
C1+
GND
9
11
15
10
16
C2+
C2+
C1–
V–
13
12
10
C2–
C2+
INTERNAL
–10V POWER
SUPPLY
C2–
C2–
ADM203
V–
17
14
INTERNAL
+10V POWER
SUPPLY
V+
GND
6
GND
9
*
INTERNAL 400k PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5k PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 1. Typical Operating Circuits
PIN FUNCTION DESCRIPTION
Mnemonic
Function
Power Supply Input 5 V ± 10%.
Internally Generated Positive Supply (+10 V nominal).
Internally Generated Negative Supply (–10 V nominal).
Ground Pin. Must be connected to 0 V.
VCC
V+
V–
GND
C1+
ADM202 External Capacitor, (+ terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (– terminal) is connected to this pin.
C1–
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (+ terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (– terminal) is connected to this pin.
C2+
C2–
ADM203: The capacitor is connected internally and no external capacitor is required.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is
connected on each input.
TIN
TOUT
REV. 0
Transmitter (Driver) Outputs. These are RS-232 levels (typically ±10 V).
–3–
ADM202/ADM203
RIN
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is
connected on each of these inputs.
ROUT
Receiver Outputs. These are TTL/CMOS levels.
GENERAL INFORMATION
The ADM202/ADM203 is an RS-232 drivers/receivers designed
to solve interface problems by meeting the EIA-232E specifica-
tions while using a single digital +5 V supply. The EIA standard
requires transmitters that will deliver ±5 V minimum on the
transmission channel and receivers that can accept signal levels
down to ±3 V. The parts achieve this by integrating step up
voltage converters and level shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the
power dissipation to an absolute minimum.
S1
S2
S3
S4
V+
GND
FROM
VOLTAGE
DOUBLER
C2
C4
GND
V– = – (V+)
INTERNAL
OSCILLATOR
Figure 3. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is ±9 V. Even under worst case
conditions the drivers are guaranteed to meet the ±5 V
EIA-232-E minimum requirement.
The ADM203 uses internal capacitors and, therefore, no exter-
nal capacitors are required.
The ADM202 contains an internal voltage doubler and a voltage
inverter which generates ±10 V from the +5 V input. External
0.1 µF capacitors are required for the internal voltage converter.
The ADM202/ADM203 is a modification, enhancement and
improvement to the AD230–AD241 family and derivatives
thereof. It is essentially plug-in compatible and does not have
materially different applications.
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
CC = 5 V the switching threshold is 1.25 V typical. Unused
V
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
CIRCUIT DESCRIPTION
The internal circuitry consists of three main sections. These are
As required by the EIA-232-E standard the slew rate is limited
to less than 30 V/µs without the need for an external slew limiting
capacitor and the output impedance in the power-off state is
greater than 300 Ω.
(a) A Charge Pump Voltage Converter
(b) RS-232 to TTL/CMOS Receivers
(c) TTL/CMOS to RS-232 Transmitters
Receiver Section
The receivers are inverting level shifters that accept EIA-232-E
input levels (±5 V to ±15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
±30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the ±3 V EIA-232
requirement. The low level threshold is deliberately positive as it
ensures that an unconnected input will be interpreted as a low
level.
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ±10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated below. First, the 5 V
input supply is doubled to 10 V using capacitor C1 as the
charge storage element. The 10 V level is then inverted to gen-
erate –10 V using C2 as the storage element.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies. On the ADM203, all capaci-
tors C1 to C4 are molded into the package.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error free reception both for noisy inputs
and for inputs with slow transition times.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
S1
S3
V
V+ = 2V
CC
CC
C1
C3
S2
S4
GND
V
CC
INTERNAL
OSCILLATOR
Figure 2. Charge Pump Voltage Doubler
–4–
REV. 0
Typical Performance Characteristics–ADM202/ADM203
10
8
8
V
= 5V
CC
7
6
5
4
3
V
(1 O/P LOADED)
OUT
V+
6
V–
4
V
(ALL O/Ps LOADED)
OUT
2
0
0
10
20
– mA
30
40
3
4
5
6
I
V
– V
OUT
CC
Figure 4. Charge Pump V+, V– vs. Current
Figure 7. Transmitter Output Voltage vs. VCC
30
12
V
= 5V
V
= 5V
CC
CC
Ω
R
= 3k
L
25
20
15
10
5
10
8
f = 10kHz
TOUT HIGH
LOW TO HIGH SLEW RATE
6
4
TOUT LOW
HIGH TO LOW SLEW RATE
2
0
0
0
500
1k
1.5k
2k
2.5k
3k
0
2
4
6
8
10
CAPACITIVE LOAD – pF
I
– mA
OUT
Figure 5. Transmitter Slew Rate vs. Load Capacitance
Figure 8. Transmitter Output Voltage vs. Current
A1
3.6 V
A1
3.6 V
100
90
100
90
10
0%
10
0%
5v
5µs
5V
5v
1µs
5V
Figure 6. Transmitter Fully Loaded Slew Rate
Figure 9. Transmitter Unloaded Slew Rate
REV. 0
–5–
ADM202/ADM203
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Plastic DIP
(N-16)
16
1
9
0.280 (7.11)
0.240 (6.10)
PIN 1
8
0.325 (8.25)
0.300 (7.62)
0.840 (21.33)
0.745 (18.93)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
16-Lead Narrow SOIC
(R-16N)
0.2440 (6.20)
16
9
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
8
1
0.0196 (0.50)
0.0099 (0.25)
0.3937 (10.00)
0.3859 (9.80)
× 45
°
0.0688 (1.75)
0.0098 (0.25)
0.0040 (0.10)
0.0532 (1.35)
0.0099 (0.25)
0.0075 (0.19)
0° – 8°
SEATING
PLANE
0.0500 (1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0500 (1.27)
0.0160 (0.41)
16-Lead Wide SOIC
(R-16W)
20-Pin Plastic DIP
(N-20)
20
11
0.280 (7.11)
0.240 (6.10)
9
16
PIN 1
10
1
0.299 (7.60)
0.291 (7.40)
1.060 (26.90)
0.925 (23.50)
0.325 (8.25)
0.300 (7.62)
0.419 (10.65)
0.404 (10.26)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
PIN 1
8
1
0.150
(3.81)
0.015 (0.381)
0.008 (0.204)
0.200 (5.05)
0.125 (3.18)
0.107 (2.72)
0.089 (2.26)
0.413 (10.50)
0.348 (10.10)
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.070 (1.78)
0.045 (1.15)
0.364 (9.246)
0.344 (8.738)
0.045 (1.15)
0.020 (0.50)
0.010 (0.25)
0.004 (0.10)
0.018 (0.46)
0.014 (0.36)
0.015 (0.38)
0.007 (1.18)
0.050 (1.27)
BSC
–6–
REV. 0
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