ADM206EARZ [ADI]
暂无描述;型号: | ADM206EARZ |
厂家: | ADI |
描述: | 暂无描述 驱动器 |
文件: | 总12页 (文件大小:488K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
0.1 F, +5 V Powered
CMOS RS-232 Drivers/Receivers
a
ADM205–ADM211/ADM213
TYPICAL OPERATING CIRCUIT
FEATURES
0.1 F to 10 F Capacitors
120 kB/s Data Rate
+5V INPUT
12 C1+
14 C1–
VCC 11
2 Receivers Active in Shutdown (ADM213)
On-Board DC-DC Converters
؎9 V Output Swing with +5 V Supply
Low Power (15 mW)
+5V TO +10V
VOLTAGE
DOUBLER
0.1µF
0.1µF
0.1µF
6.3V
16V
13
17
V+
V–
15 C2+
16 C2–
+10V TO –10V
VOLTAGE
INVERTER
0.1µF
16V
0.1µF
16V
Low Power Shutdown ≤5 W
؎30 V Receiver Input Levels
Latch-Up FREE
T1IN
T2
T1 OUT
T2 OUT
T3 OUT
T1
2
3
7
6
T2
N
I
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
Plug-In Upgrade for MAX205-211/213
T3IN
T4
20
21
8
T3
1
28
9
T4
T4 OUT
R1 IN
N
I
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
R1
R1 OUT
5
4
R2 IN
R2
R2 OUT
R3 OUT
R4 OUT
R5 OUT
EN
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
26
R3
27
23
18
25
R3 IN
R4 IN
22
19
24
R4
R5
R5 IN
SD
GND
10
ADM211
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
GENERAL DESCRIPTION
active-high receiver enable control. Two receivers of the
ADM213 remain active during shutdown. This feature is useful
for ring indicator monitoring.
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in
applications where ±12 V is not available. The ADM205,
ADM206, ADM211 and ADM213 feature a low power shut-
down mode which reduces power dissipation to less than 5 µW
making them ideally suited for battery powered equipment. The
ADM205 does not require any external components and is par-
ticularly useful in applications where printed circuit board space
is critical. The ADM213 has an active-low shutdown and an
All members of the ADM2xx family, except the ADM209, in-
clude two internal charge pump voltage converters which allow
operation from a single +5 V supply. These converters convert
the +5 V input power to the ±10 V required for RS-232 output
levels. The ADM209 is designed to operate from +5 V and
+12 V supplies. An internal +12 V to –12 V charge pump volt-
age converter generates the –12 V supply.
Table I. Selection Table
No. of
RS-232
No. of
RS-232
Low Power
Shutdown
(SD)
TTL
Three-State
EN
No. of Receivers
Active in
Shutdown
Part
Power
External
Number Supply Voltage
Drivers Receivers Capacitors
ADM205 +5 V
ADM206 +5 V
ADM207 +5 V
ADM208 +5 V
ADM209 +5 V & +9 V to +13.2 V
ADM211 +5 V
ADM213 +5 V
5
4
5
4
3
4
4
5
3
3
4
5
5
5
None
Yes
Yes
No
No
No
Yes
Yes (SD)
Yes
Yes
No
No
Yes
Yes
Yes (EN)
0
0
0
0
0
0
2
4
4
4
2
4
4
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1994
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
(VCC = +5 V ؎ 10% (206, 207, 208, 2O9,
211, 213); VCC = +5 V ؎ 5% (ADM205);
V+ = +9 V to +13.2 V (ADM209); C1–C4 = 0.1 F Ceramic. All Specifications TMIN to TMAX unless otherwise noted.)
ADM205–ADM211/ADM213–SPECIFICATIONS
Parameter
Min
Typ
Max
Units Test Conditions/Comments
Output Voltage Swing
±5
±9
Volts
All Transmitter Outputs Loaded with 3 kΩ to
Ground
V
CC Power Supply Current
3
5
0.4
3.5
1
7
9
1
5
5
0.8
mA
mA
mA
mA
µA
V
V
µA
V
V
V
V
kΩ
V
No Load, ADM206, ADM211, ADM213
No Load, ADM205, ADM207, ADM208
No Load, ADM209
V+ Power Supply Current
Shutdown Supply Current
No Load, V+ = 12 V ADM209 Only
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
RS-232 Input Voltage Range
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
TIN, EN, SD, EN, SD
TIN, EN, SD, EN, SD
TIN = 0 V
2.0
10
25
+30
–30
0.8
1.2
1.7
0.5
5
2.4
1.0
7
0.2
3
RS-232 Input Resistance
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
TTL/CMOS Output Leakage Current
0.4
IOUT = 1.6 mA
IOUT = –1.0 mA
EN = VCC, EN = 0 V, 0 V ≤ ROUT ≤ VCC
ADM205, ADM206, ADM209, ADM211
(Figure 25. CL = 150 pF)
3.5
V
µA
ns
0.05
115
±5
Output Enable Time (TEN
)
Output Disable Time (TDIS
)
165
ns
ADM205, ADM206, ADM209, ADM211
(Figure 25. RL = 1 kΩ)
Propagation Delay
0.5
25
6
5
30
µs
V/µs
V/µs
RS-232 to TTL
CL = 10 pF, RL = 3-7 kΩ, TA = +25°C
RL = 3 kΩ, CL = 2500 pF
Instantaneous Slew Ratel
Transition Region Slew Rate
3
Measured from +3 V to –3 V or –3 V to +3 V
Output Resistance
300
Ω
VCC = V+ = V– = 0 V, VOUT = ±2 V
RS-232 Output Short Circuit Current
±12
±60
mA
NOTE
1Sample tested to ensure compliance.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
Thermal Impedance, θJA
(TA = +25°C unless otherwise noted)
N-24 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N-24A DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
R-24 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
R-28 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
RS-28 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-14 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Q-16 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-20 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
D-24 Ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Operating Temperature Range
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . (V+, + 0.3 V) to (V–, –0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation
Industrial (A Version) . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . . . +300°C
Vapour Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2000 V
N-24 DIP (Derate 13.5 mW/°C above +70°C) . . .1000 mW
N-24A DIP (Derate 13.5 mW/°C above +70°C) . . 500 mW
R-24 SOIC (Derate 12 mW/°C above +70°C) . . . . .850 mW
R-28 SOIC (Derate 12.5 mW/°C above +70°C) . . 900 mW
RS-28 SSOP (Derate 10 mW/°C above +70°C) . . . .900 mW
Q-24 Cerdip (Derate 12.5 mW/°C above +70°C) .1000 mW
D-24 Ceramic (Derate 20 mW/°C above +70°C) . .1000 mW
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
–2–
REV. 0
ADM205–ADM211/ADM213
ORDERING GUIDE
Temperature
Range
Package
Option* Model
Temperature
Range
Package
Option* Model
Temperature
Range
Package
Option*
Model
ADM205
ADM206
ADM207
ADM205AN –40°C to +85°C N-24A
ADM206AN –40°C to +85°C N-24
ADM206AR –40°C to +85°C R-24
ADM206ARS –40°C to +85°C RS-24
ADM207AN –40°C to +85°C N-24
ADM207AR –40°C to +85°C R-24
ADM207ARS –40°C to +85°C RS-24
ADM208
ADM209
ADM211
ADM208AN –40°C to +85°C N-24
ADM208AR –40°C to +85°C R-24
ADM208ARS –40°C to +85°C RS-24
ADM209AN –40°C to +85°C N-24
ADM209AR –40°C to +85°C R-24
ADM209ARS –40°C to +85°C RS-24
ADM211AR –40°C to +85°C R-28
ADM211ARS –40°C to +85°C RS-28
ADM213
ADM213AR –40°C to +85°C R-28
ADM213ARS –40°C to +85°C RS-28
*N = Plastic DIP; R = Small Outline IC (SOIC); RS = Small Shrink Outline Package (SSOP).
+5V INPUT
24
23
22
21
20
19
0.1µF
1
2
3
4
5
6
7
T4
T3
T1
T2
R3
R3
T5
OUT
IN
12
OUT
OUT
V
CC
OUT
OUT
IN
T1
T2
3
8
T1
T2
T3
T4
T5
T1
T2
T3
T4
IN
IN
OUT
OUT
OUT
OUT
SD
EN
T5
4
2
1
R2
7
15
16
22
9
IN
R2
T2
ADM205
Top View
(Not to Scale)
OUT
OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
T3
T4
IN
IN
*
18
17
16
15
14
13
R4
R4
T4
T3
R5
R5
IN
IN
8
T1
OUT
IN
IN
9
R1
OUT
T5
19
10
5
T5
IN
OUT
10
11
12
R1
IN
IN
R1
R2
R1
R1
R2
R3
R4
IN
IN
OUT
OUT
OUT
OUT
GND
OUT
IN
V
6
CC
R2
R3
R4
R5
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
24
18
23
17
14
R3
R4
Figure 1. ADM205 DIP Pin Configuration
IN
IN
R5
13
21
R5
IN
OUT
EN
20
SD
GND
11
ADM205
*
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 2. ADM205 Typical Operating Circuit
REV. 0
–3–
ADM205–ADM211/ADM213
T3
T1
T2
24 T4
23 R2
22 R2
1
2
3
4
5
6
24
23
T3
T1
T2
1
2
3
4
5
6
7
T4
R2
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
22 R2
OUT
OUT
OUT
R1
21
20
T5
T5
R1
21 SD
20 EN
19 T4
IN
IN
IN
R1
R1
OUT
OUT
OUT
IN
T2
IN
19 T4
T3
T2
IN
ADM207
Top View
(Not to Scale)
ADM206
Top View
(Not to Scale)
IN
T1
IN
7
8
18
T3
T1
IN
18
IN
IN
GND
17 R3
16 R3
GND
17 R3
16 R3
15 V–
8
9
OUT
OUT
V
9
V
CC
IN
CC
IN
C1+
V–
10
15
14
13
C1+
10
C2–
C2+
V+ 11
C1–
V+ 11
14 C2–
C2+
13
12
C1– 12
Figure 3. ADM206 DIP/SOIC/SSOP Pin Configuration
Figure 5. ADM207 DIP/SOIC/SSOP Pin Configuration
+5V INPUT
+5V INPUT
10
12
13
14
V
C1+
C1–
C2+
9
+5V TO +10V
VOLTAGE
DOUBLER
CC
0.1µF
6.3V
0.1µF
6.3V
0.1µF
10
12
9
C1+
C1–
V
CC
+5V TO +10V
VOLTAGE
DOUBLER
0.1µF
6.3V
0.1µF
6.3V
V+ 11
0.1µF
V+ 11
+10V TO –10V
VOLTAGE
INVERTER
0.1µF
16V
15
V–
0.1µF
16V
C2+
C2–
13
14
+10V TO –10V
VOLTAGE
INVERTER
0.1µF
16V
C2–
V– 15
0.1µF
16V
T1
T2
T3
T4
7
6
2
3
T1
T1
T2
T3
T4
IN
IN
IN
IN
IN
OUT
T1
T2
T3
7
2
3
T1
T1
T2
T3
IN
IN
IN
IN
OUT
T2
OUT
T2
6
18
19
5
OUT
TTL/CMOS
INPUTS
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
RS-232
OUTPUTS
18
19
1
T3
T4
OUT
*
1
24
4
T3
T4
OUT
24
OUT
T4
T4
R1
OUT
20
4
21
5
T5
T5
T5
R1
OUT
R1
R1
R2
OUT
OUT
IN
IN
R1
R1
R2
OUT
OUT
IN
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
22
23
R2
R3
R2
R3
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
23
R2
R3
22
R2
R3
R3
17
20
16
21
IN
OUT
EN
R3
17
16
IN
OUT
SD
GND
ADM206
GND
ADM207
8
8
*
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 4. ADM206 Typical Operating Circuit
Figure 6. ADM207 Typical Operating Circuit
–4–
REV. 0
ADM205–ADM211/ADM213
24
23
T2
T1
1
2
3
4
5
6
7
T3
R3
R1
24 T1
23 T2
1
2
3
4
5
6
OUT
OUT
OUT
IN
R1
OUT
IN
IN
IN
R2
22 R3
22 R2
GND
IN
OUT
OUT
R2
21
T4
V
21
R2
T2
OUT
CC
IN
IN
T1
IN
20
T4
20
V+
C+
OUT
OUT
OUT
R1
19 T3
ADM208
Top View
(Not to Scale)
19 T1
ADM209
Top View
(Not to Scale)
OUT
IN
T2
R1
18
R3
C–
V–
7
8
18
IN
IN
IN
GND
17 R4
16 R4
15 V–
8
9
17 R3
16 T3
OUT
OUT
V
R5
IN
9
CC
IN
IN
C1+
10
NC
R5
10
11
12
15
14
13
OUT
OUT
V+ 11
14 C2–
C2+
13
R4
EN
T3
C1– 12
R4
IN
OUT
NC = NO CONNECT
Figure 7. ADM208 DIP/SOIC/SSOP Pin Configuration
Figure 9. ADM209 DIP/SOIC/SSOP Pin Configuration
+5V INPUT
+5V INPUT
0.1µF
10
12
13
14
VCC
9
C1+
C1–
C2+
+5V TO +10V
VOLTAGE
DOUBLER
V
4
5
8
CC
0.1µF
6.3V
0.1µF
6.3V
6
7
0.1µF
C1+
C1–
+12V TO –12V
VOLTAGE
INVERTER
0.1µF
16V
+9V TO +13.2V
INPUT
V+
V–
V+ 11
V– 15
+10V TO –10V
VOLTAGE
INVERTER
0.1µF
16V
0.1µF
16V
0.1µF
16V
C2–
T1
T2
24
23
19
20
13
2
T1
T1
T2
T3
R1
R2
IN
IN
IN
OUT
T1IN
5
2
1
T1OUT
T1
T2
T3
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T2
OUT
*
18
T2IN
T3IN
T2OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
T3
16
1
T3
OUT
*
24
20
7
19
21
6
T3OUT
T4OUT
R1IN
R1
R1
R2
OUT
OUT
IN
IN
T4IN
R1OUT
R2OUT
T4
R1
21
R2
22
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
18
12
R3
R4
17
11
R3
R4
R3
R4
OUT
OUT
IN
IN
R2IN
4
3
R2
R3
R3
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
22
17
23
16
R3IN
R4IN
R3OUT
R4OUT
10
14
R5
R5
9
R5
IN
OUT
EN
15
NC
GND
ADM209
GND
ADM208
3
8
*
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
*
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 10. ADM209 Typical Operating Circuit
Figure 8. ADM208 Typical Operating Circuit
REV. 0
–5–
ADM205–ADM211/ADM213
1
2
28
27
26
25
T3
T1
T2
T4
R3
R3
OUT
OUT
OUT
OUT
1
2
28 T4
T3
T1
OUT
OUT
OUT
IN
R3
R3
27
26
25
IN
3
OUT
T2
3
OUT
OUT
R2
4
SD
IN
R2
SD
4
IN
R2
5
24 EN
23 R4
OUT
R2
5
24 EN
23 R4
OUT
T2
IN
6
*
IN
T2
IN
6
IN
T1
IN
7
22 R4
*
*
ADM213
Top View
(Not to Scale)
OUT
IN
T1
IN
7
22 R4
21 T4
ADM211
Top View
(Not to Scale)
OUT
IN
T4
T3
R5
R1
8
21
20
19
OUT
R1
8
OUT
R1
IN
9
IN
R1
IN
9
T3
R5
20
19
IN
10
11
12
GND
OUT
10
11
12
13
GND
OUT
IN
V
18 R5
17 V–
*
CC
IN
V
18 R5
17 V–
CC
C1+
C1+
V+
V+ 13
16 C2–
15 C2+
16 C2–
15 C2+
C1– 14
C1– 14
* ACTIVE IN SHUTDOWN
Figure 11. ADM211 SOIC/SSOP Pin Configuration
Figure 13. ADM213 SOIC/SSOP Pin Configuration
+5V INPUT
+5V INPUT
11
13
12
14
V
CC
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
0.1µF
16V
0.1µF
6.3V
0.1µF
11
13
12
14
V
CC
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
0.1µF
16V
V+
0.1µF
6.3V
0.1µF
V+
C2+
C2–
15
16
+10V TO –10V
VOLTAGE
INVERTER
17
V–
0.1µF
16V
0.1µF
16V
C2+
C2–
15
16
+10V TO –10V
VOLTAGE
INVERTER
17
V–
0.1µF
16V
0.1µF
16V
T1
T2
T3
T4
R1
T1
T2
T3
2
3
T1
7
6
IN
IN
IN
OUT
OUT
OUT
OUT
T1
T2
T3
T4
R1
T1
T2
T3
2
3
T1
7
6
IN
IN
IN
OUT
OUT
OUT
OUT
T2
T3
T4
TTL/CMOS
INPUTS
T2
T3
T4
RS-232
OUTPUTS
*
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
1
20
21
8
1
20
21
8
28
9
T4
R1
IN
28
9
T4
R1
IN
R1
R2
OUT
OUT
IN
IN
R1
R2
OUT
OUT
OUT
OUT
IN
IN
R2
R3
4
5
R2
R3
R4
R5
R2
R3
R4
4
5
R2
R3
R4
R5
26
27
23
R3
OUT
OUT
IN
26
27
23
R3
R4
IN
IN
RS-232
INPUTS**
TTL/CMOS R4
OUTPUTS
***
***
R4 ***
IN
22
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
22
R5
18
25
R5 ***
IN
OUT
EN
19
24
18
25
R5
SD
19
24
R5
IN
OUT
EN
SD
ADM213
GND
10
ADM211
GND
10
*
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
** INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
*** ACTIVE IN SHUTDOWN
Figure 14. ADM213 Typical Operating Circuit
Figure 12. ADM211 Typical Operating Circuit
–6–
REV. 0
ADM205–ADM211/ADM213
PIN FUNCTION DESCRIPTION
Mnemonic
VCC
Function
Power Supply Input 5 V ± 10% (+5 V ± 5% ADM205).
V+
Internally generated positive supply (+10 V nominal) on all parts except ADM209.
ADM209 requires external 9 V to 13.2 V supply.
V–
Internally generated negative supply (–10 V nominal).
GND
C+
Ground pin. Must be connected to 0 V.
(ADM209 only) External capacitor (+ terminal) is connected to this pin.
C–
(ADM209 only) External capacitor (– terminal) is connected to this pin.
C1+
C1–
C2+
C2–
TIN
(ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
(ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
(ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
(ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to Vcc is
connected on each input.
TOUT
RIN
Transmitter (Driver) Outputs. These are RS-232 levels (typically ±10 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is con-
nected on each input.
ROUT
Receiver Outputs. These are TTL/CMOS levels.
EN/EN
Enable Input. Active low on ADM205, ADM206, ADM209, ADM211. Active high on ADM213. This input is
used to enable/disable the receiver outputs. With EN = Low (EN = High ADM213), the receiver outputs are en-
abled. With EN =High (EN = low ADM213), the outputs are placed in a high impedance state. This facility is
useful for connecting to microprocessor systems.
SD/SD
Shutdown Input. Active high on ADM205, ADM206, ADM211. Active low on ADM213. With SD = high on the
ADM205, ADM206, ADM211, the charge pump is disabled, the receiver outputs are placed in a high impedance
state and the driver outputs are turned off. With SD low on the ADM213, the charge pump is disabled, the driver
outputs are turned off and all receivers except R4 and R5 are placed in a high impedance state. In shutdown, the
power consumption reduces to 5 µW.
NC
No Connect. No connections are required to this pin.
Table II. ADM205, ADM206, ADM211 Truth Table
SD
EN
Status
Transmitters T1–T5
Receivers R1–R5
0
0
1
0
1
0
Normal Operation
Normal Operation
Shutdown
Enabled
Enabled
Disabled
Enabled
Disabled
Disabled
Table III. ADM213 Truth Table
Transmitters T1-T4 Receivers R1-R3
SD
EN
Status
Receivers R4, R5
0
0
1
1
0
1
0
1
Shutdown
Shutdown
Normal Operation
Normal Operation
Disabled
Disabled
Enabled
Enabled
Disabled
Disabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
REV. 0
–7–
ADM205–ADM211/ADM213–Typical Performance Characteristics
10
10
V+
8
6
4
2
0
VOUT (1 O/P LOADED)
| V– |
8
6
4
VOUT (ALL O/Ps LOADED)
0
10
20
— mA
30
40
3.0
4.0
5.0
I
VCC – V
OUT
Figure 15. Charge Pump V+, V– vs. Current
Figure 17. Transmitter Output Voltage vs. VCC
18
16
14
12
10
8
12
10
T
HIGH
OUT
8
6
4
2
0
T
LOW
OUT
6
4
0
500
1000
1500
2000
2500
0
2
4
– mA
6
8
I
CAPACITIVE LOAD – pF
OUT
Figure 16. Transmitter Slew Rate vs. Load Capacitance
Figure 18. Transmitter Output Voltage vs. Current
300
200
100
V– (UNLOADED)
V– (LOADED)
V+ (UNLOADED)
V+ (LOADED)
0
3
4
5
V
– V
CC
Figure 19. Charge Pump Impedance vs. VCC
–8–
REV. 0
ADM205–ADM211/ADM213
The ADM205, ADM206, ADM211, and ADM213 are particu-
larly useful in battery powered systems as they feature a low
power shutdown mode which reduces power dissipation to less
than 5 µW.
A3
0.8 V
100
90
The ADM205 is designed for applications where space saving is
important as the charge pump capacitors are molded into the
package.
The ADM209 includes only a negative charge pump converter
and are intended for applications where a positive 12 V is available.
10
0%
w
B 5
1Ms
H
O
5V
5V
L
To facilitate sharing a common line or for connection to a mi-
croprocessor data bus the ADM205, ADM206, ADM209,
ADM211 and ADM213 feature an enable (EN) function. When
disabled, the receiver outputs are placed in a high impedance
state.
Figure 20. Charge Pump, V+, V– Exiting Shutdown
A3
0.8 V
100
90
CIRCUIT DESCRIPTION
The internal circuitry in the ADM205-ADM211 and ADM213
consists of three main sections. These are:
(a) A charge pump voltage converter
(b) RS-232 to TTL/CMOS receivers
(c) TTL/CMOS to RS-232 transmitters
10
0%
B
H
w 5
5µs
5V
O
L
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ±10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated in Figures 23 and 24.
First, the 5 V input supply is doubled to 10 V using capacitor
C1 as the charge storage element. The 10 V level is then in-
verted to generate –10 V using C2 as the storage element.
Figure 21. Transmitter Output Loaded Slew Rate
A3
0.8 V
100
90
S1
S3
V
V+ = 2V
CC
CC
C1
C3
10
S2
S4
0%
GND
V
CC
B 5
1µs
H
w
5V
O
L
INTERNAL
OSCILLATOR
Figure 22. Transmitter Output Unloaded Slew Rate
Figure 23. Charge-Pump Voltage Doubler
GENERAL INFORMATION
The ADM205-ADM211 and ADM213 family of RS-232 driv-
ers/receivers are designed to solve interface problems by meeting
the EIA-232-E specifications while using a single digital +5 V
supply. The EIA-232-E standard requires transmitters which
will deliver ±5 V minimum on the transmission channel and re-
ceivers which can accept signal levels down to ±3 V. The
ADM205-ADM211 and ADM213 meet these requirements by
integrating step up voltage converters and level shifting trans-
mitters and receivers onto the same chip. CMOS technology is
used to keep the power dissipation to an absolute minimum. A
comprehensive range of transmitter/receiver combinations is
available to cover most communications needs. The ADM205–
ADM211 and ADM213 are modifications, enhancements and
improvements to the AD230–AD241 family and derivatives
thereof. They are essentially plug-in compatible and do not have
materially different applications.
S1
S3
V+
GND
FROM
VOLTAGE
DOUBLER
C2
C4
S2
S4
GND
V– = – (V+)
INTERNAL
OSCILLATOR
Figure 24. Charge-Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external cir-
cuitry if the current requirements are small.
REV. 0
–9–
ADM205–ADM211/ADM213
Transmitter (Driver) Section
Enable Input
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is ±9 V. Even under worst case
conditions the drivers are guaranteed to meet the±5 V EIA-232-E
minimum requirement.
The ADM205, ADM209, ADM211, and ADM213 feature an
enable input used to enable or disable the receiver outputs. The
enable input is active low on the ADM205, ADM209, ADM211
and active-high on the ADM213. Refer to Tables II and III.
When disabled, all receiver outputs are placed in a high imped-
ance state. This function allows the outputs to be connected di-
rectly to a microprocessor data bus. It can also be used to allow
receivers from different devices to share a common data line.
The timing diagram for the enable function is shown in Figure
25.
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
V
CC = 5 V the switching threshold is 1.25 V typical. Unused in-
puts may be left unconnected, as an internal 400 kΩ pull-up re-
sistor pulls them high forcing the outputs into a low state.
3V
As required by the EIA-232-E standard, the slew rate is limited
to less than 30 V/µs without the need for an external slew limit-
ing capacitor and the output impedance in the power-off state is
greater than 300 Ω.
EN
*
0V
T
T
DIS
EN
Receiver Section
The receivers are inverting level shifters which acceptEIA-232-E
input levels (±5 V to ±15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
±30 V. The guaranteed switching thresholds are 0.8 V mini-
mum and 2.4 V maximum which are well within the ±3 V
EIA-232-E requirement. The low level threshold is deliberately
positive as it ensures that an unconnected input will be inter-
preted as a low level.
3.5V
0.8V
V
V
– 0.1V
+ 0.1V
OH
R
OUT
VOL
* POLARITY OF EN IS REVERSED FOR ADM213
Figure 25. Enable Timing
APPLICATION HINTS
Driving Long Cables
In accordance with the EIA-232-E standard, long cables are
permissible provided that the total load capacitance does not ex-
ceed 2500 pF. For longer cables which do exceed this, then it is
possible to trade off baud rate vs. cable length. Large load ca-
pacitances cause a reduction in slew rate, and hence the maximum
transmission baud rate is decreased. The ADM205–ADM211 and
ADM213 are designed so that the slew rate reduction with in-
creasing load capacitance is minimized.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
Shutdown (SD)
The ADM205, ADM206, ADM211 and ADM213 feature a
control input which may be used to disable the part and reduce
the power consumption to less than 5 µW. This is very useful in
battery operated systems. During shutdown the charge pump is
turned off, the transmitters are disabled and all receivers except
R4 and R5 on the ADM213 are put into a high-impedance dis-
abled state. Receivers R4 and R5 on the ADM213 remain en-
abled during shutdown. This feature allows monitoring external
activity such as ring indicator monitoring while the device is in a
low power shutdown mode. The shutdown control input is ac-
tive high on all parts except the ADM213 where it is active low.
Refer to Tables II and III.
For the receivers, it is important that a high level of noise immu-
nity be inbuilt so that slow rise and fall times do not cause mul-
tiple output transitions as the signal passes slowly through the
transition region. The ADM205–ADM211 and ADM213 have
0.5 V of hysteresis to guard against this. This ensures that, even
in noisy environments, error-free reception can be achieved.
High Baud Rate Operation
The ADM205–ADM211 and ADM213 feature high slew rates
permitting data transmission at rates well in excess of the
EIA-232-E specification. The drivers maintain ±5 V signal
levels at data rates up to 120-kB/s under worst-case loading
conditions.
–10–
REV. 0
ADM205–ADM211/ADM213
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
24-Lead Cerdip (Q-24)
24-Lead Plastic DIP (N-24)
13
24
PIN 1
0.295 (7.493)
MAX
13
24
PIN 1
0.260 ± 0.001
(6.61 ± 0.03)
1
12
12
1
0.320 (8.128)
1.290 (32.77) MAX
0.290 (7.366)
0.180
(4.572)
MAX
1.228 (31.19)
1.226 (31.14)
0.32 (8.128)
0.30 (7.62)
0.225
(5.715)
MAX
0.130 (3.30)
0.128 (3.25)
SEATING
PLANE
0.125
(3.175)
MIN
0.012 (0.305)
0.070 (1.778)
0.020 (0.508)
15
°
0.008 (0.203)
TYP
0.065 (1.651)
0.055 (1.397)
TYP
0.021 (0.533)
0.015 (0.381)
TYP
0.110 (2.794)
0.090 (2.286)
TYP
SEATING
PLANE
15
0
°
0°
0.011 (0.28)
0.009 (0.23)
0.02 (0.5)
0.016 (0.41)
0.11 (2.79)
0.09 (2.28)
0.07 (1.78)
0.05 (1.27)
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
2. CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead Plastic DIP (N-24A)
28-Lead SOIC (R-28)
13
24
24
13
0.55 (13.97)
0.53 (13.47)
PIN 1
0.299 (7.6)
0.291 (7.39)
12
1
0.414 (10.52)
1.25 (31.75)
1.24 (31.5)
0.606 (15.4)
0.594 (15.09)
PIN 1
0.398 (10.10)
12
1
0.2
(5.08)
MAX
0.16 (4.07)
0.14 (3.56)
0.175 (4.45)
0.12 (3.05)
0.096 (2.44)
0.608 (15.45)
0.089 (2.26)
15
°
0.012 (0.305)
0.008 (0.203)
0.596 (15.13)
0.03 (0.76)
0.02 (0.51)
0°
SEATING
PLANE
0.02 (0.508)
0.015 (0.381)
0.105 (2.67)
0.095 (2.42)
0.065 (1.66)
0.045 (1.15)
0.042 (1.067)
0.018 (0.447)
6
0
°
°
0.01 (0.254)
0.006 (0.15)
0.019 (0.49)
0.014 (0.35)
0.05 (1.27)
BSC
0.013 (0.32)
0.009 (0.23)
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
28-Lead SSOP (RS-28)
24
13
0.212 (5.38)
0.205 (5.207)
0.311 (7.9)
0.301 (7.64)
PIN 1
12
1
0.07 (1.78)
0.328 (8.33)
0.318 (8.08)
0.066 (1.67)
0.037 (0.94)
8°
0°
0.022 (0.559)
0.008 (0.203)
0.002 (0.050)
0.0256 (0.65)
BSC
0.009 (0.229)
0.005 (0.127)
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
REV. 0
–11–
ADM205–ADM211/ADM213
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Lead SSOP (RS-28)
28-Lead SOIC (R-28)
28
15
28
15
0.299 (7.6)
0.291 (7.39)
0.212 (5.38)
0.205 (5.207)
0.414 (10.52)
0.398 (10.10)
PIN 1
14
1
0.311 (7.9)
0.301 (7.64)
PIN 1
1
14
0.096 (2.44)
0.708 (18.02)
0.696 (17.67)
0.089 (2.26)
0.03 (0.76)
0.02 (0.51)
0.07 (1.78)
0.066 (1.67)
0.407 (10.34)
0.397 (10.08)
0.042 (1.067)
0.018 (0.457)
6
0
°
°
0.01 (0.254)
0.006 (0.15)
0.019 (0.49)
0.014 (0.35)
0.05 (1.27)
BSC
0.037 (0.94)
0.022 (0.559)
0.013 (0.32)
0.009 (0.23)
8°
0°
0.008 (0.203)
0.002 (0.050)
0.0256 (0.65)
BSC
0.009 (0.229)
0.005 (0.127)
1. LEAD NO. IDENTIFIED BY A DOT.
2. SOICLEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
–12–
REV. 0
相关型号:
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