ADM241LJRS-REEL
更新时间:2024-11-08 13:01:38
品牌:ADI
描述:IC QUAD LINE TRANSCEIVER, PDSO28, MO-150AH, SSOP-28, Line Driver or Receiver
ADM241LJRS-REEL 概述
IC QUAD LINE TRANSCEIVER, PDSO28, MO-150AH, SSOP-28, Line Driver or Receiver
ADM241LJRS-REEL 数据手册
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CMOS RS-232 Drivers/Receivers
ADM231L–ADM234L/ADM236L–ADM241L
FEATURES
ADM236L TYPICAL OPERATING CIRCUIT
Single 5 V power supply
Meets all EIA-232-E and V.28 specifications
120 kbps data rate
On-board dc-to-dc converters
9 V output swing with 5 V supply
Small 1 µF capacitors
Low power shutdown ≤1 µA
30 V receiver input levels
Latch-up free
+5V INPUT
V
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
CC
1µF
1µF
+6.3V
1µF
+6.3V
+6.3V
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1µF
+16V
1µF
+16V
T1
IN
T1
T1
T2
OUT
T2
IN
T2
OUT
TTL/CMOS
1
INPUTS
RS-232
OUTPUTS
T3
IN
T3
T3
T4
R1
R2
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
OUT
T4
IN
T4
OUT
R1
R1
IN
OUT
OUT
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R2
R3
R2
IN
2
R3
IN
R3
OUT
EN
GENERAL DESCRIPTION
SD
GND
ADM236L
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in
applications in which 12 V is not available. The ADM236L and
ADM241L feature a low power shutdown mode that reduces
power dissipation to less than 5 µW, making them ideally suited
for battery-powered equipment. The ADM233L does not
require any external components and is particularly useful in
applications where printed circuit board space is critical.
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
Figure 1.
levels. The ADM231L and ADM239L are designed to operate
from 5 V and 12 V supplies. An internal +12 V to −12 V charge
pump voltage converter generates the −12 V supply.
All members of the ADM2xxL family, except the ADM231L and
ADM239L, include two internal charge pump voltage converters
that allow operation from a single 5 V supply. These parts convert
the 5 V input power to the 1ꢀ V required for RS-232 output
The ADM2xxL is an enhanced upgrade to the AD2xx family. It
features lower power consumption, faster slew rate, and the
ability to operate with smaller (1 µF) capacitors.
Table 1. Selection Table
TTL
Part
Number
No. of RS-232 No. of RS-232 External
Low Power
Shutdown (SD)
No. of
Pins
Three-State EN
Power Supply Voltage
Drivers
Receivers
Capacitors
ADM231L
ADM232L
ADM233L
ADM234L
ADM236L
ADM237L
ADM238L
ADM239L
ADM241L
5 V and 7.5 V to 13.2 V
5 V
5 V
5 V
5 V
5 V
5 V
2
2
2
4
4
5
4
3
4
2
2
2
0
3
3
4
5
5
2
4
No
No
No
No
Yes
No
No
No
Yes
No
No
No
No
Yes
No
No
Yes
Yes
14
16
20
16
24
24
24
24
28
None
4
4
4
4
2
4
5 V and 7.5 V to 13.2 V
5 V
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
ADM231L–ADM234L/ADM236L–ADM241L
TABLE OF CONTENTS
Specifications..................................................................................... 3
General Information ...................................................................... 12
Circuit Description .................................................................... 12
Application Hints ....................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 17
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 8
Typical Operating Circuits .............................................................. 9
REVISION HISTORY
4/05—Rev. B to Rev. C
Updated Format..................................................................Universal
Removed ADM223, ADM23ꢀL, and ADM235L............Universal
Changed Hysteresis Level..................................................Universal
Changes to Specifications Table...................................................... 3
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide .......................................................... 17
5/01—Rev. A to Rev. B
Edits to Test Conditions/Comments of Specifications................ 2
1/01—Rev. 0 to Rev. A
Removed ESD information from Features section ...................... 1
Changes to Specifications Table...................................................... 2
Removed ESD information from
Absolute Maximum Ratings section.............................................. 2
Revision 0: Initial Version
Rev. C | Page 2 of 20
ADM231L–ADM234L/ADM236L–ADM241L
SPECIFICATIONS
VCC = 5 V 1ꢀ% (ADM231L, ADM232L, ADM234L, ADM236L, ADM238L, ADM239L, ADM241L); VCC = 5 V 5% (ADM233L and
ADM237L); V+ = 7.5 V to 13.2 V (ADM231L and ADM239L); C1 to C4 = 1.ꢀ µF ceramic. All specifications TMIN to TMAX, unless
otherwise noted.
Table 2.
Parameter
Min
Typ
Max Unit Test Conditions/Comments
Output Voltage Swing
VCC Power Supply Current
5
9
V
All transmitter outputs loaded with 3 kΩ to ground
No load, (ADM232L only)
No load
2.5
3.5
1.5
1
6.0
13
4
10
0.8
mA
mA
mA
µA
V
V+ Power Supply Current
No load, V+ = 12 V (ADM231L and ADM239L only)
Shutdown Supply Current
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
RS-232 Input Voltage Range1
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
TIN, EN, SD, EN, SD
TIN, EN, SD, EN, SD
2.0
V
12
25
µA
V
V
V
V
kΩ
V
V
–30
0.8
+30
TIN = 0 V
1.2
1.6
0.65
5
2.4
RS-232 Input Resistance
3
7
0.4
TA = 0°C to 85°C
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
TTL/CMOS Output Leakage Current
Output Enable Time (TEN)
3.5
IOUT = −1.0 mA
EN = VCC, 0 V ≤ ROUT ≤ VCC
+0.05
250
50
10 µA
ns
ns
µs
ADM236L, ADM239L, ADM241L (Figure 31, CL = 150 pF)
ADM236L, ADM239L, ADM241L (Figure 31, RL = 1 kΩ)
RS-232 to TTL
Output Disable Time (TDIS
)
Propagation Delay
Transition Region Slew Rate
Output Resistance
0.3
8
V/µs RL = 3 kΩ, CL = 2500 pF, measured from +3 V to −3 V or −3 V to +3 V
Ω
300
VCC = V+ = V– = 0 V, VOUT = 2 V
RS-232 Output Short-Circuit Current
10
mA
1 Guaranteed by design.
Rev. C | Page 3 of 20
ADM231L–ADM234L/ADM236L–ADM241L
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
Parameter
Rating
VCC
V+
V–
–0.3 V to +6 V
(VCC – 0.3 V) to +14 V
+0.3 V to −14 V
Q-14 CERDIP (Derate 10 mW/°C 720 mW
above 70°C)
Q-16 CERDIP (Derate 10 mW/°C 800 mW
above 70•C)
Input Voltages
TIN
RIN
Output Voltages
TOUT
ROUT
Short-Circuit Duration
TOUT
Power Dissipation
N-14 PDIP (Derate 10 mW/°C
above 70°C)
N-16 PDIP (Derate 10.5 mW/°C
above 70°C)
N-20 PDIP (Derate 11 mW/°C
above 70°C)
N-24-1 PDIP (Derate
Q-24 CERDIP (Derate
1000 mW
–0.3 V to (VCC + 0.3 V)
30 V
12.5 mW/°C above 70°C)
Thermal Impedance, θJA
N-14 PDIP
N-16 PDIP
N-20 PDIP
N-24-1 PDIP
140°C/W
135°C/W
125°C/W
120°C/W
105°C/W
85°C/W
(V+, +0.3 V) to (V–, –0.3 V)
–0.3 V to (VCC + 0.3 V)
Continuous
R-16 SOIC
R-24 SOIC
800 mW
840 mW
890 mW
1000 mW
760 mW
850 mW
R-28 SOIC
80°C/W
RS-28 SSOP
Q-14 CERDIP
Q-16 CERDIP
Q-24 CERDIP
100°C/W
105°C/W
100°C/W
55°C/W
Operating Temperature Range
Commercial (J Version)
Industrial (A Version)
Storage Temperature Range
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
13.5 mW/°C above 70°C)
0°C to 70°C
−40°C to +85°C
−65°C to +150°C
300°C
215°C
220° C
R-16 SOIC (Derate 9 mW/°C
above 70°C)
R-24 SOIC (Derate 12 mW/°C
above 70°C)
R-28 SOIC (Derate 12.5 mW/°C 900 mW
above 70°C)
RS-28 SSOP (Derate 10 mW/°C
above 70°C)
900 mW
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of
time may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 4 of 20
ADM231L–ADM234L/ADM236L–ADM241L
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
T2
R2
R2
T2
V–
20
19
18
17
IN
1
2
3
4
OUT
T1
IN
IN
R1
OUT
OUT
R1
IN
14
13
12
C1+
1
2
3
V+
V
ADM233L
TOP VIEW
(Not to Scale)
T1
C2–
C2+
V+
–
C1
16
15
14
13
OUT
5
6
CC
GND
–
V
GND
ADM231L
TOP VIEW
(Not to Scale)
V
CC
7
8
4
5
6
7
11 T1
T2
OUT
IN
OUT
C1+
GND
C2–
C1–
10
9
R2
R1
R1
T1
IN
V–
12
11
9
R2
OUT
IN
OUT
C2+
8
10
T2
IN
Figure 5. ADM233L PDIP Pin Configuration
Figure 2. ADM231L PDIP Pin Configuration
C1+
C1–
V–
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V+
V
T1
T2
T3
T4
T4
T3
V–
CC
1
2
3
4
5
16
15
14
13
12
11
10
9
OUT
OUT
OUT
OUT
IN
GND
T1
ADM231L
TOP VIEW
(Not to Scale)
T2
T1
T2
IN
IN
OUT
OUT
ADM234L
TOP VIEW
(Not to Scale)
R2
R1
R1
T1
IN
IN
IN
GND
R2
OUT
OUT
V
C2–
C2+
C1–
CC
6
7
8
T2
IN
IN
C1+
V+
NC
NC
NC = NO CONNECT
Figure 6. ADM234L PDIP/CERDIP/SOIC Pin Configuration
Figure 3. ADM231L SOIC Pin Configuration
T3
T1
T2
T4
R2
R2
24
23
22
OUT
OUT
OUT
1
2
3
4
5
6
OUT
IN
OUT
R1
21 SD
IN
R1
20
19
18
17
16
15
14
13
EN
T4
OUT
C1+
V+
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
T2
IN
ADM236L
TOP VIEW
(Not to Scale)
IN
GND
T1
T3
IN
T1
IN
7
8
C1–
C2+
C2–
V–
OUT
R3
R3
V–
ADM232L
TOP VIEW
R1
R1
T1
GND
OUT
IN
IN
V
9
CC
(Not to Scale) 12
OUT
C1+
10
11
10
9
IN
T2
C–
V+ 11
C1–
OUT
T2
IN
R2
R2
OUT
C2+
12
IN
Figure 4. ADM232L PDIP/CERDIP/SOIC Pin Configuration
Figure 7. ADM236L PDIP/SOIC Pin Configuration
Rev. C | Page 5 of 20
ADM231L–ADM234L/ADM236L–ADM241L
R1
T1
T2
24
1
2
3
4
5
6
OUT
IN
T3
T1
T2
T4
R2
24
23
22
21
20
19
18
17
16
15
14
13
OUT
OUT
OUT
1
2
3
4
5
6
OUT
R1
23
IN
IN
IN
R2
GND
22
OUT
IN
R2
T5
OUT
V
21 R2
CC
R1
IN
IN
V+
C+
20
T2
OUT
R1
T5
T4
OUT
OUT
ADM239L
TOP VIEW
(Not to Scale)
19 T1
R3
OUT
T2
IN
ADM237L
TOP VIEW
(Not to Scale)
IN
C–
V–
7
8
18
IN
T3
T1
IN
7
8
IN
17 R3
16 T3
OUT
GND
R3
R3
V–
OUT
IN
R5
IN
9
V
IN
CC
9
R5
NC
C1+
V+
10
15
14
13
OUT
10
11
12
R4
OUT 11
C2–
C2+
EN
T3
C1–
R4
12
IN
OUT
Figure 8. ADM237L PDIP/CERDIP/SOIC Pin Configuration
Figure 10. ADM239L PDIP/CERDIP/SOIC Pin Configuration
T3
T1
T2
T4
R3
R3
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
OUT
OUT
OUT
IN
OUT
OUT
T2
T1
T3
R3
R3
T4
1
2
24
23
22
21
20
19
18
17
16
15
14
13
OUT
OUT
OUT
R2
SD
OUT
IN
R2
EN
R4
OUT
R2
IN
3
OUT
T2
IN
IN
R2
4
OUT
IN
T1
IN
R4
T4
T3
R5
ADM241L
TOP VIEW
(Not to Scale)
OUT
IN
T1
IN
T4
T3
5
OUT
R1
OUT
R1
OUT
ADM238L
TOP VIEW
(Not to Scale)
6
IN
R1
IN
R1
T2
IN
7
IN
IN
GND 10
OUT
IN
GND
R4
R4
V–
8
OUT
V
11
12
13
14
18 R5
17 V–
V
CC
CC
9
IN
C1+
V+
C1+
V+
10
11
12
C2–
C2+
16 C2–
15
C1–
C1–
C2+
Figure 9. ADM238L PDIP/CERDIP/SOIC Pin Configuration
Figure 11. ADM241L SOIC/SSOP Pin Configuration
Rev. C | Page 6 of 20
ADM231L–ADM234L/ADM236L–ADM241L
Table 4. Pin Function Descriptions
Mnemonic Function
VCC
V+
Power Supply Input. 5 V 10ꢀ (5 V 5ꢀ for ADM233L).
Internally Generated Positive Supply (+10 V nominal) on all parts, except ADM231L and ADM239L. ADM231L and ADM239L
require an external 7.5 V to 13.2 V supply.
V−
Internally Generated Negative Supply (−10 V nominal).
Ground Pin. Must be connected to 0 V.
GND
C+
(ADM231L and ADM239L only) External capacitor (+ terminal) is connected to this pin.
C−
(ADM231L and ADM239L only) External capacitor (– terminal) is connected to this pin.
C1+
(ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, and ADM241L) External capacitor (+ terminal) is connected to this
pin. (ADM233L) The capacitor is connected internally and no external connection to this pin is required.
C1−
(ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, and ADM241L) External capacitor (− terminal) is connected to this
pin. (ADM233L) The capacitor is connected internally and no external connection to this pin is required.
C2+
C2−
TIN
(ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, and ADM241L) External capacitor (+ terminal) is connected to this
pin. (ADM233L) Internal capacitor connections, Pin 11 and Pin 15, must be connected together.
(ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, and ADM241L) External capacitor (− terminal) is connected to this
pin. (ADM233L) Internal capacitor connections, Pin 10 and Pin 16, must be connected together.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is connected to
each input.
Transmitter (Driver) Outputs. These are RS-232 levels (typically 10 V).
TOUT
RIN
ROUT
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on each input.
Receiver Outputs. These are TTL/CMOS levels.
Enable Input. Active low on ADM236L, ADM239L, and ADM241L. This input is used to enable/disable the receiver outputs.
With EN = low, the receiver outputs are enabled. With EN = high, the outputs are placed in a high impedance state. This
facility is useful for connecting to microprocessor systems.
Shutdown Input. Active high on ADM236L and ADM241L. With SD = high on the ADM236L and ADM241L, the charge pump
is disabled, the receiver outputs are placed in a high impedance state, and the driver outputs are turned off.
EN
SD
NC
No Connect. No connections are required to this pin.
Table 5. ADM236L and ADM241L Truth Table
EN
SD
0
0
Status
Transmitters T1 to T5
Enabled
Enabled
Receivers R1 to R5
Enabled
Disabled
0
1
0
Normal Operation
Normal Operation
Shutdown
1
Disabled
Disabled
Rev. C | Page 7 of 20
ADM231L–ADM234L/ADM236L–ADM241L
TYPICAL PERFORMANCE CHARACTERISTICS
15
15
10
V+
10
Tx O/P HI
5
0
5
0
–5
–5
V–
Tx O/P LO
–10
–10
–15
–15
0
5
10
15
20
0
2
4
6
8
10
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 12. Charge Pump V+ and V− vs. Current
Figure 15. Transmitter Output Voltage vs. Current
350
300
250
200
150
50
45
40
35
30
25
V+ IMP
NEGATIVE
SLEW
20
15
10
5
100
50
V– IMP
POSITIVE
SLEW
0
0
4.5
4.7
4.9
5.1
5.3
5.5
0
500
1000
1500
2000
2500
3000
V
(V)
LOAD CAPACITANCE (pF)
CC
Figure 16. Charge Pump Impedance vs. VCC
Figure 13. Transmitter Slew Rate vs. Load Capacitance
9
7
5
Tx O/P HI LOADED
3
1
–1
–3
–5
–7
–9
Tx O/P LO LOADED
4.0
4.5
5.0
(V)
5.5
6.0
V
CC
Figure 14. Transmitter Output Voltage vs. VCC
Rev. C | Page 8 of 20
ADM231L–ADM234L/ADM236L–ADM241L
TYPICAL OPERATING CIRCUITS
+5V INPUT
+5V INPUT
1µF
13
V
CC
V
CC
+7.5V TO +13.2V
14
3
V+
V–
T1
T2
T1
T2
T1
T2
IN
IN
OUT
OUT
1
2
C1+
C1–
1µF
+16V
RS-232
OUTPUTS
TTL/CMOS
INPUTS
+12V TO –12V
VOLTAGE
INVERTER
1
1µF
+16V
R1
R1
R2
T1
IN
T1
R1
R2
8
7
9
6
11
4
T1
T2
R1
R2
OUT
OUT
IN
OUT
TTL/CMOS
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
RS-232
OUTPUTS
2
1
R2
T2
IN
T2
R1
R2
IN
OUT
C1+
C1–
V–
C2+
C2+
R1
DO NOT MAKE
CONNECTIONS TO
THESE PINS
10
5
OUT
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS
2
R2
OUT
IN
ADM233L
C2–
C2–
INTERNAL
–10V POWER
SUPPLY
GND
12
ADM231L
V–
V+
INTERNAL
+10V POWER
SUPPLY
1
2
GND
GND
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
Figure 17. ADM231L Typical Operating Circuit (PDIP Pinout)
Figure 19. ADM233L Typical Operating Circuit
5V INPUT
5V INPUT
V
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
CC
1µF
+6.3V
1µF
1µF
+6.3V
1µF
+6.3V
V
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
CC
+6.3V
1µF
+6.3V
1µF
V+
V–
+6.3V
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1µF
+16V
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1µF
+16V
1µF
+16V
1µF
+16V
T1
T1
T1
T2
R1
R2
IN
OUT
TTL/CMOS
INPUTS
T1
IN
T1
RS-232
OUTPUTS
T1
T2
OUT
1
T2
IN
T2
OUT
T2
IN
T2
OUT
TTL/CMOS
1
R1
R1
IN
INPUTS
OUT
RS-232
OUTPUTS
T3
T4
IN
IN
T3
T4
T3
RS-232
INPUTS
TTL/CMOS
OUTPUTS
OUT
2
R2
R2
IN
OUT
T4
OUT
GND
ADM232L
GND
ADM234L
1
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
Figure 20. ADM234L Typical Operating Circuit
Figure 18. ADM232L Typical Operating Circuit
Rev. C | Page 9 of 20
ADM231L–ADM234L/ADM236L–ADM241L
+5V INPUT
+5V INPUT
V
C1+
C1–
CC
V
+5V TO +10V
VOLTAGE
DOUBLER
C1+
C1–
CC
+5V TO +10V
VOLTAGE
DOUBLER
1µF
1µF
+6.3V
1µF
+6.3V
1µF
+6.3V
1µF
+6.3V
1µF
+6.3V
+6.3V
V+
V–
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1µF
+16V
1µF
+16V
1µF
+16V
1µF
+16V
T1
IN
T1
T1
T2
OUT
T1
IN
T1
T1
T2
OUT
T2
IN
T2
OUT
T2
IN
T2
T3
T4
OUT
OUT
OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
TTL/CMOS
INPUTS
1
RS-232
OUTPUTS
1
T3
IN
T3
T3
T4
R1
R2
T3
IN
OUT
T3
T4
T4
IN
T4
T4
IN
OUT
R1
R1
IN
OUT
OUT
R1
R1
R2
R1
R2
OUT
IN
IN
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R2
R3
R2
IN
2
R2
OUT
RS-232
TTL/CMOS
OUTPUTS
2
INPUTS
R3
IN
R3
OUT
EN
R3
R3
R3
R4
OUT
IN
IN
SD
R4
GND
ADM236L
R4
OUT
GND
ADM238L
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
Figure 23. ADM238L Typical Operating Circuit
Figure 21. ADM236L Typical Operating Circuit
+5V INPUT
V
C1+
C1–
+5V TO +10V
VOLTAGE
DOUBLER
CC
1µF
1µF
+6.3V
1µF
+6.3V
+6.3V
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1µF
+16V
1µF
+16V
T1
IN
T1
T1
T2
OUT
T2
IN
T2
OUT
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T3
IN
T3
T3
T4
OUT
1
T4
IN
T4
OUT
T5
IN
20
T5
R1
T5
OUT
R1
R1
IN
OUT
OUT
OUT
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R2
R3
R2
IN
R2
2
R3
IN
R3
GND
ADM237L
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
Figure 22. ADM237L Typical Operating Circuit
Rev. C | Page 10 of 20
ADM231L–ADM234L/ADM236L–ADM241L
+5V INPUT
1µF
+5V INPUT
+5V TO +10V
VOLTAGE
DOUBLER
V
C1+
C1–
C2+
C2–
CC
1µF
1µF
+6.3V
1µF
+6.3V
+16V
V
CC
V+
V–
+12V TO –12V
VOLTAGE
INVERTER
C1+
C1–
1µF
+16V
+7.5V TO +13.2V
INPUT
+10V TO –10V
VOLTAGE
INVERTER
V+
V–
1µF
+16V
1µF
+16V
1µF
+16V
T1
IN
T1
T1
T2
T3
OUT
T1
IN
T1
T1
T2
OUT
T2
IN
T2
OUT
TTL/CMOS
INPUTS
RS-232
OUTPUTS
1
TTL/CMOS
INPUTS
RS-232
OUTPUTS
T2
IN
T2
1
OUT
T3
IN
T3
OUT
T3
IN
T3
OUT
T3
R1
R2
T4
IN
T4
R1
T4
OUT
R1
R1
R2
R3
R4
R5
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
R1
R1
IN
OUT
OUT
OUT
OUT
R2
R3
R4
R5
R2
R3
R4
R5
R2
IN
R2
TTL/CMOS
OUTPUTS
RS-232
INPUTS
TTL/CMOS
OUTPUTS
RS-232
INPUTS
R3
R4
2
R3
IN
R3
R4
R5
2
R4
IN
R5
OUT
EN
R5
IN
OUT
EN
NC
ADM241L
GND
SD
GND
ADM239L
1
2
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
2
Figure 24. ADM239L Typical Operating Circuit
Figure 25. ADM241L Typical Operating Circuit
Rev. C | Page 11 of 20
ADM231L–ADM234L/ADM236L–ADM241L
GENERAL INFORMATION
The ADM231L–ADM234L/ADM236L–ADM241L family of
RS-232 drivers/receivers is designed to solve interface problems
by meeting the EIA-232-E specifications while using a single
digital 5 V supply. The EIA-232-E standard requires that trans-
mitters deliver 5 V minimum on the transmission channel
and that receivers can accept signal levels down to 3 V. The
ADM231L–ADM234L/ADM236L–ADM241L meet these
requirements by integrating step-up voltage converters and
level-shifting transmitters and receivers onto the same chip.
CMOS technology is used to keep the power dissipation to
an absolute minimum. A comprehensive range of transmitter/
receiver combinations is available for most communications needs.
T
Tx INPUT
1
2
T
Tx OUTPUT
800mV
5.00V CH2 5.00V M1.00µs CH1
CH1
Figure 28. Transmitter Output Unloaded Slew Rate
CIRCUIT DESCRIPTION
The ADM236L and ADM241L are particularly useful in
battery-powered systems because they feature a low power
shutdown mode that reduces power dissipation to less than 5 µW.
The internal circuitry in the ADM236L to ADM241L consists of
three main sections: a charge pump voltage converter, RS-232-to-
TTL/CMOS receivers, and TTL/CMOS-to-RS-232 transmitters.
Charge Pump DC-to-DC Voltage Converter
The ADM233L is designed for applications in which space
saving is important because the charge pump capacitors are
molded into the package. The ADM231L and ADM239L
include only a negative charge pump converter and are intended
for applications in which +12 V is available.
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a 1ꢀ V supply from
the 5 V input. This is done in two stages using a switched
capacitor technique, as illustrated in Figure 29 and Figure 3ꢀ.
First, the 5 V input supply is doubled to 1ꢀ V, using capacitor
C1 as the charge storage element. The 1ꢀ V level is then
inverted to generate –1ꢀ V, using C2 as the storage element.
To facilitate sharing a common line or for connection to a
microprocessor data bus, the ADM236L, ADM239L, and
ADM241L feature an enable (EN,
) function. When the
EN
S1
S3
receivers are disabled, their outputs are placed in a high
impedance state.
V
V+ = 2V
CC
CC
C1
C3
S2
S4
V
GND
CC
1
T
SD
V+
INTERNAL
OSCILLATOR
T
Figure 29. Charge Pump Voltage Doubler
T
V–
S1
S3
S4
V+
GND
FROM
VOLTAGE
DOUBLER
+
+
3.1V
CH1 5.00V
CH3 5.00V
CH2 5.00V M50.0µs
CH1
C2
C4
B
W
V+, V– EXITING SD
S2
V– = –(V+)
GND
Figure 26. Charge Pump V+ and V− Exiting Shutdown
INTERNAL
OSCILLATOR
Tx INPUT
T
T
1
2
Figure 30. Charge Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors, C1 and C2,
can be reduced at the expense of higher output impedance on the
V+ and V– supplies, and the V+ and V– supplies can be used to
power external circuitry if the current requirements are small.
Tx OUTPUT
5.00V CH2 5.00V M1.00µs CH1
CH1
800mV
Figure 27. Transmitter Output Loaded Slew Rate
Rev. C | Page 12 of 20
ADM231L–ADM234L/ADM236L–ADM241L
Transmitter (Driver) Section
Enable Input
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is 9 V. Even under worst-case
conditions, the drivers are guaranteed to meet the 5 V
EIA-232-E minimum requirement.
ADM239L and ADM241L feature an enable input used to enable
or disable the receiver outputs. The enable input is active low on
the ADM239L and ADM241L (see Table 5). When the receivers
are disabled, their outputs are placed in a high impedance state.
This function allows the outputs to be connected directly to a
microprocessor data bus. It can also be used to allow receivers
from different devices to share a common data line. The timing
diagram for the enable function is shown in Figure 31.
The input threshold levels are both TTL- and CMOS-compatible
with the switching threshold set at VCC/4. With a nominal VCC
5 V, the switching threshold is 1.25 V typical. Unused inputs can
be left unconnected because an internal 4ꢀꢀ kΩ pull-up resistor
pulls them high, forcing the outputs into a low state.
=
3V
EN
0V
As required by the EIA-232-E standard, the slew rate is limited to
less than 3ꢀ V/µs without the need for an external slew-limiting
capacitor, and the output impedance in the power-off state is
greater than 3ꢀꢀ Ω.
T
T
DIS
EN
3.5V
0.8V
V
– 0.1V
+ 0.1V
OH
R
OUT
V
OL
Receiver Section
Figure 31. Enable Timing
The receivers are inverting level shifters that accept EIA-232-E
input levels ( 5 V to 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are protected against overvoltages of up to 3ꢀ V.
The guaranteed switching thresholds are ꢀ.8 V minimum and
2.4 V maximum, which are well within the 3 V EIA-232-E
requirement. The low level threshold is deliberately positive
because it ensures that an unconnected input is interpreted as
a low level.
APPLICATION HINTS
Driving Long Cables
In accordance with the EIA-232-E standard, long cables are per-
missible, provided that the total load capacitance does not exceed
25ꢀꢀ pF. For longer cables that do exceed this, it is possible to trade
off baud rate for cable length. Large load capacitances cause a
reduction in slew rate; therefore, the maximum transmission baud
rate is decreased. The ADM236L to ADM241L are designed to
minimize the slew rate reduction that occurs as load capaci-
tance increases.
The receivers have Schmitt trigger inputs with a hysteresis level
of ꢀ.65 V. This ensures error-free reception for both noisy inputs
and inputs with slow transition times.
For the receivers, it is important that a high level of noise
immunity be built in so that slow rise and fall times do not
cause multiple output transitions as the signal passes slowly
through the transition region. The ADM236L to ADM241L
have ꢀ.65 V of hysteresis to guard against this. This ensures that
even in noisy environments error-free reception can be
achieved.
Shutdown (SD)
The ADM236L and ADM241L feature a control input that can
be used to disable the part and reduce the power consumption
to less than 5 µW. This is very useful in battery-operated systems.
During shutdown, the charge pump is turned off, the transmitters
are disabled, and all receivers are put into a high impedance,
disabled state. The shutdown control input is active high on all
parts (see Table 5).
High Baud Rate Operation
The ADM236L to ADM241L feature high slew rates, permitting
data transmission at rates well in excess of the EIA-232-E
specification. The drivers maintain 5 V signal levels at data
rates up to 1ꢀꢀ kbps under worst-case loading conditions.
Rev. C | Page 13 of 20
ADM231L–ADM234L/ADM236L–ADM241L
OUTLINE DIMENSIONS
0.685 (17.40)
10.50 (0.4134)
10.10 (0.3976)
0.665 (16.89)
0.645 (16.38)
0.285 (7.24)
0.295 (7.49)
0.275 (6.99)
16
1
9
8
14
1
8
7
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
MIN
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
1.27 (0.0500)
BSC
0.75 (0.0295)
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
× 45°
0.180 (4.57)
MAX
0.30 (0.0118)
0.10 (0.0039)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
8°
0°
0.022 (0.56) 0.060 (1.52)
0.018 (0.46) 0.050 (1.27)
0.014 (0.36) 0.045 (1.14)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013AA
COMPLIANT TO JEDEC STANDARDS MO-095-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 34. 16-Lead Standard Small Outline Package [SOIC]
Wide Body (R-16)
Figure 32. 14-Lead Plastic Dual In-Line Package [PDIP]
(N-14)
Dimensions shown in millimeters and (inches)
Dimensions shown in inches and (millimeters)
0.785 (19.94)
0.765 (19.43)
0.745 (18.92)
0.285 (7.24)
0.295 (7.49)
0.275 (6.99)
16
1
9
8
0.098 (2.49) MAX
8
0.005 (0.13) MIN
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
14
0.310 (7.87)
PIN 1
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
MIN
0.220 (5.59)
1
7
0.180 (4.57)
MAX
0.320 (8.13)
0.290 (7.37)
0.100 (2.54) BSC
0.785 (19.94) MAX
0.060 (1.52)
0.015 (0.38)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.200 (5.08)
MAX
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
15°
0°
0.070 (1.78)
0.030 (0.76)
COMPLIANT TO JEDEC STANDARDS MO-095AC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 33. 16-Lead Plastic Dual In-Line Package [PDIP]
(N-16)
Figure 35. 14-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-14)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
Rev. C | Page 14 of 20
ADM231L–ADM234L/ADM236L–ADM241L
0.098 (2.49)
0.005
0.005
(0.13)
MIN
0.098 (2.49)
MAX
MAX
0.310 (7.87)
0.220 (5.59)
(0.13)
MIN
0.310 (7.87)
0.220 (5.59)
20
11
10
16
9
PIN 1
PIN 1
1
1
8
0.060 (1.52)
0.015 (0.38)
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
0.320 (8.13)
0.290 (7.37)
0.200 (5.08)
0.200 (5.08)
0.840 (21.34) MAX
1.060 (26.92) MAX
MAX
MAX
0.150 (3.81)
MIN
0.150 (3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
0.200 (5.08)
0.125 (3.18)
15°
0°
15°
0°
SEATING
PLANE
0.100
(2.54)
BSC
0.100
(2.54)
BSC
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.070 (1.78)
0.030 (0.76)
0.023 (0.58)
0.014 (0.36)
0.023 (0.58)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 36. 16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
Figure 39. 20-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-20)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.985 (25.02)
0.965 (24.51)
0.945 (24.00)
1.185 (30.01)
1.165 (29.59)
1.145 (29.08)
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
20
1
11
10
24
1
13
12
0.325 (8.26)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.310 (7.87)
0.300 (7.62)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.180
(4.57)
MAX
0.180 (4.57)
MAX
0.015 (0.38) MIN
0.015 (0.38) MIN
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
SEATING
PLANE
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.100
0.100
(2.54)
BSC
0.060 (1.52)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
(2.54)
0.050 (1.27)
BSC
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095-AE
COMPLIANT TO JEDEC STANDARDS MO-095AG
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 37. 20-Lead Plastic Dual In-Line Package [PDIP]
(N-20)
Figure 40. 24-Lead Plastic Dual In-Line Package [PDIP]
(N-24-1)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
13.00 (0.5118)
12.60 (0.4961)
0.098 (2.49) MAX
13
0.005 (0.13) MIN
24
20
1
11
10
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.610 (15.49)
0.500 (12.70)
PIN 1
1
2
2.65 (0.1043)
2.35 (0.0925)
0.620 (15.75)
0.590 (14.99)
0.75 (0.0295)
0.25 (0.0098)
× 45°
0.075 (1.91)
0.015 (0.38)
1.290 (32.77) MAX
0.30 (0.0118)
0.10 (0.0039)
0.225 (5.72)
MAX
0.150
(3.81)
MIN
8°
0°
1.27
(0.0500)
BSC
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.200 (5.08)
0.120 (3.05)
COPLANARITY
0.10
0.33 (0.0130)
0.20 (0.0079)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
0.100 (2.54)
BSC
COMPLIANT TO JEDEC STANDARDS MS-013AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 41. 24-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-24-2)
Figure 38. 20-Lead Standard Small Outline Package [SOIC]
Wide Body (R-20)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches)
Rev. C | Page 15 of 20
ADM231L–ADM234L/ADM236L–ADM241L
1.290 (32.77)
1.150 (31.57)
18.10 (0.7126)
17.70 (0.6969)
24
1
13
28
1
15
14
0.580 (14.73)
0.485 (12.32)
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
12
0.610 (15.49)
0.600 (15.24)
0.590 (14.99)
PIN 1
0.015 (0.38) MIN
0.210 (5.34)
0.165 (4.19)
0.160 (4.06)
0.155 (3.93)
MAX
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
× 45°
0.30 (0.0118)
0.10 (0.0039)
0.200 (5.08)
0.115 (2.92)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
8°
0°
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
1.27 (0.0500)
SEATING
PLANE
0.51 (0.0201)
0.33 (0.0130)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COPLANARITY
0.10
BSC
COMPLIANT TO JEDEC STANDARDS MS-011-AA
COMPLIANT TO JEDEC STANDARDS MS-013AE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 42. 24-Lead Plastic Dual In-Line Package [PDIP]
Wide Body (N-24-2)
Figure 45. 28-Lead Standard Small Outline Package [SOIC]
Wide Body (R-28)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches)
10.50
10.20
9.90
28
15
14
0.098 (2.49)
MAX
0.005 (0.13)
MIN
5.60 8.20
5.30 7.80
5.00 7.40
0.310 (7.87)
0.220 (5.59)
24
13
2
PIN 1
1
1
1
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
PIN 1
0.200 (5.08)
MAX
1.280 (32.51) MAX
0.150 (3.81)
MIN
1.85
1.75
1.65
0.015 (0.38)
0.008 (0.20)
COPLANARITY
0.10
2.00 MAX
15°
0°
0.200 (5.08)
0.125 (3.18)
SEATING
PLANE
0.100
(2.54)
BSC
0.070 (1.78)
0.030 (0.76)
0.25
0.09
0.023 (0.58)
0.014 (0.36)
8°
4°
0°
0.65
BSC
0.95
0.75
0.55
0.38
0.22
0.05 MIN
SEATING
PLANE
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-150AH
Figure 43. 24-Lead Ceramic Dual in-Line Package [CERDIP]
(Q-24)
Figure 46. 28-Lead Shrink Small Outline Package [SSOP]
(RS-28)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters
15.60 (0.6142)
15.20 (0.5984)
24
1
13
12
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
× 45°
0.30 (0.0118)
0.10 (0.0039)
8°
0°
1.27 (0.0500)
BSC
SEATING
PLANE
0.51 (0.020)
0.31 (0.012)
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013AD
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 44. 24-Lead Standard Small Outline Package [SOIC]
Wide Body (R-24)
Dimensions shown in millimeters and (inches)
Rev. C | Page 16 of 20
ADM231L–ADM234L/ADM236L–ADM241L
ORDERING GUIDE
Model
ADM231LJN
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
Package Description
14-lead PDIP
16-lead SOIC
16-lead SOIC
16-lead SOIC
14-lead PDIP
14-lead CERDIP
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead PDIP
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead SOIC
20-lead PDIP
20-lead PDIP
20-lead PDIP
20-lead PDIP
16-lead PDIP
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead SOIC
16-lead PDIP
16-lead CERDIP
16-lead SOIC
16-lead SOIC
24-lead PDIP
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead CERDIP
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead PDIP
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
Package Option
N-14
R-16
R-16
R-16
N-14
Q-14
R-16
ADM231LJR
ADM231LJR-REEL
ADM231LJRZ-REEL1
ADM231LAN
ADM231LAQ
ADM231LAR
ADM231LAR-REEL
ADM232LJR
ADM232LJR-REEL
ADM232LJRZ1
ADM232LJRZ-REEL71
ADM232LAN
R-16
R-16
R-16
R-16
R-16
N-16
R-16
R-16
R-16
R-16
N-16
N-16
N-20
N-20
N-16
R-16
R-16
R-16
R-16
ADM232LAR
ADM232LAR-REEL
ADM232LARZ1
ADM232LARZ-REEL1
ADM232LJN
ADM232LJNZ1
0°C to 70°C
ADM233LJN
ADM233LAN
0°C to 70°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
ADM234LJN
ADM234LJR
ADM234LJR-REEL
ADM234LJRZ1
ADM234LJRZ-REEL1
ADM234LAN
ADM234LAQ
ADM234LAR
ADM234LAR-REEL
ADM236LJN
ADM236LJR
ADM236LJR-REEL
ADM236LAN
ADM236LAR
ADM236LAR-REEL
ADM237LJN
ADM237LJR
ADM237LJR-REEL
ADM237LJRZ1
ADM237LJRZ-REEL1
ADM237LAN
ADM237LAQ
ADM237LAR
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
N-16
Q-16
R-16
R-16
N-24-1
R-24
R-24
N-24-1
R-24
R-24
N-24-1
R-24
R-24
R-24
R-24
N-24-1
Q-24
R-24
ADM237LAR-REEL
R-24
ADM238LJN
ADM238LJNZ1
ADM238LJR
ADM238LJR-REEL
ADM238LJRZ1
ADM238LJRZ-REEL1
N-24-1
N-24-1
R-24
R-24
R-24
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
R-24
Rev. C | Page 17 of 20
ADM231L–ADM234L/ADM236L–ADM241L
Model
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package Description
24-lead PDIP
24-lead CERDIP
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead SOIC
24-lead PDIP
24-lead CERDIP
24-lead SOIC
24-lead SOIC
28-lead SOIC
28-lead SOIC
28-lead SOIC
28-lead SOIC
28-lead SOIC
28-lead SOIC
28-lead SSOP
28-lead SSOP
28-lead SSOP
28-lead SSOP
Package Option
N-24-1
Q-24
R-24
R-24
ADM238LAN
ADM238LAQ
ADM238LAR
ADM238LAR-REEL
ADM238LARZ1
ADM238LARZ-REEL1
ADM239LJN
R-24
R-24
N-24-1
R-24
R-24
R-24
R-24
N-24-1
Q-24
R-24
ADM239LJR
ADM239LJR-REEL
ADM239LJRZ1
ADM239LJRZ-REEL1
ADM239LAN
ADM239LAQ
ADM239LAR
ADM239LAR-REEL
ADM241LJR
ADM241LJR-REEL
ADM241LJRZ1
ADM241LJRZ-REEL1
ADM241LAR
ADM241LAR-REEL
ADM241LJRS
ADM241LJRS-REEL
ADM241LARS
ADM241LARS-REEL
R-24
R-28
R-28
R-28
R-28
R-28
R-28
RS-28
RS-28
RS-28
RS-28
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
1 Z = Pb-free part.
Rev. C | Page 18 of 20
ADM231L–ADM234L/ADM236L–ADM241L
NOTES
Rev. C | Page 19 of 20
ADM231L–ADM234L/ADM236L–ADM241L
NOTES
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00070–0–4/05(C)
Rev. C | Page 20 of 20
ADM241LJRS-REEL 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
ADM241LJRSZ | ROCHESTER | QUAD LINE TRANSCEIVER, PDSO28, ROHS COMPLIANT, MO-150AH, SSOP-28 | 获取价格 | |
ADM241LJRSZ-REEL | ADI | 暂无描述 | 获取价格 | |
ADM241LJRSZ-REEL | ROCHESTER | QUAD LINE TRANSCEIVER, PDSO28, 5.30 MM, ROHS COMPLIANT, MO-150AH, SSOP-28 | 获取价格 | |
ADM241LJRZ | ADI | Low Power, +5V CMOS RS-232 100kBPS Transceiver with 4 Drivers, 5 Receivers, Shutdown and Enable Pins | 获取价格 | |
ADM241LJRZ | ROCHESTER | QUAD LINE TRANSCEIVER, PDSO28, ROHS COMPLIANT, MS-013AE, SOIC-28 | 获取价格 | |
ADM241LJRZ-REEL | ADI | Low Power, +5V CMOS RS-232 100kBPS Transceiver with 4 Drivers, 5 Receivers, Shutdown and Enable Pins | 获取价格 | |
ADM242 | ADI | High Speed, +5 V, 0.1 uF CMOS RS-232 Drivers/Receivers | 获取价格 | |
ADM242* | ADI | High Speed. +5 V. 0.1 uF CMOS RS-232 Drivers/Receivers | 获取价格 | |
ADM242AN | ADI | High Speed, +5 V, 0.1 uF CMOS RS-232 Drivers/Receivers | 获取价格 | |
ADM242ANZ | ADI | High-Speed, 5 V, 0.1 F CMOS RS-232 Drivers/Receivers | 获取价格 |
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