ADM2491E [ADI]
High Speed, ESD-Protected, Half-/Full-Duplex, iCoupler Isolated RS-485 Transceiver; 高速， ESD保护，半/全双工， iCoupler隔离RS- 485收发器
| 型号： | ADM2491E |
| 厂家： | 
ADI |
| 描述： | High Speed, ESD-Protected, Half-/Full-Duplex, iCoupler Isolated RS-485 Transceiver |
| 文件： | 总16页 (文件大小：563K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Speed, ESD-Protected, Half-/Full-Duplex,
iCoupler Isolated RS-485 Transceiver
ADM2491E
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
V
DD1
DD2
Isolated, RS-485/RS-422 transceiver, configurable as half- or
full-duplex
8 kV ESD protection on RS-485 input/output pins
16 Mbps data rate
ADM2491E
DE
Complies with ANSI TIA/EIA RS-485-A-1998 and
ISO 8482: 1987(E)
Y
Z
TxD
Suitable for 5 V or 3.3 V operation (VDD1
)
High common-mode transient immunity: >25 kV/μs
Receiver has open-circuit, fail-safe design
32 nodes on the bus
A
B
RxD
RE
Thermal shutdown protection
Safety and regulatory approvals pending
UL recognition: 5000 V rms isolation voltage
for 1 minute, per UL 1577
GND
GND
2
1
Figure 1.
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
Reinforced insulation, VIORM = 848 V peak
Operating temperature range: −40°C to +85°C
Wide body, 16-lead SOIC package
APPLICATIONS
Isolated RS-485/RS-422 interfaces
Industrial field networks
INTERBUS
Multipoint data transmission systems
GENERAL DESCRIPTION
The ADM2491E is an isolated data transceiver with ±± ꢀk EꢁD
protection and is suitable for high speed, half- or full-duplex
communication on multipoint transmission lines. For half-
duplex operation, the transmitter outputs and the receiver
inputs share the same transmission line. Transmitter output Pin
Y is linꢀed externally to receiver input Pin A, and transmitter
output Pin Z to receiver input Pin B.
The differential transmitter outputs and receiver inputs feature
electrostatic discharge circuitry that provides protection to
±± ꢀk using the human body model (HBM). The logic side of
the device can be powered with either a 5 k or a 3.3 k supply,
whereas the bus side requires an isolated 5 k supply.
The device has current-limiting and thermal shutdown features
to protect against output short circuits and situations where bus
contention could cause excessive power dissipation.
The ADM2491E is designed for balanced transmission lines
and complies with ANꢁI TIA/EIA Rꢁ-4±5-A-199± and IꢁO
±4±2: 19±7(E). The device employs Analog Devices, Inc.,
iCoupler® technology to combine a 3-channel isolator, a three-
state differential line driver, and a differential input receiver into
a single pacꢀage.
The ADM2491E is available in a wide body, 16-lead ꢁOIC
pacꢀage and operates over the −40°C to +±5°C temperature
range.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
ADM2491E
TABLE OF CONTENTS
Features .............................................................................................. 1
ꢁwitching Characteristics .................................................................9
Typical Performance Characteristics ........................................... 10
Circuit Description......................................................................... 12
Electrical Isolation...................................................................... 12
Truth Tables................................................................................. 12
Thermal ꢁhutdown .................................................................... 13
Fail-ꢁafe Receiver Inputs ........................................................... 13
Magnetic Field Immunity.......................................................... 13
Applications Information.............................................................. 14
Isolated Power ꢁupply Circuit .................................................. 14
PCB Layout ................................................................................. 14
Typical Applications................................................................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
Functional Blocꢀ Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
ꢁpecifications..................................................................................... 3
Timing ꢁpecifications .................................................................. 4
Pacꢀage Characteristics ............................................................... 4
Regulatory Information (Pending) ............................................ 4
Insulation and ꢁafety-Related ꢁpecifications............................ 5
kDE 0±±4 Insulation Characteristics (Pending)...................... 5
Absolute Maximum Ratings............................................................ 6
EꢁD Caution.................................................................................. 6
Pin Configuration and Functional Descriptions.......................... 7
Test Circuits....................................................................................... ±
REVISION HISTORY
10/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADM2491E
SPECIFICATIONS
All voltages are relative to their respective ground; 3.0 k ≤ kDD1 ≤ 5.5 k, 4.5 k ≤ kDD2 ≤ 5.5 k. All minimum/maximum specifications
apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, kDD1 = kDD2
5.0 k, unless otherwise noted.
=
Table 1.
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
Power Supply Current, Logic Side
TxD/RxD Data Rate = 2 Mbps
TxD/RxD Data Rate = 16 Mbps
IDD1
IDD1
3.0
6
mA
mA
Unloaded output
Half-duplex configuration,
RTERMINATION = 120 Ω, see Figure 5
Power Supply Current, Bus Side
TxD/RxD Data Rate = 2 Mbps
TxD/RxD Data Rate = 16 Mbps
IDD2
IDD2
4.0
50
mA
mA
Unloaded output
VDD2 = 5.5 V, half-duplex configuration,
RTERMINATION = 120 Ω, see Figure 5
DRIVER
Differential Outputs
Differential Output Voltage,
Loaded
|VOD|
2.0
5.0
V
RL = 100 Ω (RS-422), see Figure 3
1.5
1.5
5.0
5.0
0.2
V
V
V
RL = 54 Ω (RS-485), see Figure 3
−7 V ≤ VTEST1 ≤ 12 V, see Figure 4
RL = 54 Ω or 100 Ω, see Figure 3
∆|VOD| for Complementary
Output States
∆|VOD|
Common-Mode Output Voltage VOC
3.0
0.2
V
V
RL = 54 Ω or 100 Ω, see Figure 3
RL = 54 Ω or 100 Ω, see Figure 3
∆|VOC| for Complementary
Output States
∆|VOC|
Output Leakage Current (Y, Z)
IO
IO
IOS
100
250
μA
μA
mA
DE = 0 V, VDD2 = 0 V or 5 V, VIN = 12 V
DE = 0 V, VDD2 = 0 V or 5 V, VIN = −7 V
−100
Short-Circuit Output Current
Logic Inputs DE, RE, TxD
Input Threshold Low
Input Threshold High
Input Current
VILTxD
VIHTRxD
ITxD
0.25 × VDD1
−10
V
V
μA
0.7 × VDD1
+10
+0.01
30
RECEIVER
Differential Inputs
Differential Input Threshold
Input Voltage Hysteresis
Input Current (A, B)
VTH
VHYS
II
−0.2
+0.2
+1.0
V
mV
mA
mA
kΩ
VOC = 0 V
VOC = 12 V
VOC = −7 V
−0.8
12
Line Input Resistance
Logic Outputs
RIN
Output Voltage Low
Output Voltage High
Short-Circuit Current
Three-State Output Leakage
VOLRxD
VOHRxD
0.2
VDD1 − 0.2
0.4
V
V
IORxD = 1.5 mA, VA − VB = −0.2 V
IORxD = −1.5 mA, VA − VB = 0.2 V
VDD1 − 0.3
100
1
mA
μA
kV/μs
IOZR
VDD1 = 5.5 V, 0 V < VOUT < VDD1
VCM = 1 kV, transient magnitude = 800 V
COMMON-MODE TRANSIENT
IMMUNITY1
25
1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.
Rev. 0 | Page 3 of 16
ADM2491E
TIMING SPECIFICATIONS
TA = −40°C to +±5°C
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DRIVER
Maximum Data Rate
Propagation Delay
16
Mbps
ns
tPLH, tPHL
tPWD, tPWD
tR, tF
45
60
7
RL = 54 Ω, CL1 = C L2 = 100 pF,
see Figure 6 and Figure 10
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 10
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 10
RL = 110 Ω, CL = 50 pF,
Pulse Width Distortion,
PWD = |tPYLH − tPYHL|, PWD = |tPZLH − tPZHL
Single-Ended Output Rise/Fall Times
ns
ns
ns
ns
|
20
55
55
Enable Time
see Figure 8 and Figure 11
RL = 110 Ω, CL = 50 pF,
Disable Time
see Figure 8 and Figure 11
RECEIVER
Propagation Delay
Pulse Width Distortion, PWD = |tPLH − tPHL
Enable Time
tPLH, tPHL
tPWD
60
10
13
ns
ns
ns
CL = 15 pF, see Figure 7 and Figure 12
CL = 15 pF, see Figure 7 and Figure 12
RL = 1 kΩ, CL = 15 pF,
|
see Figure 9 and Figure 13
Disable Time
13
ns
RL = 1 kΩ, CL = 15 pF,
see Figure 9 and Figure 13
PACKAGE CHARACTERISTICS
Table 3.
Parameter
Symbol
RI-O
CI-O
Min
Typ
1012
3
Max
Unit
Test Conditions
Resistance (Input to Output)1
Capacitance (Input to Output)1
Input Capacitance2
Ω
pF
pF
f = 1 MHz
CI
4
Input IC Junction-to-Case Thermal Resistance
θJCI
33
°C/W
Thermocouple located at center
of package underside
Output IC Junction-to-Case Thermal Resistance
θJCO
28
°C/W
1 Device considered a 2-terminal device: Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15,
and Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION (PENDING)
Table 4.
UL1
VDE2
To be recognized under 1577 component recognition program1
To be certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122
5000 V rms isolation voltage
Reinforced insulation, 846 V peak
1 In accordance with UL 1577, each ADM2491E is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 10 μA).
2 In accordance with DIN V VDE V 0884-10, each ADM2491E is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial discharge detection
limit = 5 pC).
Rev. 0 | Page 4 of 16
ADM2491E
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 5.
Parameter
Symbol
Value
5000
7.7
Unit
Conditions
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
V rms
mm min
1 minute duration
Measured from input terminals to output
terminals, shortest distance through air
Measured from input terminals to output
terminals, shortest distance along body
L(I01)
L(I02)
Minimum External Tracking (Creepage)
8.1
mm min
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index) CTI
Isolation Group
0.017
>175
IIIa
mm min
V
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89)
VDE 0884 INSULATION CHARACTERISTICS (PENDING)
This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by
means of protective circuits.
An asterisꢀ (*) on a pacꢀage denotes kDE 0±±4 approval for ±4± k peaꢀ worꢀing voltage.
Table 6.
Description
Symbol
Characteristic
Unit
Installation Classification per DIN VDE 0110 for Rated Mains Voltage
≤300 V rms
≤450 V rms
≤600 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110, see Table 1)
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method b1
VIORM × 1.875 = VPR, 100% Production Tested, tm = 1 sec, Partial Discharge < 5 pC
Input-to-Output Test Voltage, Method a
After Environmental Tests, Subgroup 1
VIORM × 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC
After Input and/or Safety Test, Subgroup 2/Subgroup 3
VIORM × 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec)
Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure; see Figure 20)
Case Temperature
I to IV
I to II
I to II
40/105/21
2
VIORM
VPR
846
1590
V peak
V peak
VPR
1357
1018
6000
V peak
V peak
V peak
VTR
TS
150
265
335
>109
°C
Input Current
Output Current
Insulation Resistance at TS, VIO = 500 V
IS, INPUT
IS, OUTPUT
RS
mA
mA
Ω
Rev. 0 | Page 5 of 16
ADM2491E
ABSOLUTE MAXIMUM RATINGS
TA = 25 °C, unless otherwise noted. Each voltage is relative to its
respective ground.
ꢁtresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 7.
Parameter
Rating
Storage Temperature
Ambient Operating Temperature
VDD1
−55°C to +150°C
−40°C to +85°C
−0.5 V to +7 V
−0.5 V to +6 V
−0.5 V to VDD1 + 0.5 V
−9 V to +14 V
−0.5 V to VDD1 + 0.5 V
35 mA
Absolute maximum ratings apply individually only, not in
combination.
VDD2
Logic Input Voltages
Bus Terminal Voltages
Logic Output Voltages
Average Output Current, per Pin
ESD CAUTION
ESD (Human Body Model) on A, B, Y,
and Z pins
8 kV
Rev. 0 | Page 6 of 16
ADM2491E
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
V
1
2
3
4
5
6
7
8
16
V
DD1
DD2
GND
15 GND
1
2
RxD
RE
14
13
12
11
A
B
Z
ADM2491E
TOP VIEW
(Not to Scale)
DE
TxD
NC
Y
10 NC
GND
GND
9
1
2
NC = NO CONNECT
Figure 2. ADM2491E Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VDD1
Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between
0.01 μF and 0.1 μF.
2
3
4
GND1
RxD
RE
Ground (Logic Side).
Receiver Output.
Receiver Enable Input. Active low logic input. When this pin is low, the receiver is enabled; when high, the
receiver is disabled.
5
DE
Driver Enable Input. Active high logic input. When this pin is high, the driver (transmitter) is enabled;
when low, the driver is disabled.
6
7
8
9
10
11
12
13
14
15
16
TxD
NC
GND1
GND2
NC
Y
Transmit Data.
No Connect. This pin must be left floating.
Ground (Logic Side).
Ground (Bus Side).
No Connect. This pin must be left floating.
Driver Noninverting Output.
Driver Inverting Output.
Receiver Inverting Input.
Receiver Noninverting Input.
Ground (Bus Side).
Z
B
A
GND2
VDD2
Power Supply (Bus Side). Decoupling capacitor to GND2 required; capacitor value should be between
0.01 μF and 0.1 μF.
Rev. 0 | Page 7 of 16
ADM2491E
TEST CIRCUITS
R
L
2
C
C
Y
Z
L1
V
OD
R
LDIFF
R
L
V
2
OC
L2
Figure 3. Driver Voltage Measurement
Figure 6. Driver Propagation Delay
375Ω
A
V
V
TEST
OD
60Ω
V
OUT
B
C
L
375Ω
Figure 7. Receiver Propagation Delay
Figure 4. Driver Voltage Measurement
V
V
CC
DD1
V
DD2
V
OUT
Y
Z
R
L
ADM2491E
S1
S2
0V OR 3V
DE
DE
C
L
Y
Z
R
Figure 8. Driver Enable/Disable
TERMINATION
TxD
A
B
V
CC
V
OUT
S1
RxD
RE
+1.5V
–1.5V
R
A
B
L
S2
RE
C
L
RE IN
GND
GND
2
1
Figure 9. Receiver Enable/Disable
Figure 5. Supply Current Measurement Test Circuit
Rev. 0 | Page 8 of 16
ADM2491E
SWITCHING CHARACTERISTICS
V
DD1
TxD
0V
1.5V
1.5V
A, B
0V
0V
tPLH
tPHL
Z
Y
1/2V
OUT
V
OUT
tPLH
tPHL
VOH
tPWD = |tPLH
– tPHL|
RxD
1.5V
1.5V
V
OH
90% POINT
90% POINT
Y, Z
VOL
10% POINT
10% POINT
V
OL
tR
tF
Figure 10. Driver Propagation Delay, Rise/Fall Timing
Figure 12. Receiver Propagation Delay
V
DD1
V
DD1
DE
RE
0.5V
tZL
0.5V
DD1
0.5V
tZL
0.5V
DD1
DD1
DD1
0V
0V
tLZ
tLZ
2.3V
2.3V
1.5V
1.5V
RxD
Y, Z
Y, Z
V
+ 0.5V
– 0.5V
V
OL
+ 0.5V
– 0.5V
OL
OUTPUT LOW
OUTPUT HIGH
V
V
OL
OL
tZH
tHZ
tZH
tHZ
V
V
OH
OH
V
V
OH
OH
RxD
0V
0V
0V
Figure 11. Driver Enable/Disable Delay
Figure 13. Receiver Enable/Disable Delay
Rev. 0 | Page 9 of 16
ADM2491E
TYPICAL PERFORMANCE CHARACTERISTICS
60
50
40
30
20
10
0
2.58
NO LOAD
2.56
2.54
tPLH
tPHL
2.52
100Ω LOAD
2.50
2.48
54Ω LOAD
2.46
2.44
2.42
–40
–20
0
20
40
60
80
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Receiver Propagation Delay vs. Temperature
Figure 14. IDD1 Supply Current vs. Temperature
60
50
40
30
20
10
0
Δ: 2.12V
@: 7.72V
TxD
54Ω LOAD
1
Z
Y
100Ω LOAD
3
4
RxD
NO LOAD
CH1 2V
CH3 2V
Ω
Ω
CH2 2V
CH4 2V
Ω
Ω
M20ns
48ns
A CH1
2.32V
–40
–20
0
20
40
60
80
T
TEMPERATURE (°C)
Figure 18. Driver/Receiver Propagation Delay, Low to High
(RLDIFF = 54 Ω, CL1 = CL2 = 100 pF)
Figure 15. IDD2 Supply Current vs. Temperature
60
50
40
30
20
10
0
Δ: 2.12V
@: 7.72V
tPZHL
tPYLH
tPZLH
TxD
1
tPYHL
Z
Y
3
4
RxD
CH1 2V
CH3 2V
Ω
Ω
CH2 2V
CH4 2V
Ω
Ω
M20ns
48ns
A CH1
3.24V
–40
–20
0
20
40
60
80
T
TEMPERATURE (°C)
Figure 19. Driver/Receiver Propagation Delay, High to Low
(RLDIFF = 54 Ω, CL1 = CL2 = 100 pF)
Figure 16. Driver Propagation Delay vs. Temperature
Rev. 0 | Page 10 of 16
ADM2491E
350
300
250
200
150
100
50
4.76
4.75
4.74
4.73
4.72
4.71
4.70
4.69
4.68
4.67
4.66
4.65
SIDE 2
SIDE 1
0
0
50
100
CASE TEMPERATURE (°C)
150
200
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 20. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Case Temperature per VDE 0884
Figure 23. Receiver Output High Voltage vs. Temperature,
IRxD = −4 mA
0
–2
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
–4
–6
–8
–10
–12
–14
4.0
4.2
4.4
4.6
4.8
5.0
–40
–20
0
20
40
60
80
RECEIVER OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 21. Output Current vs. Receiver Output High Voltage
Figure 24. Receiver Output Low Voltage vs. Temperature,
RxD = –4 mA
I
16
14
12
10
8
6
4
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
RECEIVER OUTPUT VOLTAGE (V)
Figure 22. Output Current vs. Receiver Output Low Voltage
Rev. 0 | Page 11 of 16
ADM2491E
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
TRUTH TABLES
In the ADM2491E, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 25). The driver input signal, which is applied to the
TxD pin and referenced to logic ground (GND1), is coupled
across an isolation barrier to appear at the transceiver section
referenced to isolated ground (GND2). ꢁimilarly, the receiver
input, which is referenced to isolated ground in the transceiver
section, is coupled across the isolation barrier to appear at the
RxD pin referenced to logic ground.
The truth tables in this section use the abbreviations shown in
Table 9.
Table 9. Truth Table Abbreviations
Letter
Description
H
L
High level
Low level
I
X
Z
Indeterminate
Irrelevant
High impedance (off)
Disconnected
NC
iCoupler Technology
The digital signals are transmitted across the isolation barrier
using iCoupler technology. This technique uses chip scale
transformer windings to couple the digital signals magnetically
from one side of the barrier to the other. Digital inputs are
encoded into waveforms that are capable of exciting the
primary transformer winding. At the secondary winding, the
induced waveforms are decoded into the binary value that was
originally transmitted.
Table 10. Transmitting
Supply Status
Inputs
TxD
Outputs
VDD1
On
On
On
On
Off
Off
VDD2
On
On
On
Off
On
Off
DE
H
H
L
X
L
Y
H
L
Z
Z
Z
Z
Z
L
H
L
X
X
L
H
Z
Z
Z
Z
V
V
DD1
DD2
X
X
ISOLATION
BARRIER
DE
ENCODE
ENCODE
DECODE
DECODE
DECODE
ENCODE
Table 11. Receiving
Supply Status
Inputs
Output
Y
Z
RE
RxD
H
L
VDD1
On
On
On
On
On
On
Off
VDD2
On
On
On
On
On
Off
Off
A − B (V)
>0.2
TxD
D
L or NC
L or NC
L or NC
L or NC
H
<−0.2
A
B
−0.2 < A − B < +0.2
I
RxD
RE
R
Inputs open
H
Z
X
X
X
DIGITAL ISOLATION
TRANSCEIVER
L or NC
L or NC
H
L
GND
GND
2
1
Figure 25. ADM2491E Digital Isolation and Transceiver Sections
Rev. 0 | Page 12 of 16
ADM2491E
100
10
THERMAL SHUTDOWN
The ADM2491E contains thermal shutdown circuitry that
protects the part from excessive power dissipation during fault
conditions. ꢁhorting the driver outputs to a low impedance
source can result in high driver currents. The thermal sensing
circuitry detects the increase in die temperature under this
condition and disables the driver outputs. This circuitry is
designed to disable the driver outputs when a die temperature
of 150°C is reached. As the device cools, the drivers are
re-enabled at a temperature of 140°C.
1
0.1
0.01
0.001
FAIL-SAFE RECEIVER INPUTS
1k
10k
100k
1M
10M
100M
The receiver inputs include a fail-safe feature that guarantees a
logic high on the RxD pin when the A and B inputs are floating
or open circuited.
MAGNETIC FIELD FREQUENCY (Hz)
Figure 26. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 ꢀgauss induces a
voltage of 0.25 k at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
ꢁimilarly, if such an event occurs during a transmitted pulse and
is the worst-case polarity, it reduces the received pulse from
>1.0 k to 0.75 k—still well above the 0.5 k sensing threshold of
the decoder.
MAGNETIC FIELD IMMUNITY
Because iCoupler devices use a coreless technology, no magnetic
components are present and the problem of magnetic saturation
of the core material does not exist. Therefore, iCoupler devices
have essentially infinite dc field immunity. The following analysis
defines the conditions under which this may occur. The 3 k
operating condition of the ADM2491E is examined because it
represents the most susceptible mode of operation.
Figure 27 shows the magnetic flux density values in terms of
more familiar quantities, such as maximum allowable current
flow, at given distances away from the ADM2491E transformers.
1000
The limitation on the ac magnetic field immunity of the
iCoupler is set by the condition that induced an error voltage in
the receiving coil (the bottom coil in this case) that was large to
either falsely set or reset the decoder. The voltage induced
across the bottom coil is given by
DISTANCE = 1m
100
−dβ
⎛
⎜
⎞
⎟
2
V = −
πr ; n =1, 2, . . . , N
DISTANCE = 5mm
10
∑
n
dt
⎝
⎠
where (if the pulses at the transformer output are greater than
1.0 k in amplitude):
DISTANCE = 100mm
1
β is the magnetic flux density (gauss).
N is the number of turns in receiving coil.
0.1
rn is the radius of nth turn in receiving coil (cm).
The decoder has a sensing threshold of about 0.5 k; therefore,
there is a 0.5 k margin in which induced voltages can be
tolerated.
0.01
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 27. Maximum Allowable Current for
Various Current-to-ADM2491E Spacings
Given the geometry of the receiving coil and an imposed
requirement that the induced voltage is, at most, 50% of the
0.5 k margin at the decoder, a maximum allowable magnetic
field is calculated, as shown in Figure 26.
With combinations of strong magnetic field and high frequency,
any loops formed by printed circuit board traces could induce
error voltages large enough to trigger the thresholds of succeeding
circuitry. Care should be taꢀen in the layout of such traces to
avoid this possibility.
Rev. 0 | Page 13 of 16
ADM2491E
APPLICATIONS INFORMATION
ISOLATED POWER SUPPLY CIRCUIT
PCB LAYOUT
The ADM2491E requires isolated power capable of 5 k at up to
approximately 75 mA (this current is dependant on the data
rate and termination resistors used) to be supplied between the
kDD2 and the GND2 pins. A transformer driver circuit with a
center-tapped transformer and LDO can be used to generate the
isolated 5 k supply, as shown in Figure 2±. The center-tapped
transformer provides electrical isolation of the 5 k power
supply. The primary winding of the transformer is excited with
a pair of square waveforms that are 1±0° out of phase with each
other. A pair of ꢁchottꢀy diodes and a smoothing capacitor are
used to create a rectified signal from the secondary winding.
The ADP3330 linear voltage regulator provides a regulated
power supply to the bus-side circuitry (kDD2) of the
The ADM2491E isolated Rꢁ-4±5 transceiver requires no external
interface circuitry for the logic interfaces. Power supply bypass-
ing is required at the input and output supply pins (see Figure 29).
Bypass capacitors are conveniently connected between Pin 1
and Pin 2 for kDD1 and between Pin 15 and Pin 16 for kDD2. The
capacitor value should be between 0.01 μF and 0.1 μF. The total
lead length between both ends of the capacitor and the input
power supply pin should not exceed 20 mm. Bypassing between
Pin 1 and Pin ± and between Pin 9 and Pin 16 should also be
considered unless the ground pair on each pacꢀage side is
connected close to the pacꢀage.
V
V
DD1
GND
DD2
GND
A
B
1
2
RxD
RE
ADM2491E.
ADM2491E
DE
Z
ISOLATION
BARRIER
TxD
NC
Y
NC
GND
V
CC
SD103C
GND
1
2
5V
IN
OUT
ADP3330
NC = NO CONNECT
+
+
22µF
SD
ERR
NR
10µF
Figure 29. Recommended Printed Circuit Board Layout
V
TRANSFORMER
DRIVER
CC
In applications involving high common-mode transients, care
should be taꢀen to ensure that board coupling across the isola-
tion barrier is minimized. Furthermore, the board layout should
be designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the absolute
maximum ratings of the device, thereby leading to latch-up or
permanent damage.
GND
78253
SD103C
V
CC
V
V
DD2
DD1
ADM2491E
GND
GND
2
1
Figure 28. Isolated Power Supply Circuit
Rev. 0 | Page 14 of 16
ADM2491E
and stub lengths off the main line must be ꢀept as short as
TYPICAL APPLICATIONS
possible. For half-duplex operation, this means that both ends
of the line must be terminated, because either end can be the
receiving end.
Figure 30 and Figure 31 show typical applications of the
ADM2491E in half-duplex and full-duplex Rꢁ-4±5 networꢀ
configurations. Up to 32 transceivers can be connected to the
Rꢁ-4±5 bus. To minimize reflections, the line must be
terminated at the receiving end in its characteristic impedance,
V
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 32
CC
ADM2491E
ADM2491E
A
B
A
B
R1
RxD
RxD
R
R
RE
DE
RE
R
R
T
T
DE
Z
Y
Z
Y
TxD
D
TxD
D
R2
A
B
Z
Y
A
B
Z
Y
R
R
D
D
ADM2491E
ADM2491E
RxD RE DE TxD
NOTES
RxD
DE TxD
RE
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
T
2. ISOLATION NOT SHOWN.
Figure 30. ADM2491E Typical Half-Duplex RS-485 Network
MAXIMUM NUMBER OF NODES = 32
V
T
DD
R1
MASTER
R
SLAVE
D
A
B
Z
Y
Z
RxD
RE
TxD
R
DE
V
DD
R1
R
R2
B
A
RE
DE
T
D
TxD
RxD
R
Y
R2
ADM2491E
ADM2491E
A
B
Z
Y
A
B
Z
Y
SLAVE
SLAVE
R
R
D
D
ADM2491E
ADM2491E
RxD RE DE TxD
RxD RE DE TxD
NOTES
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
T
Figure 31. ADM2491E Typical Full -Duplex RS-485 Network
Rev. 0 | Page 15 of 16
ADM2491E
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0098)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
0.25 (0.
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 32. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADM2491EBRWZ1
ADM2491EBRWZ–REEL71
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
RW-16
RW-16
16-Lead Standard Small Outline Package, Wide Body [SOIC_W]
16-Lead Standard Small Outline Package, Wide Body [SOIC_W]
1 Z = RoHS Compliant Part.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06985-0-10/07(0)
Rev. 0 | Page 16 of 16
相关型号：
ADM2491EBRWZ-REEL7
High Speed, ESD-Protected, Half-/Full-Duplex Coupler Isolated RS-485 Transceiver
ADI
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