ADM489ARUZ-REEL [ADI]
5 V, Slew-Rate Limited, Low Power, 250 kbps, Full Duplex EIA RS-485 Transceiver (with DE/RE);
| 型号： | ADM489ARUZ-REEL |
| 厂家： | 
ADI |
| 描述： | 5 V, Slew-Rate Limited, Low Power, 250 kbps, Full Duplex EIA RS-485 Transceiver (with DE/RE) 驱动 信息通信管理 光电二极管 接口集成电路 驱动器 |
| 文件： | 总16页 (文件大小：290K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Full-Duplex, Low Power,
Slew Rate Limited, EIA RS-485 Transceivers
ADM488/ADM489
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
Meets EIA RS-485 and RS-422 standards
250 kbps data rate
Single 5 V 10% supply
−7 V to +12 V bus common-mode range
12 kΩ input impedance
2 kV EFT protection meets IEC1000-4-4
High EM immunity meets IEC1000-4-3
Reduced slew rate for low EM interference
Short-circuit protection
ADM488
A
R
RO
DI
B
Z
Y
D
Figure 1.
Excellent noise immunity
30 μA supply current
ADM489
A
B
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
R
RO
RE
DE
DI
Z
Y
D
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
Figure 2.
GENERAL DESCRIPTION
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488 and ADM489 are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both Electronics Industries
Association (EIA) RS-485 and RS-422 standards. Both products
contain a single differential line driver and a single differential
line receiver, making them suitable for full-duplex data transfer.
The ADM489 contains an additional receiver and driver enable
control.
The ADM488/ADM489 are fabricated on BiCMOS, an
advanced mixed technology process combining low power
CMOS with fast switching bipolar technology.
The ADM488/ADM489 are fully specified over the industrial
temperature range and are available in PDIP, SOIC, and TSSOP
packages.
The input impedance is 12 kΩ, allowing 32 transceivers to be
connected on the bus.
The ADM488/ADM489 operate from a single 5 V 1ꢀ0 power
supply. Excessive power dissipation caused by bus contention or
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADM488/ADM489
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 11
EFT Transient Protection Scheme ........................................... 11
Fast Transient Burst Immunity (IEC1ꢀꢀꢀ-4-4)...................... 11
Radiated Immunity (IEC1ꢀꢀꢀ-4-3) ......................................... 12
EMI Emissions............................................................................ 13
Conducted Emissions ................................................................ 13
Application Information................................................................ 14
Differential Data Transmission ................................................ 14
Cable and Data Rate................................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test Circuits................................................................................... 7
Switching Characteristics ............................................................ 8
Typical Performance Characteristics ............................................. 9
REVISION HISTORY
4/06—Rev. C to Rev. D
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
11/04—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to Receiving Truth Table Inputs Data Section............ 11
Renamed General Information to Theory of Operation........... 12
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
5/01—Rev. A to Rev. B
Changes to Absolute Maximum Ratings Section......................... 3
3/01—Rev. 0 to Rev. A
Changes to ESD Specification, Absolute Maximum Ratings...... 3
6/97—Revision 0: Initial Version
Rev. D | Page 2 of 16
ADM488/ADM489
SPECIFICATIONS
VCC = 5 V 1ꢀ0. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
V
V
V
V
V
V
V
mA
mA
V
V
μA
R = ∞, see Figure 6
2.0
1.5
1.5
VCC = 5 V, R = 50 Ω (RS-422), see Figure 6
R = 27 Ω (RS-485), see Figure 6
VTST = –7 V to +12 V, see Figure 7, VCC = 5 V 5ꢀ
R = 27 Ω or 50 Ω, see Figure 6
R = 27 Ω or 50 Ω, see Figure 6
R = 27 Ω or 50 Ω
Δ|VOD| for Complementary Output States
Common-Mode Output Voltage, VOC
Δ|VOC| for Complementary Output States
Output Short-Circuit Current (VOUT = High)
Output Short-Circuit Current (VOUT = Low)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Input Current (DE, DI)
−7 V ≤ VO ≤ +12 V
−7 V ≤ VO ≤ +12 V
1.4
1.4
2.0
1.0
RECEIVER
Differential Input Threshold Voltage, VTH
Input Voltage Hysteresis, Δ VTH
Input Resistance
−0.2
12
+0.2
V
−7 V ≤ VCM ≤ +12 V
VCM = 0 V
−7 V ≤ VCM ≤ +12 V
VIN = 12 V
70
mV
kΩ
mA
mA
μA
V
V
mA
μA
Input Current (A, B)
1
−0.8
1
VIN = –7 V
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL
CMOS Output Voltage High, VOH
Short-Circuit Output Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
ICC
0.4
IOUT = +4.0 mA
IOUT = −4.0 mA
VOUT = GND or VCC
0.4 V ≤ VOUT ≤ +2.4 V
Outputs unloaded, receivers enabled
DE = 0 V (disabled)
DE = 5 V (enabled)
4.0
7
85
1.0
30
37
60
74
μA
μA
Rev. D | Page 3 of 16
ADM488/ADM489
TIMING SPECIFICATIONS
VCC = 5 V 1ꢀ0. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Min Typ
Max
Unit
Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, TPLH, TPHL
250
100
250
2000
800
ns
ns
ns
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
Driver O/P to OP, TSKEW
Driver Rise/Fall Time, TR, TF
2000
Driver Enable to Output Valid
Driver Disable Timing
Data Rate
250
300
250
2000
3000
ns
ns
kbps
RL = 500 Ω, CL = 100 pF, see Figure 7
RL = 500 Ω, CL = 15 pF, see Figure 7
RECEIVER
Propagation Delay Input to Output, TPLH, TPHL
250
100
10
2000
ns
ns
ns
ns
CL = 15 pF, see Figure 10
Skew |TPLH − TPHL
|
Receiver Enable, TEN1
Receiver Disable, TEN2
Data Rate
50
50
RL = 1 kΩ, CL = 15 pF, see Figure 9
RL = 1 kΩ, CL = 15 pF, see Figure 9
10
250
kbps
Rev. D | Page 4 of 16
ADM488/ADM489
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
VCC
7 V
Inputs
Driver Input (DI)
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
−14 V to +14 V
Control Inputs (DE, RE)
Receiver Inputs (A, B)
Outputs
Driver Outputs
Receiver Output
−14 V to +12.5 V
−0.5 V to VCC + 0.5 V
700 mW
120°C/W
520 mW
110°C/W
800 mW
140°C/W
800 mW
Power Dissipation 8-Lead PDIP
θJA, Thermal Impedance
Power Dissipation 8-Lead SOIC
θJA, Thermal Impedance
Power Dissipation 14-Lead PDIP
θJA, Thermal Impedance
Power Dissipation 14-Lead SOIC
θJA, Thermal Impedance
Power Dissipation 16-Lead TSSOP
θJA, Thermal Impedance
Operating Temperature Range
Industrial (A Version)
Storage Temperature Range
120°C/W
800 mW
150°C/W
−40°C to +85°C
−65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Association S5.1 HBM Standard
EFT Rating, IEC1000-4-4
215°C
220°C
3 kV
2 kV
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. D | Page 5 of 16
ADM488/ADM489
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
1
2
3
4
8
7
6
5
A
B
Z
CC
ADM488
RO
DI
TOP VIEW
(Not to Scale)
GND
Y
Figure 3. ADM488 8-Lead PDIP/SOIC Pin Configuration
Table 4. ADM488 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
8
VCC
RO
DI
GND
Y
Z
B
A
Power Supply, 5 V 10ꢀ.
Receiver Output. When A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.
Driver Input. A logic low on DI forces Y low and Z high, while a logic high on DI forces Y high and Z low.
Ground Connection, 0 V.
Noninverting Driver, Output Y.
Inverting Driver, Output Z.
Inverting Receiver, Input B.
Noninverting Receiver, Input A.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
NC
A
CC
NC
RO
NC
RO
1
B
14
V
CC
ADM489
TOP VIEW
2
3
4
5
6
7
13 NC
RE
NC
Z
(Not to Scale)
ADM489
RE
12
11
10
9
A
DE
TOP VIEW
(Not to Scale)
DE
B
DI
Y
DI
Z
GND
GND
NC
NC
GND
GND
Y
8
NC
NC = NO CONNECT
NC = NO CONNECT
Figure 4. ADM489 14-Lead PDIP/SOIC Pin Configuration
Figure 5. ADM489 16-Lead TSSOP Pin Configuration
Table 5. ADM489 Pin Function Descriptions
PDIP/SOIC
Pin No.
TSSOP
Pin No.
Mnemonic Description
1, 8, 13
2, 9, 10, 13,
16
NC
RO
RE
DE
DI
No Connect. No connections are required to this pin.
2
3
4
5
3
4
5
6
Receiver Output. When enabled, if A > B by 200 mV then RO = high. If A < B by 200 mV then
RO = low.
Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a
high impedance state.
Driver Output Enable. A high level enables the driver differential outputs, Y and Z. A low level
places it in a high impedance state.
Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, while a logic
high on DI forces Y high and Z low.
6, 7
9
10
11
12
14
7, 8
11
12
14
15
1
GND
Y
Z
B
A
Ground Connection, 0 V.
Noninverting Driver, Output Y.
Inverting Driver, Output Z.
Inverting Receiver, Input B.
Noninverting Receiver, Input A.
Power Supply, 5 V 10ꢀ.
VCC
Rev. D | Page 6 of 16
ADM488/ADM489
TEST CIRCUITS
V
CC
R
R
A
B
V
OD
R
L
0V OR 3V
DE IN
S1
S2
V
DE
OC
C
V
L
OUT
Figure 8. Driver Voltage Measurement Test Circuit 2
Figure 6. Driver Voltage Measurement Test Circuit
V
CC
+1.5V
375Ω
S1
R
L
S2
RE
–1.5V
V
C
L
60Ω
375Ω
OD3
V
TST
V
OUT
RE IN
Figure 9. Receiver Enable/Disable Test Circuit
3V
DE
Figure 7. Driver Enable/Disable Test Circuit
A
B
C
C
Y
Z
L1
RO
DI
RL
D
DIFF
R
L2
RE
Figure 10. Driver/Receiver Propagation Delay Test Circuit
Rev. D | Page 7 of 16
ADM488/ADM489
SWITCHING CHARACTERISTICS
3V
3V
0V
1.5V
1.5V
T
PLH
1.5V
LZ
DE
A, B
A, B
1.5V
0V
T
PHL
B
T
ZL
T
1/2VO
VO
A
2.3V
2.3V
V
+ 0.5V
OL
T
T
SKEW
SKEW
V
V
OL
OH
+VO
90% POINT
90% POINT
T
T
ZH
HZ
0V
V
– 0.5V
OH
10% POINT
10% POINT
–VO
T
R
T
F
0V
Figure 11. Driver Propagation Delay, Rise/Fall Timing
Figure 13. Driver Enable/Disable Timing
3V
0V
RE
1.5V
1.5V
T
T
ZL
LZ
0V
0V
A–B
R
1.5V
1.5V
V
+ 0.5V
O/P LOW
O/P HIGH
OL
V
V
OL
T
T
PLH
PHL
T
T
ZH
HZ
V
V
OH
OH
RO
V
– 0.5V
1.5V
1.5V
OH
R
0V
OL
Figure 14. Receiver Enable/Disable Timing
Figure 12. Receiver Propagation Delay
Rev. D | Page 8 of 16
ADM488/ADM489
TYPICAL PERFORMANCE CHARACTERISTICS
40
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
35
30
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
0.5
1.0
1.5
2.0
2.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 15. Output Current vs. Receiver Output Low Voltage
Figure 18. Output Current vs. Driver Output High Voltage
0
80
70
60
50
40
30
20
10
0
–5
–10
–15
–20
3.4
3.6
3.8
4.0
4.2
4.4
4.6
4.8
5.0
0
0.5
1.0
1.5
OUTPUT VOLTAGE (V)
3.5
4.5
2.0
2.5
3.0
4.0
OUTPUT VOLTAGE (V)
Figure 16. Output Current vs. Receiver Output High Voltage
Figure 19. Output Current vs. Driver Differential Output Voltage
90
80
70
60
50
40
30
20
10
0
T
100
T
T
90
RO
DI
10
0%
0
3.0
0.5
1.0
1.5
2.0
2.5
OUTPUT VOLTAGE (V)
Figure 17. Output Current vs. Driver Output Low Voltage
Figure 20. Driving 4000 Ft. of Cable
Rev. D | Page 9 of 16
ADM488/ADM489
80
70
60
50
40
30
20
10
0
100
90
LIMIT
10
0%
0.3
0.6
1
3
6
10
30
0
500kHz/DIV
5MHz
log FREQUENCY (0.15–30) (MHz)
Figure 23. Conducted Emissions
Figure 21. Driver Output Waveform and FFT Plot Transmitting at 150 kHz
80
70
60
50
40
30
20
10
0
LIMIT
30
200
FREQUENCY (MHz)
Figure 22. Radiated Emissions
Rev. D | Page 10 of 16
ADM488/ADM489
THEORY OF OPERATION
The ADM488/ADM489 are ruggedized RS-485 transceivers
that operate from a single 5 V supply. They contain protection
against radiated and conducted interference and are ideally
suited for operation in electrically harsh environments or where
cables can be plugged/unplugged. They are also immune to
high RF field strengths without special shielding precautions.
They are intended for balanced data transmission and comply
with both EIA RS-485 and RS-422 standards. They contain a
differential line driver and a differential line receiver, and are
suitable for full-duplex data transmission.
Table 6 and Table 7 show the truth tables for transmitting and
receiving.
Table 6. Transmitting Truth Table
Inputs
Outputs
RE
DE
DI
Z
Y
X1
X1
0
1
1
0
0
1
0
X1
X1
0
1
Hi-Z
Hi-Z
1
0
Hi-Z
Hi-Z
1
1 X = Don’t care.
The input impedance on the ADM488/ADM489 is 12 kΩ,
allowing up to 32 transceivers on the differential bus. The
ADM488/ADM489 operate from a single 5 V 1ꢀ0 power
supply. A thermal shutdown circuit prevents excessive power
dissipation caused by bus contention or by output shorting.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
Table 7. Receiving Truth Table
Inputs
Output
RO
RE
DE
A to B
0
0
0
1
0
0
0
0
≥ +0.2 V
≤ −0.2 V
Inputs O/C
X1
1
0
1
Hi-Z
1 X = Don’t care.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating). A
high level of robustness is achieved using internal protection
circuitry, eliminating the need for external protection com-
ponents such as tranzorbs or surge suppressors. Furthermore,
low electromagnetic emissions are achieved using slew limited
drivers, minimizing interference both conducted and radiated.
EFT TRANSIENT PROTECTION SCHEME
The ADM488/ADM489 use protective clamping structures on
their inputs and outputs that clamp the voltage to a safe level
and dissipate the energy present in ESD (electrostatic) and EFT
(electrical fast transients) discharges.
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
The ADM488/ADM489 can transmit at data rates up to
25ꢀ kbps. A typical application for the ADM488/ADM489 is
illustrated in Figure 24 showing a full-duplex link where data is
transferred at rates of up to 25ꢀ kbps. A terminating resistor is
shown at both ends of the link. This termination is not critical
because the slew rate is controlled by the ADM488/ADM489
and reflections are minimized.
IEC1ꢀꢀꢀ-4-4 (previously 8ꢀ1-4) covers electrical fast transient
burst (EFT) immunity. Electrical fast transients occur as a result
of arcing contacts in switches and relays. The tests simulate the
interference generated when, for example, a power relay disconnects
an inductive load. A spark is generated due to the well known
back EMF effect. In fact, the spark consists of a burst of sparks
as the relay contacts separate. The voltage appearing on the line,
therefore, consists of a burst of extremely fast transient impulses.
A similar effect occurs when switching on fluorescent lights.
5V
5V
0.1µF
0.1µF
V
V
CC
CC
DE
DI
RE
RO
The fast transient burst test, defined in IEC1ꢀꢀꢀ-4-4, simulates
this arcing, and its waveform is illustrated in Figure 25. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at
3ꢀꢀ ms intervals. It is specified for both power and data lines.
A
B
Y
Z
R
D
ADM488
ADM489
RS-485/RS-422 LINK
Z
Y
B
A
DI
RO
RE
R
D
Four severity levels are defined in terms of an open-circuit voltage
as a function of installation environment. The installation
environments are defined as
DE
GND
GND
Figure 24. ADM488/ADM489 Full-Duplex Data Link
•
•
•
•
Well protected
Protected
The communications network can be extended to include
multipoint connections, as shown in Figure 3ꢀ. As many as
32 transceivers can be connected to the bus.
Typical industrial
Severe industrial
Rev. D | Page 11 of 16
ADM488/ADM489
V
Test results are classified according to the following:
•
•
Normal performance within specification limits.
t
Temporary degradation or loss of performance that is self-
recoverable.
300ms
16ms
V
•
•
Temporary degradation or loss of function or performance
that requires operator intervention or system reset.
5ns
Degradation or loss of function that is not recoverable due
to damage.
50ns
t
0.2/0.4ms
The ADM488/ADM489 have been tested under worst-case
conditions using unshielded cables, and meet Classification 2 at
Severity Level 4. Data transmission during the transient
condition is corrupted, but it can be resumed immediately
following the EFT event without user intervention.
Figure 25. IEC1000-4-4 Fast Transient Waveform
Table 8 shows the peak voltages for each of the environments.
Table 8. Peak Voltages
Level
VPEAK (kV) PSU
VPEAK (kV) I/O
RADIATED IMMUNITY (IEC1000-4-3)
1
2
3
4
0.5
1
2
0.25
0.5
1
IEC1ꢀꢀꢀ-4-3 (previously IEC8ꢀ1-3) describes the measurement
method and defines the levels of immunity to radiated electro-
magnetic fields. It was originally intended to simulate the
electromagnetic fields generated by portable radio transceivers
or any other device that generates continuous wave-radiated
electromagnetic energy. Its scope has been broadened to include
spurious EM energy, which can be radiated from fluorescent
lights, thyristor drives, inductive loads, and so on.
4
2
A simplified circuit diagram of the actual EFT generator is
shown in Figure 26.
These transients are coupled onto the signal lines using an EFT
coupling clamp. The clamp is 1 m long and completely sur-
rounds the cable, providing maximum coupling capacitance
(5ꢀ pF to 2ꢀꢀ pF typical) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns), as specified by the standard, result in very
effective coupling. This test is very severe because high voltages
are coupled onto the signal lines. The repetitive transients often
cause problems, while single pulses do not. Destructive latch-up
can be induced due to the high energy content of the transients.
Note that this stress is applied while the interface products are
powered up and transmitting data. The EFT test applies hun-
dreds of pulses with higher energy than ESD. Worst-case
transient current on an I/O line can be as high as 4ꢀ A.
Testing for immunity involves irradiating the device with an
EM field. Test methods include the use of anechoic chamber,
stripline cell, TEM cell, and GTEM cell. These consist of two
parallel plates with an electric field developed between them.
The device under test is placed between the plates and exposed
to the electric field. The three severity levels have field strengths
ranging from 1 V/m to 1ꢀ V/m. Results are classified as follows:
•
•
Normal operation.
Temporary degradation or loss of function that is self-
recoverable when the interfering signal is removed.
•
•
Temporary degradation or loss of function that requires
operator intervention or system reset when the interfering
signal is removed.
C
D
R
R
M
L
HIGH
VOLTAGE
SOURCE
C
50Ω
OUTPUT
Z
C
S
C
Degradation or loss of function that is not recoverable due
to damage.
Figure 26. EFT Generator
Rev. D | Page 12 of 16
ADM488/ADM489
The ADM488/ADM489 comfortably meet Classification 1 at
the most stringent (Level 3) requirement. In fact, field strengths
up to 3ꢀ V/m showed no performance degradation, and error-
free data transmission continued even during irradiation.
The objective is to control the level of both conducted and
radiated emissions.
For ease of measurement and analysis, conducted emissions are
assumed to predominate below 3ꢀ MHz, while radiated
emissions predominate above this frequency.
Table 9. Field Strengths
Level V/m
Field Strength
CONDUCTED EMISSIONS
1
2
3
1
3
10
Conducted emissions are a measure of noise that is conducted
onto the main power supply. The noise is measured using a
LISN (line impedance stabilizing network) and a spectrum
analyzer. The test setup is shown in Figure 28. The spectrum
analyzer is set to scan the spectrum from ꢀ MHz to 3ꢀ MHz.
Figure 29 shows that the level of conducted emissions from the
ADM488/ADM489 is well below the maximum allowable
limits.
EMI EMISSIONS
The ADM488/ADM489 contain internal slew rate limiting to
minimize the level of electromagnetic interference generated.
Figure 27 shows an FFT plot when transmitting a 15ꢀ kHz data
stream.
SPECTRUM
ANALYZER
100
90
DUT
LISN
PSU
Figure 28. Conducted Emissions Test Setup
10dB/DIV
80
70
60
50
40
30
20
10
0
10
0%
LIMIT
0
500kHz/DIV
5MHz
Figure 27. Driver Output Waveform and FFT Plot Transmitting at 150 kHz
The slew limiting attenuates the high frequency components.
EMI is, therefore, reduced, as are reflections due to improperly
terminated cables.
0.6
36
10
0.3
1
30
EN55ꢀ22, CISPR22 defines the permitted limits of radiated and
conducted interference from information technology
equipment (ITE).
log FREQUENCY (0.15–30) (MHz)
Figure 29. Conducted Emissions
Rev. D | Page 13 of 16
ADM488/ADM489
APPLICATION INFORMATION
DIFFERENTIAL DATA TRANSMISSION
CABLE AND DATA RATE
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals, which appear as common-mode voltages on
the line. Two main standards that specify the electrical
characteristics of transceivers used in differential data
transmission are approved by the EIA.
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted-pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields gener-
ated by the current flowing through each wire, thereby reducing
the effective inductance of the pair.
The ADM488/ADM489 are designed for bidirectional data
communications on multipoint transmission lines. A typical
application showing a multipoint transmission network is
illustrated in Figure 3ꢀ. An RS-485 transmission line can have
up to 32 transceivers on the bus. Only one driver can transmit
at a particular time, but multiple receivers can be simultane-
ously enabled.
The RS-422 standard specifies data rates up to 1ꢀ MBaud and
line lengths up to 4ꢀꢀꢀ ft. A single driver can drive a transmis-
sion line with up to 1ꢀ receivers.
To cater to true multipoint communications, the RS-485 stan-
dard was defined to meet or exceed the requirements of RS-422.
It also allows up to 32 drivers and 32 receivers to be connected
to a single bus. An extended common-mode range of −7 V to
+12 V is defined. The most significant difference between the
RS-422 and RS-485 is that the RS-485 drivers can be disabled,
thereby allowing up to 32 receivers to be connected to a single
line. Only one driver should be enabled at a time, but the RS-
485 standard contains additional specifications to guarantee
device safety in the event of line contention.
As with any transmission line, it is important that reflections be
minimized. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic im-
pedance of the line. Stub lengths of the main line should also be
kept as short as possible. A properly terminated transmission
line appears purely resistive to the driver.
Table 10. Comparison of RS-422 and RS-485 Interface Standards
Specification
RS-422
Differential
10 MB/s
4000 ft.
2 V
RS-485
Transmission Type
Maximum Data Rate
Differential
10 MB/s
4000 ft.
1.5 V
54 Ω
12 kΩ minimum
200 mV
−7 V to +12 V
32/32
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
Number of Drivers/Receivers per Line
RT
100 Ω
4 kΩ minimum
200 mV
−7 V to +7 V
1/10
RT
D
D
R
R
R
R
D
D
Figure 30. Typical RS-485 Network
Rev. D | Page 14 of 16
ADM488/ADM489
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.775 (19.69)
0.750 (19.05)
0.735 (18.67)
14
1
8
7
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
PIN 1
0.100 (2.54)
BSC
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
0.210
(5.33)
MAX
0.015
(0.38)
MIN
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 31. 8-Lead Plastic Dual In-Line Package [PDIP]
Figure 33. 14-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
Narrow Body
(N-14)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8.75 (0.3445)
8.55 (0.3366)
8
1
5
4
14
1
8
7
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
1.75 (0.0689)
1.35 (0.0531)
× 45°
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0039)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
8°
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 32. 8-Lead Standard Small Outline Package [SOIC_N]
Figure 34. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Narrow Body
(R-14)
Dimensions show in millimeters and (inches)
Dimensions shown in millimeters and (inches)
Rev. D | Page 15 of 16
ADM488/ADM489
5.10
5.00
4.90
16
9
8
4.50
4.40
4.30
6.40
BSC
1
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.75
0.60
0.45
8°
0°
0.30
0.19
0.65
BSC
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADM488AN
ADM488ANZ1
Temperature Range Package Description
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Plastic Dual In-Line Package [PDIP]
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
ADM488AR
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
14-Lead Plastic Dual In-Line Package [PDIP]
ADM488AR-REEL
ADM488AR-REEL7
ADM488ARZ1
ADM488ARZ-REEL1
ADM488ARZ-REEL71
ADM489AN
N-14
N-14
R-14
R-14
R-14
R-14
R-14
R-14
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
ADM489ANZ1
ADM489AR
14-Lead Plastic Dual In-Line Package [PDIP]
14-Lead Standard Small Outline Package [SOIC_N]
14-Lead Standard Small Outline Package [SOIC_N]
14-Lead Standard Small Outline Package [SOIC_N]
14-Lead Standard Small Outline Package [SOIC_N]
14-Lead Standard Small Outline Package [SOIC_N]
14-Lead Standard Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
ADM489AR-REEL
ADM489AR-REEL7
ADM489ARZ1
ADM489ARZ-REEL1
ADM489ARZ-REEL71
ADM489ARU
ADM489ARU-REEL
ADM489ARU-REEL7
ADM489ARUZ1
ADM489ARUZ-REEL1
ADM489ARUZ-REEL71
1 Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00079-0-4/06(D)
Rev. D | Page 16 of 16
相关型号：
ADM489ARZ-REEL
5 V, Slew-Rate Limited, Low Power, 250 kbps, Full Duplex EIA RS-485 Transceiver (with DE/RE)
ADI
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