ADM706_15 [ADI]
Low Cost Microprocessor Supervisory Circuits;
| 型号： | ADM706_15 |
| 厂家： | 
ADI |
| 描述： | Low Cost Microprocessor Supervisory Circuits |
| 文件： | 总12页 (文件大小：338K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost Microprocessor
Supervisory Circuits
ADM705/ADM706/ADM707/ADM708
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
Guaranteed RESET valid with VCC = 1 V
190 μA quiescent current
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
INPUT (WDI)
WATCHDOG
TIMER
WATCHDOG
OUTPUT (WDO)
Precision supply voltage monitor
4.65 V (ADM705/ADM707)
V
RESET AND
WATCHDOG
TIMEBASE
CC
4.40 V (ADM706/ADM708)
250μA
200 ms reset pulse width
MR
RESET
Debounced TTL/CMOS manual reset input (MR)
Independent watchdog timer (ADM705/ADM706)
1.60 sec timeout (ADM705/ADM706)
Active high reset output (ADM707/ADM708)
Voltage monitor for power-fail or low battery warning
Superior upgrade for MAX705 to MAX708
RESET
GENERATOR
V
CC
4.65V*
ADM705/
ADM706
POWER-FAIL
INPUT (PFI)
POWER-FAIL
OUTPUT (PFO)
1.25V
*
VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706)
Figure 1. ADM705/ADM706
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Critical microprocessor supply monitoring
V
CC
250μA
RESET
RESET
MR
RESET
GENERATOR
V
CC
4.65V*
1.25V
ADM707/
ADM708
POWER-FAIL
INPUT (PFI)
POWER-FAIL
OUTPUT (PFO)
* VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708)
Figure 2. ADM707/ADM708
GENERAL DESCRIPTION
The ADM705/ADM706/ADM707/ADM708 microprocessor
supervisory circuits are suitable for monitoring 5 V power
supplies/batteries and can also monitor microprocessor activity.
The ADM705 and ADM706 are identical except for the reset
threshold monitor levels, which are 4.65 V and 4.40 V, respectively.
The ADM707 and ADM708 provide a similar functionality to
the ADM705 and ADM706 and only differ in that a watchdog
timer function is not available. Instead, an active high reset
output (RESET) is available as well as the active low reset output
The ADM705/ADM706 provide power-supply monitoring
circuitry that generate a reset output during power-up, power-
down, and brownout conditions. The reset output remains
operational with VCC as low as 1 V. Independent watchdog
monitoring circuitry is also provided. This is activated if the
watchdog input has not been toggled within 1.60 seconds.
RESET
(
). The ADM707 and ADM708 are identical except for
the reset threshold monitor levels, which are 4.65 V and 4.40 V,
respectively.
In addition, there is a 1.25 V threshold detector to warn of
power-failures, to detect low battery conditions, or to monitor an
additional power supply. An active low, debounced manual reset
All parts are available in narrow 8-lead PDIP and 8-lead SOIC
packages.
MR
input (
) is also included.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADM705/ADM706/ADM707/ADM708
TABLE OF CONTENTS
Features .............................................................................................. 1
RESET
Output ...........................................................8
Power-Fail
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Circuit Information.......................................................................... 8
Manual Reset..................................................................................8
Watchdog Timer (ADM705/ADM706) .....................................8
Power-Fail Comparator ................................................................8
RESET
Valid
Below 1 V VCC ........................................................9
Applications Information.............................................................. 10
Monitoring Additional Supply Levels...................................... 10
Microprocessor with Bidirectional RESET............................. 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 12
REVISION HISTORY
3/08—Rev. F to Rev. G
11/05—Rev. C to Rev. D
Changes to Applications .................................................................. 1
Changes to Table 2............................................................................ 4
Changes to Figure 9.......................................................................... 6
Changes to Figure 10, Figure 11, and Figure 12 ........................... 7
Changes to Figure 14........................................................................ 8
Changes to Ordering Guide .......................................................... 12
Updated Format..................................................................Universal
Deleted Figure 2.................................................................................4
Updated Outline Dimensions....................................................... 11
Changes to Ordering Guide.......................................................... 12
8/02—Rev. B to Rev. C
Removed RM-8 (μSOIC) Package....................................Universal
Updated N-8 and R-8 Packages .......................................................8
2/07—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Watchdog Timeout Period.......................................... 3
Replaced Pin Configurations and Function Descriptions
Section................................................................................................ 5
7/06—Rev. D to Rev. E
Added RM-8 (MSOP) Package.........................................Universal
Changes to Table 2............................................................................ 4
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide .......................................................... 12
Rev. G | Page 2 of 12
ADM705/ADM706/ADM707/ADM708
SPECIFICATIONS
VCC = 4.75 V to 5.5 V, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER SUPPLY
VCC Operating Voltage Range
Supply Current
1.0
5.5
V
190
250
μA
LOGIC OUTPUT
Reset Threshold
4.5
4.25
4.65
4.40
40
4.75
4.50
V
V
ADM705/ADM707
ADM706/ADM708
Reset Threshold Hysteresis
RESET PULSE WIDTH
mV
ms
V
160
200
280
RESET OUTPUT VOLTAGE
VCC − 1.5
ISOURCE = 800 μA
0.4
0.3
0.3
V
ISINK = 3.2 mA
V
VCC = 1 V, ISINK = 50 μA
V
VCC = 1.2 V, ISINK = 100 μA
ADM707/ADM708, ISOURCE = 800 μA
ADM707/ADM708, ISINK = 1.2 mA
VIL = 0.4 V, VIH = VCC × 0.8, WDI = VCC
RESET OUTPUT VOLTAGE
VCC − 1.5
V
0.4
V
WATCHDOG TIMEOUT PERIOD (tWD
)
1.00
50
1.60
2.25
sec
ns
WDI Pulse Width (tWP
)
WATCHDOG INPUT
WDI Input Threshold
Logic Low
0.8
V
Logic High
3.5
V
WDI Input Current
50
150
μA
μA
V
WDI = 0 V
−150
−50
WDI = 0 V
WDO OUTPUT VOLTAGE
VCC − 1.5
ISOURCE = 800 μA
ISINK = 1.2 mA
0.4
V
MANUAL RESET INPUT
MR Pull-Up Current
MR Pulse Width
100
150
250
600
μA
ns
MR = 0 V
MR INPUT THRESHOLD
Logic Low
0.8
V
2.0
V
Logic High
MR TO RESET OUTPUT DELAY
POWER-FAIL INPUT
PFI Input Threshold
PFI Input Current
250
ns
1.2
1.25
1.3
V
−25
+0.01
+25
nA
V
PFO OUTPUT VOLTAGE
V
CC − 1.5
ISOURCE = 800 μA
ISINK = 3.2 mA
0.4
V
Rev. G | Page 3 of 12
ADM705/ADM706/ADM707/ADM708
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter
VCC
All Other Inputs
Input Current
VCC
GND
Digital Output Current
Power Dissipation, N-8 PDIP
θJA Thermal Impedance
Power Dissipation, R-8 SOIC
θJA Thermal Impedance
Power Dissipation, RM-8 MSOP
θJA Thermal Impedance
Operating Temperature Range
Industrial (Version A)
Lead Temperature (Soldering, 10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
−0.3 V to +6 V
−0.3 V to VCC + 0.3 V
20 mA
20 mA
20 mA
727 mW
135°C/W
470 mW
110°C/W
900 mW
206°C/W
ESD CAUTION
−40°C to +85°C
300°C
215°C
220°C
Storage Temperature Range
ESD Rating
−65°C to +150°C
>4.5 kV
Rev. G | Page 4 of 12
ADM705/ADM706/ADM707/ADM708
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET
RESET
MR
1
2
3
4
8
7
6
5
NC
MR
1
2
3
4
8
7
6
5
RESET
RESET
NC
MR
1
2
3
4
8
7
6
5
WDO
RESET
WDI
ADM708
ADM707/
ADM705/
PFO
PFI
V
CC
V
CC
ADM708
ADM706
TOP VIEW
(Not to Scale)
GND
TOP VIEW
GND
TOP VIEW
(Not to Scale)
V
GND
CC
PFI
PFO
(Not to Scale)
PFI
PFO
NC = NO CONNECT
NC = NO CONNECT
Figure 3. ADM705/ADM706 PDIP/SOIC
Pin Configuration
Figure 4. ADM707/ADM708 PDIP/SOIC
Pin Configuration
Figure 5. ADM708 MSOP
Pin Configuration
Table 3. Pin Function Descriptions
Pin Number
ADM705/
ADM706
Mnemonic (PDIP, SOIC)
ADM707/
ADM708
(PDIP, SOIC)
ADM708
(MSOP)
Description
MR
1
1
3
Manual Reset Input. When this pin is taken below 0.8 V, a reset is generated.
MR can be driven from TTL, CMOS logic, or from a manual reset switch as it is
internally debounced. An internal 250 μA pull-up current holds the input high
when floating.
VCC
GND
PFI
2
3
4
2
3
4
4
5
6
5 V Power Supply Input.
0 V Ground Reference for All Signals.
Power-Fail Input. PFI is the noninverting input to the power-fail comparator.
When PFI is less than 1.25 V, PFO goes low. If unused, PFI should be connected
to GND or VCC.
PFO
WDI
5
6
5
7
Power-Fail Output. PFO is the output from the power-fail comparator. It goes
low when PFI is less than 1.25 V.
N/A
N/A
Watchdog Input. WDI is a three-level input. If WDI remains either high or low
for longer than the watchdog timeout period, the watchdog output (WDO)
goes low. The timer resets with each transition at the WDI input. Either a high-
to-low or a low-to-high transition clears the counter. The internal timer is also
cleared whenever reset is asserted. The watchdog timer is disabled when WDI
is left floating or connected to a three-state buffer.
NC
RESET
N/A
7
6
7
8
1
No Connect.
Logic Output. RESET goes low for 200 ms when triggered. It can be trig-
gered either by VCC being below the reset threshold or by a low signal on the
manual reset input (MR). RESET remains low whenever VCC is below the reset
threshold (4.65 V in ADM705/ADM707, 4.40 V in ADM706/ADM708). It remains
low for 200 ms after VCC goes above the reset threshold or MR goes from low to
high. A watchdog timeout does not trigger RESET unless WDO is connected to MR.
WDO
8
N/A
8
N/A
2
Watchdog Output. WDO remains low until the watchdog timer is cleared. WDO
also goes low during low line conditions. Whenever VCC is below the reset
threshold, WDO goes low if the internal WDO remains low. As soon as VCC goes
above the reset threshold, WDO goes high.
RESET
N/A
Logic Output. RESET is an active high output suitable for systems that use
active high reset logic. It is the inverse of RESET.
Rev. G | Page 5 of 12
ADM705/ADM706/ADM707/ADM708
TYPICAL PERFORMANCE CHARACTERISTICS
V
= 5V
CC
= 25°C
T
A
A1
4.50V
1.3V
PFI
100
90
V
CC
1.2V
5V
PFO
0V
10
0%
RESET
1V
1V
500msH
O
500ns/DIV
RESET
Figure 8. PFI Comparator Assertion Response Time
Figure 6.
Output Voltage vs. Supply Voltage
V
= 5V
CC
= 25°C
T
A
A1
4.50V
1.3V
PFI
100
V
CC
1.2V
90
RESET
4.4V
PFO
0V
10
0%
500msH
1V
1V
O
500ns/DIV
Figure 7. ADM707/ADM708 RESET Output Voltage vs. Supply Voltage
Figure 9. PFI Comparator Deassertion Response Time
Rev. G | Page 6 of 12
ADM705/ADM706/ADM707/ADM708
T
= 25°C
A
5V
5V
5V
RESET
V
RESET
CC
4V
V
= V
RT
CC
= 25°C
5V
T
A
RESET
0V
0V
0V
2μs/DIV
100ns/DIV
RESET
RESET
Response Time
Figure 10.
, RESET Assertion
Figure 12. ADM705/ADM707
5V
5V
RESET
RESET
V
= V
RT
CC
= 25°C
T
A
0V
0V
100ns/DIV
RESET
, RESET Deassertion
Figure 11.
Rev. G | Page 7 of 12
ADM705/ADM706/ADM707/ADM708
CIRCUIT INFORMATION
WDO
When VCC falls below the reset threshold,
whether or not the watchdog timer has timed out. Normally, this
RESET
is forced low
POWER-FAIL RESET OUTPUT
RESET
is an active low output that provides a reset signal to
the microprocessor whenever the VCC input is below the reset
RESET
generates an interrupt, but it is overridden by
The watchdog monitor can be deactivated by floating the
WDO
going low.
threshold. An internal timer holds
low for 200 ms after
watchdog input (WDI). The
can then be used as a low
the voltage on VCC rises above the threshold. This functions as a
power-on reset signal for the microprocessor. It allows time for
both the power supply and the microprocessor to stabilize after
line output, because it goes low only when VCC falls below the
reset threshold.
tWP
tWD
tWD
tWD
RESET
power-up. The
output is guaranteed to remain valid
WDI
(low) with VCC as low as 1 V. This ensures that the micropro-
cessor is held in a stable shutdown condition as the power
supply voltage ramps up.
WDO
RESET
In addition to
, an active high RESET output is also
RESET EXTERNALLY
TRIGGERED BY MR
available on the ADM707/ADM708. This is the complement
RESET
RESET
tRS
of
and is useful for processors requiring an active high
reset signal.
Figure 14. Watchdog Timing
MANUAL RESET
The manual reset input (
POWER-FAIL COMPARATOR
MR
) allows other reset sources, such
The power-fail comparator is an independent comparator that
can be used to monitor the input power supply. The comparator’s
inverting input is internally connected to a 1.25 V reference
voltage. The noninverting input is available at the PFI input.
This input can be used to monitor the input power supply via
a resistive divider network. When the voltage on the PFI input
as a manual reset switch, to generate a processor reset. The
input is effectively debounced by the timeout period (200 ms
MR
typical). The
input is TTL-/CMOS-compatible, so it can
also be driven by any logic reset output.
V
V
RT
V
RT
CC
PFO
drops below 1.25 V, the comparator output (
) goes low,
tRS
tRS
indicating a power failure. For early warning of power failure,
the comparator can be used to monitor the preregulator input
simply by choosing an appropriate resistive divider network.
RESET
MR
PFO
The
output can be used to interrupt the processor so that
MR EXTERNALLY
DRIVEN LOW
a shutdown procedure is implemented before power is lost.
INPUT
POWER
WDO
1.25V
R1
R2
PFO
POWER-FAIL
OUTPUT
RESET MR
WDO
Timing
Figure 13.
,
, and
POWER-FAIL PFI
INPUT
WATCHDOG TIMER (ADM705/ADM706)
ADM705/ADM706/
ADM707/ADM708
The watchdog timer circuit can be used to monitor the activity of
the microprocessor to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the watch-
dog input (WDI) line. If this line is not toggled within the timeout
Figure 15. Power-Fail Comparator
WDO
period (1.60 sec), then the watchdog output ( ) goes low.
WDO
can be connected to a nonmaskable interrupt (NMI)
The
on the processor; therefore, if the watchdog timer times out, an
interrupt is generated. The interrupt service routine should then
be used to rectify the problem.
RESET
WDO
If a
should be connected to the manual reset input (
The watchdog timer is cleared by either a high-to-low or a low-
RESET
signal is required when a timeout occurs, the
MR
).
to-high transition on WDI. It is also cleared by
low; therefore, the watchdog timeout period begins after
goes high.
going
RESET
Rev. G | Page 8 of 12
ADM705/ADM706/ADM707/ADM708
Adding Hysteresis to the Power-Fail Comparator
VALID RESET BELOW 1 V VCC
For increased noise immunity, hysteresis can be added to
the power-fail comparator. Because the comparator circuit is
noninverting, hysteresis can be added simply by connecting a
The ADM705/ADM706/ADM707/ADM708 are guaranteed to
provide a valid reset level with VCC as low as 1 V (see the Typical
Performance Characteristics section). As VCC drops below 1 V,
the internal transistor does not have sufficient drive to hold the
PFO
resistor between the
Figure 16.
output and the PFI input, as shown in
RESET
voltage
at 0 V. A pull-down resistor can be connected
externally, as shown in Figure 17, to hold the line low if
required.
7V TO 15V
5V
INPUT
ADP3367
POWER
V
CC
R1
ADM705/ADM706/
ADM707/ADM708
1.25V
–
PFO
TO
+
RESET
PFI
MICROPROCESSOR
NMI
R1
R2
ADM705/ADM706/
ADM707/ADM708
GND
R3
RESET
Figure 17.
Valid Below 1 V
5V
PFO
0V
0V
V
H
V
L
V
IN
Figure 16. Adding Hysteresis to the Power-Fail Comparator
PFO
When
is low, Resistor R3 sinks current from the summing
PFO
junction at the PFI pin. When
is high, Resistor R3 sources
current into the PFI summing junction. This results in differing
trip levels for the comparator. Further noise immunity can be
achieved by connecting a capacitor between PFI and GND. The
equations used to calculate the hysteresis are as follows:
R2 + R3
R2× R3
⎡
⎤
⎛
⎜
⎝
⎞
⎟
⎠
VH =1.25 1+
R1
⎥
⎢
⎣
⎦
VCC −1.25
1.25
R2
⎛
⎝
⎞
⎟
⎠
V =1.25 + R1
−
⎜
L
R3
R1+ R2
R2
⎛
⎝
⎞
⎟
⎠
VMID =1.25
⎜
Rev. G | Page 9 of 12
ADM705/ADM706/ADM707/ADM708
APPLICATIONS INFORMATION
A typical application circuit is shown in Figure 18. The
unregulated dc input supply is monitored using PFI via the
resistive divider network. Resistor R1 and Resistor R2 should
be selected so that when the supply voltage drops below the
desired level (such as 8 V), the voltage on PFI drops below
the 1.25 V threshold, thereby generating an interrupt to the
microprocessor. Monitoring the preregulator input provides
additional time to execute an orderly shutdown procedure
before power is lost.
MONITORING ADDITIONAL SUPPLY LEVELS
It is possible to use the power-fail comparator to monitor a
second supply as shown in Figure 20. The two sensing resistors,
R1 and R2, are selected so that the voltage on PFI drops below
PFO
1.25 V at the minimum acceptable input supply.
can be
MR
connected to
so that a reset is generated when the supply
drops out of tolerance. In this case, if either supply drops out
of tolerance, a reset is generated.
V
5V
X
5V
7V TO 15V
ADP3367
INPUT POWER
V
CC
V
CC
RESET
RESET
R1
R2
1.25V
–
ADM705/
ADM706
PFO
MICROPROCESSOR
R1
R2
RESET
+
PFI
PFI
MICROPROCESSOR
ADM705/ADM706/
ADM707/ADM708
PFO
MR
GND
Figure 18. Typical Application Circuit
Figure 20. Monitoring 5 V and an Additional Supply, VX
Microprocessor activity is monitored using WDI. This is driven
using an output line from the processor. The software routines
should toggle this line at least once every 1.60 seconds. If a
MICROPROCESSOR WITH BIDIRECTIONAL RESET
To prevent contention for microprocessors with a bidirectional
reset line, a current limiting resistor should be inserted between
WDO
problem occurs and this line is not toggled,
goes low and
a nonmaskable interrupt is generated. This interrupt routine can be
used to clear the problem.
RESET
RESET
the ADM70x
output pin and the microprocessor
pin. This limits the current to a safe level if there are conflicting
output reset levels. A suitable resistor value is 4.7 kΩ. If the reset
output is required for other uses, it should be buffered, as shown in
Figure 21.
If, in the event of inactivity on the WDI line, a system reset
WDO
MR
is required,
Figure 19.
should be connected to , as shown in
5V
BUFFERED
RESET
RESET
RESET
ADM705/
ADM706
WDI
MICROPROCESSOR
I/O LINE
V
CC
ADM70x
MICROPROCESSOR
RESET
WDO
GND
MR
RESET
GND
GND
RESET
WDO
From
Figure 19.
RESET
Figure 21. Bidirectional Input/Output
Rev. G | Page 10 of 12
ADM705/ADM706/ADM707/ADM708
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
1
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
PLANE
SEATING
PLANE
0.008 (0.20)
0.430 (10.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.005 (0.13)
MIN
MAX
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual-in-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
3.20
3.00
2.80
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
PIN 1
0.25 (0.0098)
0.65 BSC
0.10 (0.0040)
0.95
0.85
0.75
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
1.10 MAX
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 23. 8-Lead Standard Small Outline Package [SOIC_N]
(R-8)
Figure 24. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters
Rev. G | Page 11 of 12
ADM705/ADM706/ADM707/ADM708
ORDERING GUIDE
Model
ADM705AN
ADM705ANZ1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
Branding
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Plastic Dual-in-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
ADM705AR
ADM705AR–REEL
ADM705AR–REEL7
ADM705ARZ1
ADM705ARZ–REEL1
ADM705ARZ–REEL71
ADM706AN
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
ADM706ANZ1
ADM706AR
ADM706AR-REEL
ADM706AR-REEL7
ADM706ARZ1
ADM706ARZ-REEL1
ADM706ARZ-REEL71
ADM707AN
ADM707ANZ1
ADM707AR
ADM707AR-REEL
ADM707ARZ1
ADM707ARZ-REEL1
N-8
N-8
R-8
R-8
R-8
R-8
ADM708AN
ADM708ANZ1
ADM708AR
ADM708AR-REEL
ADM708ARZ1
ADM708ARZ-REEL1
N-8
N-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
ADM708ARM
AD70, M8
AD70, M8
M8F
ADM708ARM-REEL
ADM708ARMZ1
ADM708ARMZ-REEL1
M8F
1 Z = RoHS Compliant Part.
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00088-0-3/08(G)
Rev. G | Page 12 of 12
相关型号：
ADM708ARM-REEL
IC 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, M0-187AA, MSOP-8, Power Management Circuit
ADI
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