ADP121-3.0-EVALZ [ADI]
150 mA, Low Quiescent Current, CMOS Linear Regulator; 150毫安，低静态电流， CMOS线性稳压器
| 型号： | ADP121-3.0-EVALZ |
| 厂家： | 
ADI |
| 描述： | 150 mA, Low Quiescent Current, CMOS Linear Regulator |
| 文件： | 总20页 (文件大小：593K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
150 mA, Low Quiescent Current,
CMOS Linear Regulator
ADP121
TYPICAL APPLICATION CIRCUITS
FEATURES
Input voltage range: 2.3 V to 5.5 V
Output voltage range: 1.2 V to 3.3 V
Output current: 150 mA
V
= 2.3V
1µF
V
= 1.8V
OUT
IN
5
4
1
2
3
VIN
GND
EN
VOUT
NC
1µF
Low quiescent current
I
I
GND = 11 μA with 0 ꢀA load
GND = 30 μA with 150 mA load
NC = NO CONNECT
Low shutdown current: <1 μA
Low dropout voltage
Figure 1. ADP121 TSOT with Fixed Output Voltage, 1.8 V
90 mV @ 150 mA load
High PSRR
V
= 1.8V
V
= 2.3V
1µF
OUT
IN
VIN
EN
VOUT
GND
70 dB @ 1 kHz at VOUT = 1.2 V
70 dB @ 10 kHz at VOUT = 1.2 V
Low noise: 40 μV rms at VOUT = 1.2 V
No noise bypass capacitor required
Output voltage accuracy: 1ꢁ
Stable with a small 1 μF ceramic output capacitor
16 fixed output voltage options
Current limit and thermal overload protection
Logic controlled enable
1µF
Figure 2. ADP121 WLCSP with Fixed Output Voltage, 1.8 V
5-lead TSOT package
4-ball 0.4 mm pitch WLCSP
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Post regulation
GENERAL DESCRIPTION
The ADP121 is a quiescent current, low dropout, linear regulators
that operate from 2.3 V to 5.5 V and provide up to 150 mA of
output current. The low 135 mV dropout voltage at 150 mA
load improves efficiency and allows operation over a wide
input voltage range. The low 30 μA of quiescent current at full
load make the ADP121 ideal for battery-operated portable
equipment.
operation with small 1 ꢀF ceramic output capacitors. The
ADP121 delivers good transient performance with minimal
board area.
Short-circuit protection and thermal overload protection circuits
prevent damage in adverse conditions. The ADP121 is available
in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch WLCSP pack-
ages and utilizes the smallest footprint solution to meet a
variety of portable applications.
The ADP121 is available in 16 fixed output voltage options
ranging from 1.2 V to 3.3 V. The parts are optimized for stable
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADP121
TABLE OF CONTENTS
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 11
Applications Information.............................................................. 12
Capacitor Selection .................................................................... 12
Undervoltage Lockout ............................................................... 13
Enable Feature ............................................................................ 13
Current Limit and Thermal Overload Protection ................. 14
Thermal Considerations............................................................ 14
Printed Circuit Board Layout Considerations ....................... 17
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 19
Features .............................................................................................. 1
Applications....................................................................................... 1
Typical Application Circuits............................................................ 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Data................................................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
7/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADP121
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; EN = VIN; IOUT = 10 mA; CIN = COUT = 1 ꢀF; TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VIN
Conditions
Min
Typ
11
Max
Unit
V
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
TJ = −40°C to +125°C
IOUT = 0 μA
IOUT = 0 μA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
EN = GND
2.3
5.5
IGND
μA
μA
μA
μA
μA
μA
μA
μA
%
21
29
40
15
30
SHUTDOWN CURRENT
IGND-SD
VOUT
0.1
EN = GND, TJ = −40°C to +125°C
IOUT = 10 mA
100 μA < IOUT < 150 mA,
1.5
+1
+2
FIXED OUTPUT VOLTAGE ACCURACY
−1
−2
%
VIN = (VOUT + 0.5 V) to 5.5 V
100 μA < IOUT < 150 mA,
VIN = (VOUT + 0.5 V) to 5.5 V
TJ = −40°C to +125°C
−3
+3
%
REGULATION
Line Regulation
∆VOUT/∆VIN
VIN = (VOUT + 0.5 V) to 5.5 V, IOUT = 1 mA
TJ = −40°C to +125°C
−0.03
+0.03
0.005
%/V
Load Regulation1
∆VOUT/∆IOUT IOUT = 1 mA to 150 mA
0.001
%/mA
%/mA
IOUT = 1 mA to 150 mA
TJ = −40°C to +125°C
DROPOUT VOLTAGE2
TSOT
VDROPOUT
VOUT = 3.3 V
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
VOUT = 3.3 V
8
mV
mV
mV
mV
mV
mV
mV
mV
μs
12
120
6
180
9
WLCSP
90
135
350
START-UP TIME3
TSTART-UP
ILIMIT
120
225
CURRENT-LIMIT THRESHOLD4
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
160
1.2
mA
TSSD
TSSD-HYS
TJ rising
150
15
°C
°C
EN Input Logic High
VIH
2.3 V ≤ VIN ≤ 5.5 V
V
EN Input Logic Low
EN Input Leakage Current
VIL
VI-LEAKAGE
2.3 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
0.4
1
V
μA
0.05
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
UVLO
UVLORISE
UVLOFALL
UVLOHYS
OUTNOISE
2.25
V
V
mV
1.5
120
65
52
OUTPUT NOISE
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V
μV rms
μV rms
μV rms
40
Rev. 0 | Page 3 of 20
ADP121
Parameter
Symbol
Conditions
Min
Typ
60
66
Max
Unit
dB
dB
POWER SUPPLY REJECTION RATIO
PSRR
10 kHz, VIN = 5 V, VOUT = 3.3 V
10 kHz, VIN = 5 V, VOUT = 2.5 V
10 kHz, VIN = 5 V, VOUT = 1.2 V
70
dB
INPUT AND OUTPUT CAPACITOR5
Minimum Input and Output Capacitance
Capacitor ESR
CAPMIN
RESR
TJ = −40°C to +125°C
TJ = −40°C to +125°C
0.70
0.001
μF
Ω
1
1 Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.3 V.
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
5 The minimum input and output capacitance should be greater than 0.70 ꢀF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. 0 | Page 4 of 20
ADP121
ABSOLUTE MAXIMUM RATINGS
Table 2.
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4” × 3”, circuit
board. Refer to JESD 51-7 and JESD 51-9 for detailed
information on the board construction. For additional
information, see AN-617 Application Note, MicroCSPTM Wafer
Level Chip Scale Package.
Parameter
Rating
VIN to GND
VOUT to GND
−0.3 V to +6 V
−0.3 V to VIN
EN to GND
−0.3 V to +6 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Ψ
JB is the junction-to-board thermal characterization parameter
measured in °C/W. ΨJB is based on modeling and calculation
using a four-layer board. The JESD51-12 Guidelines for Reporting
and Using Package Thermal Information states that thermal
characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation
from the package, factors that make ΨJB more useful in real-
world applications. Maximum TJ is calculated from the board
temperature (TB) and PD using the following formula:
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP121 can be damaged when the junction
temperature limits are exceeded. Monitoring the ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated. In applications with moderate power
dissipation and low PCB thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA). TJ is calculated from
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed
information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 3.
Package Type
5-Lead TSOT
4-Ball 0.4 mm Pitch WLCSP
θJA
ΨJB
43
58
Unit
°C/W
°C/W
170
260
TA and PD using the following formula:
ESD CAUTION
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance, θJA, is based on
modeling and calculation using a four-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
Rev. 0 | Page 5 of 20
ADP121
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
5
4
1
2
3
VIN
GND
EN
VOUT
NC
A
B
VIN
VOUT
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
EN
GND
NC = NO CONNECT
Figure 3. 5-Lead TSOT Pin Configuration
Figure 4. 4-Ball WLCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
TSOT WLCSP Mnemonic Description
1
2
3
A1
B2
B1
VIN
GND
EN
Regulator Input Supply. Bypass VIN to GND with a 1 μF or larger capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic
startup, connect EN to VIN.
4
5
N/A
A2
NC
VOUT
No Connect. Not connected internally.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Rev. 0 | Page 6 of 20
ADP121
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, CIN = COUT = 1 ꢀF, TA = 25°C, unless otherwise noted.
1.804
1.802
1.800
40
35
30
25
20
15
10
5
V
V
= 1.8V
V
V
= 1.8V
OUT
= 2.3V
OUT
= 2.3V
IN
IN
1.798
1.796
1.794
1.792
I
I
I
I
I
I
= 10µA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
I
I
I
I
I
I
= 10µA
= 100µA
= 1mA
= 10mA
= 100mA
= 150mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
= 100µA
= 1mA
1.790
1.788
1.786
= 10mA
= 100mA
= 150mA
0
–40°C
–5°C
25°C
(°C)
85°C
125°C
–40°C
–5°C
25°C
(°C)
85°C
125°C
T
T
J
J
Figure 5. Output Voltage vs. Junction Temperature
Figure 8. Ground Current vs. Junction Temperature
1.806
1.804
1.802
35
V
V
T
= 1.8V
V
V
T
= 1.8V
OUT
= 2.3V
OUT
= 2.3V
IN
= 25°C
IN
= 25°C
A
30
25
20
A
1.800
1.798
1.796
1.794
15
10
5
0
0.001
0.01
0.1
1
10
100
1000
0.001
0.01
0.1
1
10
100
1000
I
(mA)
I
(mA)
LOAD
LOAD
Figure 6. Output Voltage vs. Load Current
Figure 9. Ground Current vs. Load Current
1.806
1.804
1.802
1.800
1.798
35
30
25
20
I
I
I
I
I
I
= 10µA
= 100µA
= 1mA
= 10mA
= 50mA
= 100mA
V
= 1.8V
V
= 1.8V
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
OUT
= 25°C
OUT
= 25°C
T
T
A
A
15
10
5
I
I
I
I
I
I
= 10µA
= 100µA
= 1mA
= 10mA
= 100mA
= 150mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
1.796
1.794
0
2.3
2.3
2.7
3.1
3.5
3.9
(V)
4.3
4.7
5.1
5.5
2.7
3.1
3.5
3.9
(V)
4.3
4.7
5.1
5.5
V
V
IN
IN
Figure 10. Ground Current vs. Input Voltage
Figure 7. Output Voltage vs. Input Voltage
Rev. 0 | Page 7 of 20
ADP121
0.35
0.30
0.25
0.20
140
T
= 25°C
V
V
V
V
V
V
= 2.30
= 2.50
= 3.00
= 3.50
= 4.20
= 5.50
A
IN
IN
IN
IN
IN
IN
120
100
80
60
40
20
0
0.15
0.10
0.05
V
= 2.5V
OUT
V
= 3.3V
OUT
0
–50
–25
0
25
50
75
100
125
1
10
100
1000
TEMPERATURE (°C)
I
(mA)
LOAD
Figure 11. Shutdown Current vs. Temperature at Various Input Voltages
Figure 14. Dropout Voltage vs. Load Current, WLCSP
3.35
3.30
3.25
3.20
V
T
= 3.3V
180
OUT
= 25°C
T
= 25°C
A
A
160
140
120
100
80
60
40
V
V
V
V
V
V
@ 1mA
OUT
OUT
OUT
OUT
OUT
OUT
3.15
3.10
3.05
V
= 2.5V
OUT
@ 10mA
@ 20mA
@ 50mA
@ 100mA
@ 150mA
V
= 3.3V
OUT
20
0
3.20
3.25
3.30
3.35
3.40
(V)
3.45
3.50
3.55
3.60
V
1
10
100
1000
IN
I
(mA)
LOAD
Figure 12. Dropout Voltage vs. Load Current, TSOT
Figure 15. Output Voltage vs. Input Voltage (In Dropout), WLCSP
3.35
3.30
3.25
3.20
60
V
T
= 3.3V
V
T
= 3.3V
OUT
= 25°C
OUT
= 25°C
A
A
50
40
30
V
V
V
V
V
V
@ 1mA
OUT
OUT
OUT
OUT
OUT
OUT
3.15
3.10
3.05
20
10
0
@ 10mA
@ 20mA
@ 50mA
@ 100mA
@ 150mA
I
I
I
= 1mA
= 10mA
= 20mA
I
I
I
= 50mA
= 100mA
= 150mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
3.20
3.25
3.30
3.35
3.40
(V)
3.45
3.50
3.55
3.60
3.20
3.25
3.30
3.35
3.40
3.45
3.50
3.55
3.60
V
V
(V)
IN
IN
Figure 13. Output Voltage vs. Input Voltage (In Dropout), TSOT
Figure 16. Ground Current vs. Input Voltage (In Dropout)
Rev. 0 | Page 8 of 20
ADP121
0
0
–20
3.3V/150mA
3.3V/100µA
1.2V/150mA
1.2V/100µA
1.8V/150mA
1.8V/100µA
V
V
V
= 50mV
RIPPLE
= 5V
IN
–10
= 1.2V
OUT
–20
–30
–40
–50
–60
–70
–80
–90
–100
C
= 1µF
OUT
150mA
100mA
10mA
1mA
100µA
0µA
–40
–60
–80
–100
–120
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. Power Supply Rejection Ratio vs. Frequency
Figure 20. Power Supply Rejection Ratio vs. Frequency, at Various Output
Voltages and Load Currents
0
10
V
V
V
= 50mV
RIPPLE
= 5V
IN
1.2V
1.8V
3.3V
–10
150mA
100mA
10mA
1mA
100µA
0µA
= 1.8V
= 1µF
OUT
–20
–30
–40
–50
–60
–70
–80
–90
–100
C
OUT
1
0.1
0
10
10
100
1k
10k
100k
1M
10M
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18. Power Supply Rejection Ratio vs. Frequency
Figure 21. Output Noise Spectrum, VIN = 5 V, ILOAD = 10 mA, COUT = 1 μF
70
60
50
40
0
V
V
V
= 50mV
RIPPLE
150mA
100mA
10mA
1mA
100µA
0µA
–10
= 5V
IN
= 3.3V
= 1µF
OUT
–20
–30
–40
–50
–60
–70
–80
–90
–100
C
OUT
30
20
10
3.3V
2.5V
1.8V
1.5V
1.2V
0
0.001
0.01
0.1
1
10
100
1000
10
100
1k
10k
100k
1M
10M
I
(mA)
LOAD
FREQUENCY (Hz)
Figure 19. Power Supply Rejection Ratio vs. Frequency
Figure 22. Output Noise vs. Load Current and Output Voltage, VIN = 5 V, COUT = 1 μF
Rev. 0 | Page 9 of 20
ADP121
I
LOAD
I
LOAD
1mA TO 150mA LOAD STEP,
2.5A/µs
4V TO 5V INPUT VOLTAGE STEP,
2V/µs
V
OUT
V
OUT
V
C
= 1.8V,
V
V
= 5V
= 1.8V
OUT
= C = 1µF
OUT
IN
OUT
IN
(40µs/DIV)
(4µs/DIV)
Figure 25. Line Transient Response, Load Current = 150 mA
Figure 23. Load Transient Response, CIN = COUT = 1 μF
V
C
= 1.8V,
OUT
= C
I
= 1µF
LOAD
IN
OUT
1mA TO 150mA LOAD STEP,
2.5A/µs
I
LOAD
4V TO 5V INPUT VOLTAGE STEP,
2V/µs
V
OUT
V
OUT
V
V
= 5V
= 1.8V
IN
OUT
(40µs/DIV)
(10µs/DIV)
Figure 26. Line Transient Response, Load Current = 1 mA
Figure 24. Load Transient Response, CIN = COUT = 4.7 μF
Rev. 0 | Page 10 of 20
ADP121
THEORY OF OPERATION
The ADP121 is a low quiescent current, low dropout linear
regulators that operate from 2.3 V to 5.5 V and provide up
to 150 mA of output current. Drawing a low 30 μA quiescent
current (typical) at full load makes the ADP121 ideal for battery-
operated portable equipment. Shutdown current consumption
is typically 100 nA.
Internally, the ADP121 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is con-
trolled by the error amplifier. The error amplifier compares the
reference voltage with the feedback voltage from the output and
amplifies the difference. If the feedback voltage is lower than
the reference voltage, the gate of the PMOS device is pulled
lower, allowing more current to flow and increasing the output
voltage. If the feedback voltage is higher than the reference
voltage, the gate of the PMOS device is pulled higher, allowing
less current to flow and decreasing the output voltage.
Optimized for use with small 1 ꢀF ceramic capacitors,
the ADP121 provides excellent transient performance.
VIN
VOUT
R1
The ADP121 is available in 16 output voltage options ranging
from 1.2 V to 3.3 V. The ADP121 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions.
When EN is high, VOUT turns on; when EN is low, VOUT
turns off. For automatic startup, EN can be tied to VIN.
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
PROTECT
R2
EN
SHUTDOWN
0.8V REFERENCE
Figure 27. Internal Block Diagram
Rev. 0 | Page 11 of 20
ADP121
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
Input Bypass Capacitor
Connecting a 1 ꢀF capacitor from VIN to GND reduces the
circuit sensitivity to the printed circuit board (PCB) layout,
especially when long input traces or high source impedance
is encountered. If output capacitance greater than 1 ꢀF is
required, the input capacitor should be increased to match it.
The ADP121 is designed for operation with small, space-saving
ceramic capacitors, but functions with most commonly used
capacitors as long as care is taken with the effective series resistance
(ESR) value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 ꢀF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
ADP121. The transient response to changes in load current is
also affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP121 to
large changes in the load current. Figure 28 and Figure 29 show
the transient responses for output capacitance values of 1 ꢀF and
4.7 ꢀF, respectively.
Input and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the
ADP121, as long as it meets the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufac-
tured with a variety of dielectrics, each with a different behavior
over temperature and applied voltage. Capacitors must have an
adequate dielectric to ensure the minimum capacitance over
the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended. Y5V and Z5U dielectrics are not recommended,
due to their poor temperature and dc bias characteristics.
I
LOAD
1mA TO 150mA LOAD STEP,
2.5A/µs
Figure 30 depicts the capacitance vs. voltage bias characteristic
of an 0402 1 ꢀF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about 15ꢁ over the −40°C to +85°C tempera-
ture range and is not a function of package or voltage rating.
1.2
CH1 MEAN
115.7mA
V
OUT
V
C
= 1.8V,
OUT
= C
= 1µF
IN
OUT
1.0
0.8
0.6
(400ns/DIV)
Figure 28. Output Transient Response, COUT = 1 ꢀF
I
LOAD
1mA TO 150mA LOAD STEP,
2.5A/µs
0.4
0.2
0
0
2
4
6
8
10
VOLTAGE (V)
V
OUT
Figure 30. Capacitance vs. Voltage Bias Characteristic
V
= 1.8V,
OUT
C
= C = 4.7µF
IN
OUT
(400ns/DIV)
Figure 29. Output Transient Response, COUT = 4.7 ꢀF
Rev. 0 | Page 12 of 20
ADP121
Equation 1 can be used to determine the worst-case capacitance
accounting for capacitor variation over temperature, compo-
nent tolerance, and voltage.
As shown in Figure 31, the EN pin has built in hysteresis. This
prevents on/off oscillations that may occur due to noise on the
EN pin as it passes through the threshold points.
C
EFF = CBIAS × (1 − TEMPCO) × (1 − TOL)
(1)
The active/inactive thresholds of the EN pin are derived from
the VIN voltage. Therefore, these thresholds vary with changing
input voltage. Figure 32 shows typical EN active/inactive thresholds
when the input voltage varies from 2.3 V to 5.5 V.
1.10
where:
C
BIAS is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
1.05
1.00
In this example, TEMPCO over −40°C to +85°C is assumed to
be 15ꢁ for an X5R dielectric. TOL is assumed to be 10ꢁ, and
C
BIAS is 0.94 μF at 1.8 V from the graph in Figure 30.
Substituting these values in Equation 1 yields
EFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
EN ACTIVE
0.95
0.90
0.85
C
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
EN INACTIVE
0.80
0.75
To guarantee the performance of the ADP121, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors are evaluated for each application.
0.70
2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
V
(V)
IN
Figure 32. Typical EN Pin Thresholds vs. Input Voltage
UNDERVOLTAGE LOCKOUT
The ADP121 utilizes an internal soft start to limit the inrush
current when the output is enabled. The start-up time for the
1.8 V option is approximately 120 ꢀs from the time the EN
active threshold is crossed to when the output reaches 90ꢁ of its
final value. The start-up time is somewhat dependant on the
output voltage setting and increases slightly as the output
voltage increases.
The ADP121 has an internal undervoltage lockout circuit that
disables all inputs and the output when the input voltage is less
than approximately 2.2 V. This ensures that the inputs of the
ADP121 and the output behave in a predictable manner during
power-up.
ENABLE FEATURE
The ADP121 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. Figure 31 shows a
rising voltage on EN crossing the active threshold, and then
VOUT turns on. When a falling voltage on EN crosses the
inactive threshold, VOUT turns off.
6
EN
5
4
3
V
V
= 5V
= 1.8V
IN
OUT
3.3V
C
= C
= 100mA
= 1µF
IN
OUT
VOUT
2
I
LOAD
1.8V
1
1.2V
EN
0
0
20
40
60
80
100 120 140 160 180 200
(µs)
Figure 33. Typical Start-Up Time
40ms/DIV
Figure 31. ADP121 Typical EN Pin Operation
Rev. 0 | Page 13 of 20
ADP121
temperature changes. These parameters include ambient temper-
ature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θJA). The θJA
number is dependent on the package assembly compounds used
and the amount of copper to which the GND pins of the package
are soldered on the PCB. Table 5 shows typical θJA values for
various PCB copper sizes and Table 6 shows the typical ΨJB values
for the ADP121.
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
The ADP121 is protected against damage due to excessive
power dissipation by current and thermal overload protection
circuits. The ADP121 is designed to current limit when the
output load reaches 225 mA (typical). When the output load
exceeds 225 mA, the output voltage is reduced to maintain a
constant current limit.
Table 5. Typical θJA Values
Thermal overload protection is built-in, which limits the
junction temperature to a maximum of 150°C (typical). Under
extreme conditions (that is, high ambient temperature and
power dissipation) when the junction temperature starts to
rise above 150°C, the output is turned off, reducing the output
current to zero. When the junction temperature drops below
135°C, the output is turned on again and output current is
restored to its nominal value.
Copper Size (mm2)
TSOT (°C/W)
WLCSP (°C/W)
01
50
100
300
500
170
152
146
134
131
260
159
157
153
151
1 Device soldered to minimum size pin traces.
Consider the case where a hard short from VOUT to GND
occurs. At first, the ADP121 current limits, so that only
225 mA is conducted into the short. If self-heating of the
junction is great enough to cause its temperature to rise above
150°C, thermal shutdown activates turning off the output and
reducing the output current to zero. As the junction tempera-
ture cools and drops below 135°C, the output turns on and
conducts 225 mA into the short, again causing the junction
temperature to rise above 150°C. This thermal oscillation
between 135°C and 150°C causes a current oscillation
between 225 mA and 0 mA that continues as long as the
short remains at the output.
Table 6. Typical ΨJB Values
TSOT (°C/W)
42.8
WLCSP (°C/W)
58.4
The junction temperature of the ADP121 can be calculated
from the following equation:
TJ = TA + (PD × θJA)
(2)
(3)
where:
TA is the ambient temperature.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND
)
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.
where:
I
I
LOAD is the load current.
GND is the ground current.
V
IN and VOUT are input and output voltages, respectively.
THERMAL CONSIDERATIONS
Power dissipation due to ground current is quite small and
can be ignored. Therefore, the junction temperature equation
simplifies to
In most applications, the ADP121 does not dissipate a lot of
heat due to high efficiency. However, in applications with a high
ambient temperature and high supply voltage to an output voltage
differential, the heat dissipated in the package is large enough
that it can cause the junction temperature of the die to exceed
the maximum junction temperature of 125°C.
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
As shown in Equation 4, for a given ambient temperature,
input-to-output voltage differential, and continuous load
current, there exists a minimum copper size requirement for
the PCB to ensure that the junction temperature does not rise
above 125°C. Figure 34 to Figure 47 show junction temperature
calculations for different ambient temperatures, load currents,
VIN-to-VOUT differentials, and areas of PCB copper.
When the junction temperature exceeds 150°C, the converter
enters thermal shutdown. It recovers only after the junction
temperature has decreased below 135°C to prevent any permanent
damage. Therefore, thermal analysis for the chosen application
is very important to guarantee reliable performance over all
conditions. The junction temperature of the die is the sum of
the ambient temperature of the environment and the tempera-
ture rise of the package due to the power dissipation, as shown
in Equation 2.
In cases where the board temperature is known, the thermal
characterization parameter, ΨJB, can be used to estimate the
junction temperature rise. TJ is calculated from TB and PD using
the formula
To guarantee reliable operation, the junction temperature of the
ADP121 must not exceed 125°C. To ensure that the junction
temperature stays below this maximum value, the user needs
to be aware of the parameters that contribute to junction
TJ = TB + (PD × ΨJB)
(5)
Rev. 0 | Page 14 of 20
ADP121
140
120
100
80
140
120
100
80
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
60
40
20
0
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
V
IN
OUT
IN
OUT
Figure 34. TSOT, 500 mm2 of PCB Copper, TA = 25°C
Figure 37. TSOT, 500 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT
= 150mA
60
40
20
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
V
IN
OUT
IN
OUT
Figure 35. TSOT, 100 mm2 of PCB Copper, TA = 25°C
Figure 38. TSOT, 100 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
60
40
20
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
V
IN
OUT
IN
OUT
Figure 36. TSOT, 0 mm2 of PCB Copper, TA = 25°C
Figure 39. TSOT, 0 mm2 of PCB Copper, TA = 50°C
Rev. 0 | Page 15 of 20
ADP121
140
120
100
80
140
120
100
80
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
60
40
20
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
4.5
4.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
V
IN
OUT
IN
OUT
Figure 40. WLCSP, 500 mm2 of PCB Copper, TA = 25°C
Figure 43. WLCSP, 500 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
60
40
20
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
V
V
IN
OUT
IN
OUT
Figure 41. WLCSP, 100 mm2 of PCB Copper, TA = 25°C
Figure 44. WLCSP, 100 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
MAX JUNCTION
TEMPERATURE
MAX JUNCTION
TEMPERATURE
LOAD CURRENT = 1mA
LOAD CURRENT =
10mA
60
40
20
0
60
40
20
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
0
0.5
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
V
IN
OUT
IN
OUT
Figure 42. WLCSP, 0 mm2 of PCB Copper, TA = 25°C
Figure 45. WLCSP, 0 mm2 of PCB Copper, TA = 50°C
Rev. 0 | Page 16 of 20
ADP121
140
120
100
80
GND
GND
ANALOG DEVICES
ADP121-xx-EVALZ
C1
C2
U1
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
MAX JUNCTION TEMPERATURE
60
40
20
0
J1
VIN
VOUT
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
V
IN
OUT
Figure 46. TSOT, 100 mm2 of PCB Copper, TA = 85°C
140
120
100
80
EN
GND
GND
Figure 48. Example of TSOT PCB Layout
J1
ADP121CB-xx-EVALZ
LOAD CURRENT = 1mA
LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA
MAX JUNCTION TEMPERATURE
60
40
20
VOUT
VIN
C1
C2
U1
WLC
SP
GND
GND
0
0.5
1.0
1.5
2.0
2.5
– V
3.0
(V)
3.5
4.0
4.5
EN
V
IN
OUT
Figure 47. WLCSP, 100 mm2 of PCB Copper, TA = 85°C
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP121. How-
ever, as can be seen from Table 5 and Table 6, a point of
diminishing returns is eventually reached, beyond which
an increase in the copper size does not yield significant heat
dissipation benefits.
Figure 49. Example of WLCSP PCB Layout
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use 0402 or 0603 size capacitors and
resistors to achieve the smallest possible footprint solution on
boards where area is limited.
Rev. 0 | Page 17 of 20
ADP121
OUTLINE DIMENSIONS
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
PIN 1
0.95 BSC
1.90
BSC
*
0.90
0.87
0.84
*
1.00 MAX
0.20
0.08
8°
4°
0°
0.10 MAX
0.60
0.45
0.30
0.50
0.30
SEATING
PLANE
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 50. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions show in millimeters
0.660
0.600
0.540
0.860
0.820 SQ
0.780
A1 BALL
CORNER
SEATING
PLANE
2
1
A
B
0.280
0.260
0.240
0.40
BALL PITCH
TOP VIEW
(BALL SIDE DOWN)
BOTTOM VIEW
(BALL SIDE UP)
0.230
0.200
0.170
0.050 NOM
COPLANARITY
Figure 51. 4-Ball Wafer Level Chip Scale- Package [WLCSP]
(CB-4-2)
Dimensions show in millimeters
Rev. 0 | Page 18 of 20
ADP121
ORDERING GUIDE
Temperature
Range
Output
Voltage (V)
Package
Option
Model
Package Description
5-Lead TSOT
Branding
LA3
LA4
LA5
LC0
LC1
LC2
LC3
LC4
LC5
LC6
LC7
LC8
ADP121-AUJZ28R71
ADP121-AUJZ30R71
ADP121-AUJZ33R71
ADP121-ACBZ12R71
ADP121-ACBZ15R71
ADP121-ACBZ155R71
ADP121-ACBZ16R71
ADP121-ACBZ165R71
ADP121-ACBZ17R71
ADP121-ACBZ175R71
ADP121-ACBZ18R71
ADP121-ACBZ188R71
ADP121-ACBZ20R71
ADP121-ACBZ25R71
ADP121-ACBZ278R71
ADP121-ACBZ28R71
ADP121-ACBZ29R71
ADP121-ACBZ30R71
ADP121-ACBZ33R71
ADP121-3.3-EVALZ1
ADP121-3.0-EVALZ1
ADP121-2.8-EVALZ1
ADP121CB-3.3-EVALZ1
ADP121CB-3.0-EVALZ1
ADP121CB-2.8-EVALZ1
ADP121CB-2.0-EVALZ1
ADP121CB-1.8-EVALZ1
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
2.8
UJ-5
3.0
3.3
1.2
1.5
1.55
1.6
1.65
1.7
1.75
1.8
1.875
2.0
2.5
2.775
2.8
2.9
3.0
3.3
3.3
3.0
2.8
5-Lead TSOT
5-Lead TSOT
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
UJ-5
UJ-5
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
CB-4-2
LC9
LCA
LCC
LCD
LCE
LCF
LCG
4-Ball WLCSP
4-Ball WLCSP
ADP121 3.3 V Output Evaluation Board
ADP121 3.0 V Output Evaluation Board
ADP121 2.8 V Output Evaluation Board
ADP121-1 3.3 V Output Evaluation Board
ADP121-1 3.0 V Output Evaluation Board
ADP121-1 2.8 V Output Evaluation Board
ADP121-1 2.0 V Output Evaluation Board
ADP121-1 1.8 V Output Evaluation Board
3.3
3.0
2.8
2.0
1.8
1 Z = RoHS Compliant Part.
Rev. 0 | Page 19 of 20
ADP121
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06901-0-7/08(0)
Rev. 0 | Page 20 of 20
相关型号：
©2020 ICPDF网 联系我们和版权申明